Mercurial > hg > graal-compiler
annotate src/share/vm/opto/chaitin.hpp @ 8728:056ab43544a4
8009721: Make PhaseLive independent from regalloc
Summary: Moved class definition of LRG_List from chaitin.hpp to live.hpp
Reviewed-by: kvn, rbackman, roland
Contributed-by: niclas.adlertz@oracle.com
| author | neliasso |
|---|---|
| date | Wed, 13 Mar 2013 10:56:54 +0100 |
| parents | a1c7f6472621 |
| children | 8373c19be854 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #ifndef SHARE_VM_OPTO_CHAITIN_HPP |
| 26 #define SHARE_VM_OPTO_CHAITIN_HPP | |
| 27 | |
| 28 #include "code/vmreg.hpp" | |
| 29 #include "libadt/port.hpp" | |
| 30 #include "memory/resourceArea.hpp" | |
| 31 #include "opto/connode.hpp" | |
| 32 #include "opto/live.hpp" | |
| 33 #include "opto/matcher.hpp" | |
| 34 #include "opto/phase.hpp" | |
| 35 #include "opto/regalloc.hpp" | |
| 36 #include "opto/regmask.hpp" | |
| 37 | |
| 0 | 38 class LoopTree; |
| 39 class MachCallNode; | |
| 40 class MachSafePointNode; | |
| 41 class Matcher; | |
| 42 class PhaseCFG; | |
| 43 class PhaseLive; | |
| 44 class PhaseRegAlloc; | |
| 45 class PhaseChaitin; | |
| 46 | |
| 47 #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001) | |
| 48 #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25) | |
| 49 | |
| 50 //------------------------------LRG-------------------------------------------- | |
| 51 // Live-RanGe structure. | |
| 52 class LRG : public ResourceObj { | |
| 3939 | 53 friend class VMStructs; |
| 0 | 54 public: |
| 55 enum { SPILL_REG=29999 }; // Register number of a spilled LRG | |
| 56 | |
| 57 double _cost; // 2 for loads/1 for stores times block freq | |
| 58 double _area; // Sum of all simultaneously live values | |
| 59 double score() const; // Compute score from cost and area | |
| 60 double _maxfreq; // Maximum frequency of any def or use | |
| 61 | |
| 62 Node *_def; // Check for multi-def live ranges | |
| 63 #ifndef PRODUCT | |
| 64 GrowableArray<Node*>* _defs; | |
| 65 #endif | |
| 66 | |
| 67 uint _risk_bias; // Index of LRG which we want to avoid color | |
| 68 uint _copy_bias; // Index of LRG which we want to share color | |
| 69 | |
| 70 uint _next; // Index of next LRG in linked list | |
| 71 uint _prev; // Index of prev LRG in linked list | |
| 72 private: | |
| 73 uint _reg; // Chosen register; undefined if mask is plural | |
| 74 public: | |
| 75 // Return chosen register for this LRG. Error if the LRG is not bound to | |
| 76 // a single register. | |
| 77 OptoReg::Name reg() const { return OptoReg::Name(_reg); } | |
| 78 void set_reg( OptoReg::Name r ) { _reg = r; } | |
| 79 | |
| 80 private: | |
| 81 uint _eff_degree; // Effective degree: Sum of neighbors _num_regs | |
| 82 public: | |
| 83 int degree() const { assert( _degree_valid, "" ); return _eff_degree; } | |
| 84 // Degree starts not valid and any change to the IFG neighbor | |
| 85 // set makes it not valid. | |
| 86 void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) } | |
| 87 // Made a change that hammered degree | |
| 88 void invalid_degree() { debug_only(_degree_valid=0;) } | |
| 89 // Incrementally modify degree. If it was correct, it should remain correct | |
| 90 void inc_degree( uint mod ) { _eff_degree += mod; } | |
| 91 // Compute the degree between 2 live ranges | |
| 92 int compute_degree( LRG &l ) const; | |
| 93 | |
| 94 private: | |
| 95 RegMask _mask; // Allowed registers for this LRG | |
| 96 uint _mask_size; // cache of _mask.Size(); | |
| 97 public: | |
| 98 int compute_mask_size() const { return _mask.is_AllStack() ? 65535 : _mask.Size(); } | |
| 99 void set_mask_size( int size ) { | |
| 100 assert((size == 65535) || (size == (int)_mask.Size()), ""); | |
| 101 _mask_size = size; | |
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102 #ifdef ASSERT |
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103 _msize_valid=1; |
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104 if (_is_vector) { |
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105 assert(!_fat_proj, "sanity"); |
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106 _mask.verify_sets(_num_regs); |
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107 } else if (_num_regs == 2 && !_fat_proj) { |
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108 _mask.verify_pairs(); |
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109 } |
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110 #endif |
| 0 | 111 } |
| 112 void compute_set_mask_size() { set_mask_size(compute_mask_size()); } | |
| 113 int mask_size() const { assert( _msize_valid, "mask size not valid" ); | |
| 114 return _mask_size; } | |
| 115 // Get the last mask size computed, even if it does not match the | |
| 116 // count of bits in the current mask. | |
| 117 int get_invalid_mask_size() const { return _mask_size; } | |
| 118 const RegMask &mask() const { return _mask; } | |
| 119 void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)} | |
| 120 void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)} | |
| 121 void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)} | |
| 122 void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; } | |
| 123 void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; } | |
| 124 void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) } | |
| 125 void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) } | |
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126 void clear_to_pairs() { _mask.clear_to_pairs(); debug_only(_msize_valid=0;) } |
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127 void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) } |
| 0 | 128 |
| 129 // Number of registers this live range uses when it colors | |
| 130 private: | |
| 131 uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else | |
| 132 // except _num_regs is kill count for fat_proj | |
| 133 public: | |
| 134 int num_regs() const { return _num_regs; } | |
| 135 void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; } | |
| 136 | |
| 137 private: | |
| 138 // Number of physical registers this live range uses when it colors | |
| 139 // Architecture and register-set dependent | |
| 140 uint8 _reg_pressure; | |
| 141 public: | |
| 142 void set_reg_pressure(int i) { _reg_pressure = i; } | |
| 143 int reg_pressure() const { return _reg_pressure; } | |
| 144 | |
| 145 // How much 'wiggle room' does this live range have? | |
| 146 // How many color choices can it make (scaled by _num_regs)? | |
| 147 int degrees_of_freedom() const { return mask_size() - _num_regs; } | |
| 148 // Bound LRGs have ZERO degrees of freedom. We also count | |
| 149 // must_spill as bound. | |
| 150 bool is_bound () const { return _is_bound; } | |
| 151 // Negative degrees-of-freedom; even with no neighbors this | |
| 152 // live range must spill. | |
| 153 bool not_free() const { return degrees_of_freedom() < 0; } | |
| 154 // Is this live range of "low-degree"? Trivially colorable? | |
| 155 bool lo_degree () const { return degree() <= degrees_of_freedom(); } | |
| 156 // Is this live range just barely "low-degree"? Trivially colorable? | |
| 157 bool just_lo_degree () const { return degree() == degrees_of_freedom(); } | |
| 158 | |
| 159 uint _is_oop:1, // Live-range holds an oop | |
| 160 _is_float:1, // True if in float registers | |
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161 _is_vector:1, // True if in vector registers |
| 0 | 162 _was_spilled1:1, // True if prior spilling on def |
| 163 _was_spilled2:1, // True if twice prior spilling on def | |
| 164 _is_bound:1, // live range starts life with no | |
| 165 // degrees of freedom. | |
| 166 _direct_conflict:1, // True if def and use registers in conflict | |
| 167 _must_spill:1, // live range has lost all degrees of freedom | |
| 168 // If _fat_proj is set, live range does NOT require aligned, adjacent | |
| 169 // registers and has NO interferences. | |
| 170 // If _fat_proj is clear, live range requires num_regs() to be a power of | |
| 171 // 2, and it requires registers to form an aligned, adjacent set. | |
| 172 _fat_proj:1, // | |
| 173 _was_lo:1, // Was lo-degree prior to coalesce | |
| 174 _msize_valid:1, // _mask_size cache valid | |
| 175 _degree_valid:1, // _degree cache valid | |
| 176 _has_copy:1, // Adjacent to some copy instruction | |
| 177 _at_risk:1; // Simplify says this guy is at risk to spill | |
| 178 | |
| 179 | |
| 180 // Alive if non-zero, dead if zero | |
| 181 bool alive() const { return _def != NULL; } | |
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182 bool is_multidef() const { return _def == NodeSentinel; } |
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183 bool is_singledef() const { return _def != NodeSentinel; } |
| 0 | 184 |
| 185 #ifndef PRODUCT | |
| 186 void dump( ) const; | |
| 187 #endif | |
| 188 }; | |
| 189 | |
| 190 //------------------------------IFG-------------------------------------------- | |
| 191 // InterFerence Graph | |
| 192 // An undirected graph implementation. Created with a fixed number of | |
| 193 // vertices. Edges can be added & tested. Vertices can be removed, then | |
| 194 // added back later with all edges intact. Can add edges between one vertex | |
| 195 // and a list of other vertices. Can union vertices (and their edges) | |
| 196 // together. The IFG needs to be really really fast, and also fairly | |
| 197 // abstract! It needs abstraction so I can fiddle with the implementation to | |
| 198 // get even more speed. | |
| 199 class PhaseIFG : public Phase { | |
| 3939 | 200 friend class VMStructs; |
| 0 | 201 // Current implementation: a triangular adjacency list. |
| 202 | |
| 203 // Array of adjacency-lists, indexed by live-range number | |
| 204 IndexSet *_adjs; | |
| 205 | |
| 206 // Assertion bit for proper use of Squaring | |
| 207 bool _is_square; | |
| 208 | |
| 209 // Live range structure goes here | |
| 210 LRG *_lrgs; // Array of LRG structures | |
| 211 | |
| 212 public: | |
| 213 // Largest live-range number | |
| 214 uint _maxlrg; | |
| 215 | |
| 216 Arena *_arena; | |
| 217 | |
| 218 // Keep track of inserted and deleted Nodes | |
| 219 VectorSet *_yanked; | |
| 220 | |
| 221 PhaseIFG( Arena *arena ); | |
| 222 void init( uint maxlrg ); | |
| 223 | |
| 224 // Add edge between a and b. Returns true if actually addded. | |
| 225 int add_edge( uint a, uint b ); | |
| 226 | |
| 227 // Add edge between a and everything in the vector | |
| 228 void add_vector( uint a, IndexSet *vec ); | |
| 229 | |
| 230 // Test for edge existance | |
| 231 int test_edge( uint a, uint b ) const; | |
| 232 | |
| 233 // Square-up matrix for faster Union | |
| 234 void SquareUp(); | |
| 235 | |
| 236 // Return number of LRG neighbors | |
| 237 uint neighbor_cnt( uint a ) const { return _adjs[a].count(); } | |
| 238 // Union edges of b into a on Squared-up matrix | |
| 239 void Union( uint a, uint b ); | |
| 240 // Test for edge in Squared-up matrix | |
| 241 int test_edge_sq( uint a, uint b ) const; | |
| 242 // Yank a Node and all connected edges from the IFG. Be prepared to | |
| 243 // re-insert the yanked Node in reverse order of yanking. Return a | |
| 244 // list of neighbors (edges) yanked. | |
| 245 IndexSet *remove_node( uint a ); | |
| 246 // Reinsert a yanked Node | |
| 247 void re_insert( uint a ); | |
| 248 // Return set of neighbors | |
| 249 IndexSet *neighbors( uint a ) const { return &_adjs[a]; } | |
| 250 | |
| 251 #ifndef PRODUCT | |
| 252 // Dump the IFG | |
| 253 void dump() const; | |
| 254 void stats() const; | |
| 255 void verify( const PhaseChaitin * ) const; | |
| 256 #endif | |
| 257 | |
| 258 //--------------- Live Range Accessors | |
| 259 LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; } | |
| 260 | |
| 261 // Compute and set effective degree. Might be folded into SquareUp(). | |
| 262 void Compute_Effective_Degree(); | |
| 263 | |
| 264 // Compute effective degree as the sum of neighbors' _sizes. | |
| 265 int effective_degree( uint lidx ) const; | |
| 266 }; | |
| 267 | |
| 268 // TEMPORARILY REPLACED WITH COMMAND LINE FLAG | |
| 269 | |
| 270 //// !!!!! Magic Constants need to move into ad file | |
| 271 #ifdef SPARC | |
| 272 //#define FLOAT_PRESSURE 30 /* SFLT_REG_mask.Size() - 1 */ | |
| 273 //#define INT_PRESSURE 23 /* NOTEMP_I_REG_mask.Size() - 1 */ | |
| 274 #define FLOAT_INCREMENT(regs) regs | |
| 275 #else | |
| 276 //#define FLOAT_PRESSURE 6 | |
| 277 //#define INT_PRESSURE 6 | |
| 278 #define FLOAT_INCREMENT(regs) 1 | |
| 279 #endif | |
| 280 | |
| 281 //------------------------------Chaitin---------------------------------------- | |
| 282 // Briggs-Chaitin style allocation, mostly. | |
| 283 class PhaseChaitin : public PhaseRegAlloc { | |
| 3939 | 284 friend class VMStructs; |
| 0 | 285 |
| 286 int _trip_cnt; | |
| 287 int _alternate; | |
| 288 | |
| 289 uint _maxlrg; // Max live range number | |
| 290 LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); } | |
| 291 PhaseLive *_live; // Liveness, used in the interference graph | |
| 292 PhaseIFG *_ifg; // Interference graph (for original chunk) | |
| 293 Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill | |
| 294 VectorSet _spilled_once; // Nodes that have been spilled | |
| 295 VectorSet _spilled_twice; // Nodes that have been spilled twice | |
| 296 | |
| 297 LRG_List _names; // Map from Nodes to Live RanGes | |
| 298 | |
| 299 // Union-find map. Declared as a short for speed. | |
| 300 // Indexed by live-range number, it returns the compacted live-range number | |
| 301 LRG_List _uf_map; | |
| 302 // Reset the Union-Find map to identity | |
| 303 void reset_uf_map( uint maxlrg ); | |
| 304 // Remove the need for the Union-Find mapping | |
| 305 void compress_uf_map_for_nodes( ); | |
| 306 | |
| 307 // Combine the Live Range Indices for these 2 Nodes into a single live | |
| 308 // range. Future requests for any Node in either live range will | |
| 309 // return the live range index for the combined live range. | |
| 310 void Union( const Node *src, const Node *dst ); | |
| 311 | |
| 312 void new_lrg( const Node *x, uint lrg ); | |
| 313 | |
| 314 // Compact live ranges, removing unused ones. Return new maxlrg. | |
| 315 void compact(); | |
| 316 | |
| 317 uint _lo_degree; // Head of lo-degree LRGs list | |
| 318 uint _lo_stk_degree; // Head of lo-stk-degree LRGs list | |
| 319 uint _hi_degree; // Head of hi-degree LRGs list | |
| 320 uint _simplified; // Linked list head of simplified LRGs | |
| 321 | |
| 322 // Helper functions for Split() | |
| 323 uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx ); | |
| 324 uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx ); | |
| 325 int clone_projs( Block *b, uint idx, Node *con, Node *copy, uint &maxlrg ); | |
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326 Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits, |
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327 int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru); |
| 0 | 328 // True if lidx is used before any real register is def'd in the block |
| 329 bool prompt_use( Block *b, uint lidx ); | |
| 330 Node *get_spillcopy_wide( Node *def, Node *use, uint uidx ); | |
| 605 | 331 // Insert the spill at chosen location. Skip over any intervening Proj's or |
| 0 | 332 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block |
| 333 // instead. Update high-pressure indices. Create a new live range. | |
| 334 void insert_proj( Block *b, uint i, Node *spill, uint maxlrg ); | |
| 335 | |
| 336 bool is_high_pressure( Block *b, LRG *lrg, uint insidx ); | |
| 337 | |
| 338 uint _oldphi; // Node index which separates pre-allocation nodes | |
| 339 | |
| 340 Block **_blks; // Array of blocks sorted by frequency for coalescing | |
| 341 | |
| 673 | 342 float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info |
| 343 | |
| 0 | 344 #ifndef PRODUCT |
| 345 bool _trace_spilling; | |
| 346 #endif | |
| 347 | |
| 348 public: | |
| 349 PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher ); | |
| 350 ~PhaseChaitin() {} | |
| 351 | |
| 352 // Convert a Node into a Live Range Index - a lidx | |
| 353 uint Find( const Node *n ) { | |
| 354 uint lidx = n2lidx(n); | |
| 355 uint uf_lidx = _uf_map[lidx]; | |
| 356 return (uf_lidx == lidx) ? uf_lidx : Find_compress(n); | |
| 357 } | |
| 358 uint Find_const( uint lrg ) const; | |
| 359 uint Find_const( const Node *n ) const; | |
| 360 | |
| 361 // Do all the real work of allocate | |
| 362 void Register_Allocate(); | |
| 363 | |
| 364 uint n2lidx( const Node *n ) const { return _names[n->_idx]; } | |
| 365 | |
| 673 | 366 float high_frequency_lrg() const { return _high_frequency_lrg; } |
| 367 | |
| 0 | 368 #ifndef PRODUCT |
| 369 bool trace_spilling() const { return _trace_spilling; } | |
| 370 #endif | |
| 371 | |
| 372 private: | |
| 373 // De-SSA the world. Assign registers to Nodes. Use the same register for | |
| 374 // all inputs to a PhiNode, effectively coalescing live ranges. Insert | |
| 375 // copies as needed. | |
| 376 void de_ssa(); | |
| 377 uint Find_compress( const Node *n ); | |
| 378 uint Find( uint lidx ) { | |
| 379 uint uf_lidx = _uf_map[lidx]; | |
| 380 return (uf_lidx == lidx) ? uf_lidx : Find_compress(lidx); | |
| 381 } | |
| 382 uint Find_compress( uint lidx ); | |
| 383 | |
| 384 uint Find_id( const Node *n ) { | |
| 385 uint retval = n2lidx(n); | |
| 386 assert(retval == Find(n),"Invalid node to lidx mapping"); | |
| 387 return retval; | |
| 388 } | |
| 389 | |
| 390 // Add edge between reg and everything in the vector. | |
| 391 // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask | |
| 392 // information to trim the set of interferences. Return the | |
| 393 // count of edges added. | |
| 394 void interfere_with_live( uint reg, IndexSet *live ); | |
| 395 // Count register pressure for asserts | |
| 396 uint count_int_pressure( IndexSet *liveout ); | |
| 397 uint count_float_pressure( IndexSet *liveout ); | |
| 398 | |
| 399 // Build the interference graph using virtual registers only. | |
| 400 // Used for aggressive coalescing. | |
| 401 void build_ifg_virtual( ); | |
| 402 | |
| 403 // Build the interference graph using physical registers when available. | |
| 404 // That is, if 2 live ranges are simultaneously alive but in their | |
| 405 // acceptable register sets do not overlap, then they do not interfere. | |
| 406 uint build_ifg_physical( ResourceArea *a ); | |
| 407 | |
| 408 // Gather LiveRanGe information, including register masks and base pointer/ | |
| 409 // derived pointer relationships. | |
| 410 void gather_lrg_masks( bool mod_cisc_masks ); | |
| 411 | |
| 412 // Force the bases of derived pointers to be alive at GC points. | |
| 413 bool stretch_base_pointer_live_ranges( ResourceArea *a ); | |
| 414 // Helper to stretch above; recursively discover the base Node for | |
| 415 // a given derived Node. Easy for AddP-related machine nodes, but | |
| 416 // needs to be recursive for derived Phis. | |
| 417 Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg ); | |
| 418 | |
| 419 // Set the was-lo-degree bit. Conservative coalescing should not change the | |
| 420 // colorability of the graph. If any live range was of low-degree before | |
| 421 // coalescing, it should Simplify. This call sets the was-lo-degree bit. | |
| 422 void set_was_low(); | |
| 423 | |
| 424 // Split live-ranges that must spill due to register conflicts (as opposed | |
| 425 // to capacity spills). Typically these are things def'd in a register | |
| 426 // and used on the stack or vice-versa. | |
| 427 void pre_spill(); | |
| 428 | |
| 429 // Init LRG caching of degree, numregs. Init lo_degree list. | |
| 430 void cache_lrg_info( ); | |
| 431 | |
| 432 // Simplify the IFG by removing LRGs of low degree with no copies | |
| 433 void Pre_Simplify(); | |
| 434 | |
| 435 // Simplify the IFG by removing LRGs of low degree | |
| 436 void Simplify(); | |
| 437 | |
| 438 // Select colors by re-inserting edges into the IFG. | |
| 605 | 439 // Return TRUE if any spills occurred. |
| 0 | 440 uint Select( ); |
| 441 // Helper function for select which allows biased coloring | |
| 442 OptoReg::Name choose_color( LRG &lrg, int chunk ); | |
| 443 // Helper function which implements biasing heuristic | |
| 444 OptoReg::Name bias_color( LRG &lrg, int chunk ); | |
| 445 | |
| 446 // Split uncolorable live ranges | |
| 447 // Return new number of live ranges | |
| 6632 | 448 uint Split(uint maxlrg, ResourceArea* split_arena); |
| 0 | 449 |
| 450 // Copy 'was_spilled'-edness from one Node to another. | |
| 451 void copy_was_spilled( Node *src, Node *dst ); | |
| 452 // Set the 'spilled_once' or 'spilled_twice' flag on a node. | |
| 453 void set_was_spilled( Node *n ); | |
| 454 | |
| 455 // Convert ideal spill-nodes into machine loads & stores | |
| 456 // Set C->failing when fixup spills could not complete, node limit exceeded. | |
| 457 void fixup_spills(); | |
| 458 | |
| 459 // Post-Allocation peephole copy removal | |
| 460 void post_allocate_copy_removal(); | |
| 461 Node *skip_copies( Node *c ); | |
| 923 | 462 // Replace the old node with the current live version of that value |
| 463 // and yank the old value if it's dead. | |
| 464 int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg, | |
| 465 Block *current_block, Node_List& value, Node_List& regnd ) { | |
| 466 Node* v = regnd[nreg]; | |
| 467 assert(v->outcnt() != 0, "no dead values"); | |
| 468 old->replace_by(v); | |
| 469 return yank_if_dead(old, current_block, &value, ®nd); | |
| 470 } | |
| 471 | |
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472 int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) { |
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473 return yank_if_dead_recurse(old, old, current_block, value, regnd); |
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474 } |
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475 int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block, |
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476 Node_List *value, Node_List *regnd); |
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477 int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ); |
| 0 | 478 int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ); |
| 479 int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ); | |
| 480 bool may_be_copy_of_callee( Node *def ) const; | |
| 481 | |
| 482 // If nreg already contains the same constant as val then eliminate it | |
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483 bool eliminate_copy_of_constant(Node* val, Node* n, |
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484 Block *current_block, Node_List& value, Node_List ®nd, |
| 0 | 485 OptoReg::Name nreg, OptoReg::Name nreg2); |
| 486 // Extend the node to LRG mapping | |
| 487 void add_reference( const Node *node, const Node *old_node); | |
| 488 | |
| 489 private: | |
| 490 | |
| 491 static int _final_loads, _final_stores, _final_copies, _final_memoves; | |
| 492 static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost; | |
| 493 static int _conserv_coalesce, _conserv_coalesce_pair; | |
| 494 static int _conserv_coalesce_trie, _conserv_coalesce_quad; | |
| 495 static int _post_alloc; | |
| 496 static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce; | |
| 497 static int _used_cisc_instructions, _unused_cisc_instructions; | |
| 498 static int _allocator_attempts, _allocator_successes; | |
| 499 | |
| 500 #ifndef PRODUCT | |
| 501 static uint _high_pressure, _low_pressure; | |
| 502 | |
| 503 void dump() const; | |
| 504 void dump( const Node *n ) const; | |
| 505 void dump( const Block * b ) const; | |
| 506 void dump_degree_lists() const; | |
| 507 void dump_simplified() const; | |
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508 void dump_lrg( uint lidx, bool defs_only) const; |
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509 void dump_lrg( uint lidx) const { |
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510 // dump defs and uses by default |
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511 dump_lrg(lidx, false); |
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512 } |
| 0 | 513 void dump_bb( uint pre_order ) const; |
| 514 | |
| 515 // Verify that base pointers and derived pointers are still sane | |
| 516 void verify_base_ptrs( ResourceArea *a ) const; | |
| 517 | |
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518 void verify( ResourceArea *a, bool verify_ifg = false ) const; |
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519 |
| 0 | 520 void dump_for_spill_split_recycle() const; |
| 521 | |
| 522 public: | |
| 523 void dump_frame() const; | |
| 524 char *dump_register( const Node *n, char *buf ) const; | |
| 525 private: | |
| 526 static void print_chaitin_statistics(); | |
| 527 #endif | |
| 528 friend class PhaseCoalesce; | |
| 529 friend class PhaseAggressiveCoalesce; | |
| 530 friend class PhaseConservativeCoalesce; | |
| 531 }; | |
| 1972 | 532 |
| 533 #endif // SHARE_VM_OPTO_CHAITIN_HPP |