Mercurial > hg > graal-compiler
annotate src/cpu/x86/vm/sharedRuntime_x86_32.cpp @ 6808:2dd08e86a2bf
Added tag jdk8-b58 for changeset 6bb378c50828
author | katleman |
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date | Thu, 27 Sep 2012 11:24:35 -0700 |
parents | 8a02ca5e5576 |
children | 2cb2f30450c7 |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "asm/assembler.hpp" | |
27 #include "assembler_x86.inline.hpp" | |
28 #include "code/debugInfoRec.hpp" | |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
0 | 43 |
44 #define __ masm-> | |
45 | |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
0 | 48 class RegisterSaver { |
49 enum { FPU_regs_live = 8 /*for the FPU stack*/+8/*eight more for XMM registers*/ }; | |
50 // Capture info about frame layout | |
51 enum layout { | |
52 fpu_state_off = 0, | |
53 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1, | |
54 st0_off, st0H_off, | |
55 st1_off, st1H_off, | |
56 st2_off, st2H_off, | |
57 st3_off, st3H_off, | |
58 st4_off, st4H_off, | |
59 st5_off, st5H_off, | |
60 st6_off, st6H_off, | |
61 st7_off, st7H_off, | |
62 | |
63 xmm0_off, xmm0H_off, | |
64 xmm1_off, xmm1H_off, | |
65 xmm2_off, xmm2H_off, | |
66 xmm3_off, xmm3H_off, | |
67 xmm4_off, xmm4H_off, | |
68 xmm5_off, xmm5H_off, | |
69 xmm6_off, xmm6H_off, | |
70 xmm7_off, xmm7H_off, | |
71 flags_off, | |
72 rdi_off, | |
73 rsi_off, | |
74 ignore_off, // extra copy of rbp, | |
75 rsp_off, | |
76 rbx_off, | |
77 rdx_off, | |
78 rcx_off, | |
79 rax_off, | |
80 // The frame sender code expects that rbp will be in the "natural" place and | |
81 // will override any oopMap setting for it. We must therefore force the layout | |
82 // so that it agrees with the frame sender code. | |
83 rbp_off, | |
84 return_off, // slot for return address | |
85 reg_save_size }; | |
86 | |
87 | |
88 public: | |
89 | |
90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
91 int* total_frame_words, bool verify_fpu = true); | |
92 static void restore_live_registers(MacroAssembler* masm); | |
93 | |
94 static int rax_offset() { return rax_off; } | |
95 static int rbx_offset() { return rbx_off; } | |
96 | |
97 // Offsets into the register save area | |
98 // Used by deoptimization when it is managing result register | |
99 // values on its own | |
100 | |
101 static int raxOffset(void) { return rax_off; } | |
102 static int rdxOffset(void) { return rdx_off; } | |
103 static int rbxOffset(void) { return rbx_off; } | |
104 static int xmm0Offset(void) { return xmm0_off; } | |
105 // This really returns a slot in the fp save area, which one is not important | |
106 static int fpResultOffset(void) { return st0_off; } | |
107 | |
108 // During deoptimization only the result register need to be restored | |
109 // all the other values have already been extracted. | |
110 | |
111 static void restore_result_registers(MacroAssembler* masm); | |
112 | |
113 }; | |
114 | |
115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
116 int* total_frame_words, bool verify_fpu) { | |
117 | |
118 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; | |
119 int frame_words = frame_size_in_bytes / wordSize; | |
120 *total_frame_words = frame_words; | |
121 | |
122 assert(FPUStateSizeInWords == 27, "update stack layout"); | |
123 | |
124 // save registers, fpu state, and flags | |
125 // We assume caller has already has return address slot on the stack | |
126 // We push epb twice in this sequence because we want the real rbp, | |
304 | 127 // to be under the return like a normal enter and we want to use pusha |
0 | 128 // We push by hand instead of pusing push |
129 __ enter(); | |
304 | 130 __ pusha(); |
131 __ pushf(); | |
132 __ subptr(rsp,FPU_regs_live*sizeof(jdouble)); // Push FPU registers space | |
0 | 133 __ push_FPU_state(); // Save FPU state & init |
134 | |
135 if (verify_fpu) { | |
136 // Some stubs may have non standard FPU control word settings so | |
137 // only check and reset the value when it required to be the | |
138 // standard value. The safepoint blob in particular can be used | |
139 // in methods which are using the 24 bit control word for | |
140 // optimized float math. | |
141 | |
142 #ifdef ASSERT | |
143 // Make sure the control word has the expected value | |
144 Label ok; | |
145 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
146 __ jccb(Assembler::equal, ok); | |
147 __ stop("corrupted control word detected"); | |
148 __ bind(ok); | |
149 #endif | |
150 | |
151 // Reset the control word to guard against exceptions being unmasked | |
152 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
153 // into the on stack copy and then reload that to make sure that the | |
154 // current and future values are correct. | |
155 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
156 } | |
157 | |
158 __ frstor(Address(rsp, 0)); | |
159 if (!verify_fpu) { | |
160 // Set the control word so that exceptions are masked for the | |
161 // following code. | |
162 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
163 } | |
164 | |
165 // Save the FPU registers in de-opt-able form | |
166 | |
167 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0) | |
168 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1) | |
169 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2) | |
170 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3) | |
171 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4) | |
172 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5) | |
173 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6) | |
174 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7) | |
175 | |
176 if( UseSSE == 1 ) { // Save the XMM state | |
177 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0); | |
178 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1); | |
179 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2); | |
180 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3); | |
181 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4); | |
182 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5); | |
183 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6); | |
184 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7); | |
185 } else if( UseSSE >= 2 ) { | |
186 __ movdbl(Address(rsp,xmm0_off*wordSize),xmm0); | |
187 __ movdbl(Address(rsp,xmm1_off*wordSize),xmm1); | |
188 __ movdbl(Address(rsp,xmm2_off*wordSize),xmm2); | |
189 __ movdbl(Address(rsp,xmm3_off*wordSize),xmm3); | |
190 __ movdbl(Address(rsp,xmm4_off*wordSize),xmm4); | |
191 __ movdbl(Address(rsp,xmm5_off*wordSize),xmm5); | |
192 __ movdbl(Address(rsp,xmm6_off*wordSize),xmm6); | |
193 __ movdbl(Address(rsp,xmm7_off*wordSize),xmm7); | |
194 } | |
195 | |
196 // Set an oopmap for the call site. This oopmap will map all | |
197 // oop-registers and debug-info registers as callee-saved. This | |
198 // will allow deoptimization at this safepoint to find all possible | |
199 // debug-info recordings, as well as let GC find all oops. | |
200 | |
201 OopMapSet *oop_maps = new OopMapSet(); | |
202 OopMap* map = new OopMap( frame_words, 0 ); | |
203 | |
204 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) | |
205 | |
206 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg()); | |
207 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg()); | |
208 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg()); | |
209 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg()); | |
210 // rbp, location is known implicitly, no oopMap | |
211 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg()); | |
212 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg()); | |
213 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg()); | |
214 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg()); | |
215 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg()); | |
216 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg()); | |
217 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg()); | |
218 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg()); | |
219 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg()); | |
220 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg()); | |
221 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg()); | |
222 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg()); | |
223 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg()); | |
224 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg()); | |
225 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg()); | |
226 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg()); | |
227 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg()); | |
228 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg()); | |
229 // %%% This is really a waste but we'll keep things as they were for now | |
230 if (true) { | |
231 #define NEXTREG(x) (x)->as_VMReg()->next() | |
232 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0))); | |
233 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1))); | |
234 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2))); | |
235 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3))); | |
236 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4))); | |
237 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5))); | |
238 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6))); | |
239 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7))); | |
240 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0)); | |
241 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1)); | |
242 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2)); | |
243 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3)); | |
244 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4)); | |
245 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5)); | |
246 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6)); | |
247 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7)); | |
248 #undef NEXTREG | |
249 #undef STACK_OFFSET | |
250 } | |
251 | |
252 return map; | |
253 | |
254 } | |
255 | |
256 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
257 | |
258 // Recover XMM & FPU state | |
259 if( UseSSE == 1 ) { | |
260 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize)); | |
261 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize)); | |
262 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize)); | |
263 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize)); | |
264 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize)); | |
265 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize)); | |
266 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize)); | |
267 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize)); | |
268 } else if( UseSSE >= 2 ) { | |
269 __ movdbl(xmm0,Address(rsp,xmm0_off*wordSize)); | |
270 __ movdbl(xmm1,Address(rsp,xmm1_off*wordSize)); | |
271 __ movdbl(xmm2,Address(rsp,xmm2_off*wordSize)); | |
272 __ movdbl(xmm3,Address(rsp,xmm3_off*wordSize)); | |
273 __ movdbl(xmm4,Address(rsp,xmm4_off*wordSize)); | |
274 __ movdbl(xmm5,Address(rsp,xmm5_off*wordSize)); | |
275 __ movdbl(xmm6,Address(rsp,xmm6_off*wordSize)); | |
276 __ movdbl(xmm7,Address(rsp,xmm7_off*wordSize)); | |
277 } | |
278 __ pop_FPU_state(); | |
304 | 279 __ addptr(rsp, FPU_regs_live*sizeof(jdouble)); // Pop FPU registers |
280 | |
281 __ popf(); | |
282 __ popa(); | |
0 | 283 // Get the rbp, described implicitly by the frame sender code (no oopMap) |
304 | 284 __ pop(rbp); |
0 | 285 |
286 } | |
287 | |
288 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
289 | |
290 // Just restore result register. Only used by deoptimization. By | |
291 // now any callee save register that needs to be restore to a c2 | |
292 // caller of the deoptee has been extracted into the vframeArray | |
293 // and will be stuffed into the c2i adapter we create for later | |
294 // restoration so only result registers need to be restored here. | |
295 // | |
296 | |
297 __ frstor(Address(rsp, 0)); // Restore fpu state | |
298 | |
299 // Recover XMM & FPU state | |
300 if( UseSSE == 1 ) { | |
301 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); | |
302 } else if( UseSSE >= 2 ) { | |
303 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); | |
304 } | |
304 | 305 __ movptr(rax, Address(rsp, rax_off*wordSize)); |
306 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); | |
0 | 307 // Pop all of the register save are off the stack except the return address |
304 | 308 __ addptr(rsp, return_off * wordSize); |
0 | 309 } |
310 | |
311 // The java_calling_convention describes stack locations as ideal slots on | |
312 // a frame with no abi restrictions. Since we must observe abi restrictions | |
313 // (like the placement of the register window) the slots must be biased by | |
314 // the following value. | |
315 static int reg2offset_in(VMReg r) { | |
316 // Account for saved rbp, and return address | |
317 // This should really be in_preserve_stack_slots | |
318 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; | |
319 } | |
320 | |
321 static int reg2offset_out(VMReg r) { | |
322 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
323 } | |
324 | |
325 // --------------------------------------------------------------------------- | |
326 // Read the array of BasicTypes from a signature, and compute where the | |
327 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
328 // quantities. Values less than SharedInfo::stack0 are registers, those above | |
329 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
330 // as framesizes are fixed. | |
331 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
332 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
333 // up to RegisterImpl::number_of_registers) are the 32-bit | |
334 // integer registers. | |
335 | |
336 // Pass first two oop/int args in registers ECX and EDX. | |
337 // Pass first two float/double args in registers XMM0 and XMM1. | |
338 // Doubles have precedence, so if you pass a mix of floats and doubles | |
339 // the doubles will grab the registers before the floats will. | |
340 | |
341 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
342 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
343 // units regardless of build. Of course for i486 there is no 64 bit build | |
344 | |
345 | |
346 // --------------------------------------------------------------------------- | |
347 // The compiled Java calling convention. | |
348 // Pass first two oop/int args in registers ECX and EDX. | |
349 // Pass first two float/double args in registers XMM0 and XMM1. | |
350 // Doubles have precedence, so if you pass a mix of floats and doubles | |
351 // the doubles will grab the registers before the floats will. | |
352 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
353 VMRegPair *regs, | |
354 int total_args_passed, | |
355 int is_outgoing) { | |
356 uint stack = 0; // Starting stack position for args on stack | |
357 | |
358 | |
359 // Pass first two oop/int args in registers ECX and EDX. | |
360 uint reg_arg0 = 9999; | |
361 uint reg_arg1 = 9999; | |
362 | |
363 // Pass first two float/double args in registers XMM0 and XMM1. | |
364 // Doubles have precedence, so if you pass a mix of floats and doubles | |
365 // the doubles will grab the registers before the floats will. | |
366 // CNC - TURNED OFF FOR non-SSE. | |
367 // On Intel we have to round all doubles (and most floats) at | |
368 // call sites by storing to the stack in any case. | |
369 // UseSSE=0 ==> Don't Use ==> 9999+0 | |
370 // UseSSE=1 ==> Floats only ==> 9999+1 | |
371 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 | |
372 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; | |
373 uint fargs = (UseSSE>=2) ? 2 : UseSSE; | |
374 uint freg_arg0 = 9999+fargs; | |
375 uint freg_arg1 = 9999+fargs; | |
376 | |
377 // Pass doubles & longs aligned on the stack. First count stack slots for doubles | |
378 int i; | |
379 for( i = 0; i < total_args_passed; i++) { | |
380 if( sig_bt[i] == T_DOUBLE ) { | |
381 // first 2 doubles go in registers | |
382 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; | |
383 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; | |
384 else // Else double is passed low on the stack to be aligned. | |
385 stack += 2; | |
386 } else if( sig_bt[i] == T_LONG ) { | |
387 stack += 2; | |
388 } | |
389 } | |
390 int dstack = 0; // Separate counter for placing doubles | |
391 | |
392 // Now pick where all else goes. | |
393 for( i = 0; i < total_args_passed; i++) { | |
394 // From the type and the argument number (count) compute the location | |
395 switch( sig_bt[i] ) { | |
396 case T_SHORT: | |
397 case T_CHAR: | |
398 case T_BYTE: | |
399 case T_BOOLEAN: | |
400 case T_INT: | |
401 case T_ARRAY: | |
402 case T_OBJECT: | |
403 case T_ADDRESS: | |
404 if( reg_arg0 == 9999 ) { | |
405 reg_arg0 = i; | |
406 regs[i].set1(rcx->as_VMReg()); | |
407 } else if( reg_arg1 == 9999 ) { | |
408 reg_arg1 = i; | |
409 regs[i].set1(rdx->as_VMReg()); | |
410 } else { | |
411 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
412 } | |
413 break; | |
414 case T_FLOAT: | |
415 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { | |
416 freg_arg0 = i; | |
417 regs[i].set1(xmm0->as_VMReg()); | |
418 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { | |
419 freg_arg1 = i; | |
420 regs[i].set1(xmm1->as_VMReg()); | |
421 } else { | |
422 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
423 } | |
424 break; | |
425 case T_LONG: | |
426 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
427 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
428 dstack += 2; | |
429 break; | |
430 case T_DOUBLE: | |
431 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
432 if( freg_arg0 == (uint)i ) { | |
433 regs[i].set2(xmm0->as_VMReg()); | |
434 } else if( freg_arg1 == (uint)i ) { | |
435 regs[i].set2(xmm1->as_VMReg()); | |
436 } else { | |
437 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
438 dstack += 2; | |
439 } | |
440 break; | |
441 case T_VOID: regs[i].set_bad(); break; | |
442 break; | |
443 default: | |
444 ShouldNotReachHere(); | |
445 break; | |
446 } | |
447 } | |
448 | |
449 // return value can be odd number of VMRegImpl stack slots make multiple of 2 | |
450 return round_to(stack, 2); | |
451 } | |
452 | |
453 // Patch the callers callsite with entry to compiled code if it exists. | |
454 static void patch_callers_callsite(MacroAssembler *masm) { | |
455 Label L; | |
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456 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 457 __ jcc(Assembler::equal, L); |
458 // Schedule the branch target address early. | |
459 // Call into the VM to patch the caller, then jump to compiled callee | |
460 // rax, isn't live so capture return address while we easily can | |
304 | 461 __ movptr(rax, Address(rsp, 0)); |
462 __ pusha(); | |
463 __ pushf(); | |
0 | 464 |
465 if (UseSSE == 1) { | |
304 | 466 __ subptr(rsp, 2*wordSize); |
0 | 467 __ movflt(Address(rsp, 0), xmm0); |
468 __ movflt(Address(rsp, wordSize), xmm1); | |
469 } | |
470 if (UseSSE >= 2) { | |
304 | 471 __ subptr(rsp, 4*wordSize); |
0 | 472 __ movdbl(Address(rsp, 0), xmm0); |
473 __ movdbl(Address(rsp, 2*wordSize), xmm1); | |
474 } | |
475 #ifdef COMPILER2 | |
476 // C2 may leave the stack dirty if not in SSE2+ mode | |
477 if (UseSSE >= 2) { | |
478 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
479 } else { | |
480 __ empty_FPU_stack(); | |
481 } | |
482 #endif /* COMPILER2 */ | |
483 | |
484 // VM needs caller's callsite | |
304 | 485 __ push(rax); |
0 | 486 // VM needs target method |
304 | 487 __ push(rbx); |
0 | 488 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
304 | 489 __ addptr(rsp, 2*wordSize); |
0 | 490 |
491 if (UseSSE == 1) { | |
492 __ movflt(xmm0, Address(rsp, 0)); | |
493 __ movflt(xmm1, Address(rsp, wordSize)); | |
304 | 494 __ addptr(rsp, 2*wordSize); |
0 | 495 } |
496 if (UseSSE >= 2) { | |
497 __ movdbl(xmm0, Address(rsp, 0)); | |
498 __ movdbl(xmm1, Address(rsp, 2*wordSize)); | |
304 | 499 __ addptr(rsp, 4*wordSize); |
0 | 500 } |
501 | |
304 | 502 __ popf(); |
503 __ popa(); | |
0 | 504 __ bind(L); |
505 } | |
506 | |
507 | |
508 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { | |
1506 | 509 int next_off = st_off - Interpreter::stackElementSize; |
510 __ movdbl(Address(rsp, next_off), r); | |
0 | 511 } |
512 | |
513 static void gen_c2i_adapter(MacroAssembler *masm, | |
514 int total_args_passed, | |
515 int comp_args_on_stack, | |
516 const BasicType *sig_bt, | |
517 const VMRegPair *regs, | |
518 Label& skip_fixup) { | |
519 // Before we get into the guts of the C2I adapter, see if we should be here | |
520 // at all. We've come from compiled code and are attempting to jump to the | |
521 // interpreter, which means the caller made a static call to get here | |
522 // (vcalls always get a compiled target if there is one). Check for a | |
523 // compiled target. If there is one, we need to patch the caller's call. | |
524 patch_callers_callsite(masm); | |
525 | |
526 __ bind(skip_fixup); | |
527 | |
528 #ifdef COMPILER2 | |
529 // C2 may leave the stack dirty if not in SSE2+ mode | |
530 if (UseSSE >= 2) { | |
531 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
532 } else { | |
533 __ empty_FPU_stack(); | |
534 } | |
535 #endif /* COMPILER2 */ | |
536 | |
537 // Since all args are passed on the stack, total_args_passed * interpreter_ | |
538 // stack_element_size is the | |
539 // space we need. | |
1506 | 540 int extraspace = total_args_passed * Interpreter::stackElementSize; |
0 | 541 |
542 // Get return address | |
304 | 543 __ pop(rax); |
0 | 544 |
545 // set senderSP value | |
304 | 546 __ movptr(rsi, rsp); |
547 | |
548 __ subptr(rsp, extraspace); | |
0 | 549 |
550 // Now write the args into the outgoing interpreter space | |
551 for (int i = 0; i < total_args_passed; i++) { | |
552 if (sig_bt[i] == T_VOID) { | |
553 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
554 continue; | |
555 } | |
556 | |
557 // st_off points to lowest address on stack. | |
1506 | 558 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; |
559 int next_off = st_off - Interpreter::stackElementSize; | |
304 | 560 |
0 | 561 // Say 4 args: |
562 // i st_off | |
563 // 0 12 T_LONG | |
564 // 1 8 T_VOID | |
565 // 2 4 T_OBJECT | |
566 // 3 0 T_BOOL | |
567 VMReg r_1 = regs[i].first(); | |
568 VMReg r_2 = regs[i].second(); | |
569 if (!r_1->is_valid()) { | |
570 assert(!r_2->is_valid(), ""); | |
571 continue; | |
572 } | |
573 | |
574 if (r_1->is_stack()) { | |
575 // memory to memory use fpu stack top | |
576 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
577 | |
578 if (!r_2->is_valid()) { | |
579 __ movl(rdi, Address(rsp, ld_off)); | |
304 | 580 __ movptr(Address(rsp, st_off), rdi); |
0 | 581 } else { |
582 | |
583 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW | |
584 // st_off == MSW, st_off-wordSize == LSW | |
585 | |
304 | 586 __ movptr(rdi, Address(rsp, ld_off)); |
587 __ movptr(Address(rsp, next_off), rdi); | |
588 #ifndef _LP64 | |
589 __ movptr(rdi, Address(rsp, ld_off + wordSize)); | |
590 __ movptr(Address(rsp, st_off), rdi); | |
591 #else | |
592 #ifdef ASSERT | |
593 // Overwrite the unused slot with known junk | |
594 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
595 __ movptr(Address(rsp, st_off), rax); | |
596 #endif /* ASSERT */ | |
597 #endif // _LP64 | |
0 | 598 } |
599 } else if (r_1->is_Register()) { | |
600 Register r = r_1->as_Register(); | |
601 if (!r_2->is_valid()) { | |
602 __ movl(Address(rsp, st_off), r); | |
603 } else { | |
604 // long/double in gpr | |
304 | 605 NOT_LP64(ShouldNotReachHere()); |
606 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
607 // T_DOUBLE and T_LONG use two slots in the interpreter | |
608 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
609 // long/double in gpr | |
610 #ifdef ASSERT | |
611 // Overwrite the unused slot with known junk | |
612 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab))); | |
613 __ movptr(Address(rsp, st_off), rax); | |
614 #endif /* ASSERT */ | |
615 __ movptr(Address(rsp, next_off), r); | |
616 } else { | |
617 __ movptr(Address(rsp, st_off), r); | |
618 } | |
0 | 619 } |
620 } else { | |
621 assert(r_1->is_XMMRegister(), ""); | |
622 if (!r_2->is_valid()) { | |
623 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
624 } else { | |
625 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); | |
626 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); | |
627 } | |
628 } | |
629 } | |
630 | |
631 // Schedule the branch target address early. | |
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632 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
0 | 633 // And repush original return address |
304 | 634 __ push(rax); |
0 | 635 __ jmp(rcx); |
636 } | |
637 | |
638 | |
639 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { | |
1506 | 640 int next_val_off = ld_off - Interpreter::stackElementSize; |
641 __ movdbl(r, Address(saved_sp, next_val_off)); | |
0 | 642 } |
643 | |
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644 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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645 address code_start, address code_end, |
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646 Label& L_ok) { |
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647 Label L_fail; |
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648 __ lea(temp_reg, ExternalAddress(code_start)); |
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649 __ cmpptr(pc_reg, temp_reg); |
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650 __ jcc(Assembler::belowEqual, L_fail); |
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651 __ lea(temp_reg, ExternalAddress(code_end)); |
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652 __ cmpptr(pc_reg, temp_reg); |
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653 __ jcc(Assembler::below, L_ok); |
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654 __ bind(L_fail); |
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655 } |
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656 |
0 | 657 static void gen_i2c_adapter(MacroAssembler *masm, |
658 int total_args_passed, | |
659 int comp_args_on_stack, | |
660 const BasicType *sig_bt, | |
661 const VMRegPair *regs) { | |
662 | |
663 // Note: rsi contains the senderSP on entry. We must preserve it since | |
664 // we may do a i2c -> c2i transition if we lose a race where compiled | |
665 // code goes non-entrant while we get args ready. | |
666 | |
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667 // Adapters can be frameless because they do not require the caller |
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668 // to perform additional cleanup work, such as correcting the stack pointer. |
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669 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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670 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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671 // even if a callee has modified the stack pointer. |
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672 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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673 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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674 // up via the senderSP register). |
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675 // In other words, if *either* the caller or callee is interpreted, we can |
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676 // get the stack pointer repaired after a call. |
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677 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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678 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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679 // both caller and callee would be compiled methods, and neither would |
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680 // clean up the stack pointer changes performed by the two adapters. |
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681 // If this happens, control eventually transfers back to the compiled |
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682 // caller, but with an uncorrected stack, causing delayed havoc. |
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683 |
0 | 684 // Pick up the return address |
304 | 685 __ movptr(rax, Address(rsp, 0)); |
0 | 686 |
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687 if (VerifyAdapterCalls && |
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688 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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689 // So, let's test for cascading c2i/i2c adapters right now. |
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690 // assert(Interpreter::contains($return_addr) || |
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691 // StubRoutines::contains($return_addr), |
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692 // "i2c adapter must return to an interpreter frame"); |
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693 __ block_comment("verify_i2c { "); |
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694 Label L_ok; |
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695 if (Interpreter::code() != NULL) |
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696 range_check(masm, rax, rdi, |
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697 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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698 L_ok); |
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699 if (StubRoutines::code1() != NULL) |
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700 range_check(masm, rax, rdi, |
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701 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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702 L_ok); |
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703 if (StubRoutines::code2() != NULL) |
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704 range_check(masm, rax, rdi, |
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705 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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706 L_ok); |
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707 const char* msg = "i2c adapter must return to an interpreter frame"; |
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708 __ block_comment(msg); |
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709 __ stop(msg); |
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710 __ bind(L_ok); |
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711 __ block_comment("} verify_i2ce "); |
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712 } |
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713 |
0 | 714 // Must preserve original SP for loading incoming arguments because |
715 // we need to align the outgoing SP for compiled code. | |
304 | 716 __ movptr(rdi, rsp); |
0 | 717 |
718 // Cut-out for having no stack args. Since up to 2 int/oop args are passed | |
719 // in registers, we will occasionally have no stack args. | |
720 int comp_words_on_stack = 0; | |
721 if (comp_args_on_stack) { | |
722 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
723 // registers are below. By subtracting stack0, we either get a negative | |
724 // number (all values in registers) or the maximum stack slot accessed. | |
725 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); | |
726 // Convert 4-byte stack slots to words. | |
727 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; | |
728 // Round up to miminum stack alignment, in wordSize | |
729 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 730 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 731 } |
732 | |
733 // Align the outgoing SP | |
304 | 734 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 735 |
736 // push the return address on the stack (note that pushing, rather | |
737 // than storing it, yields the correct frame alignment for the callee) | |
304 | 738 __ push(rax); |
0 | 739 |
740 // Put saved SP in another register | |
741 const Register saved_sp = rax; | |
304 | 742 __ movptr(saved_sp, rdi); |
0 | 743 |
744 | |
745 // Will jump to the compiled code just as if compiled code was doing it. | |
746 // Pre-load the register-jump target early, to schedule it better. | |
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747 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
0 | 748 |
749 // Now generate the shuffle code. Pick up all register args and move the | |
750 // rest through the floating point stack top. | |
751 for (int i = 0; i < total_args_passed; i++) { | |
752 if (sig_bt[i] == T_VOID) { | |
753 // Longs and doubles are passed in native word order, but misaligned | |
754 // in the 32-bit build. | |
755 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
756 continue; | |
757 } | |
758 | |
759 // Pick up 0, 1 or 2 words from SP+offset. | |
760 | |
761 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
762 "scrambled load targets?"); | |
763 // Load in argument order going down. | |
1506 | 764 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; |
0 | 765 // Point to interpreter value (vs. tag) |
1506 | 766 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 767 // |
768 // | |
769 // | |
770 VMReg r_1 = regs[i].first(); | |
771 VMReg r_2 = regs[i].second(); | |
772 if (!r_1->is_valid()) { | |
773 assert(!r_2->is_valid(), ""); | |
774 continue; | |
775 } | |
776 if (r_1->is_stack()) { | |
777 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
778 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
779 | |
780 // We can use rsi as a temp here because compiled code doesn't need rsi as an input | |
781 // and if we end up going thru a c2i because of a miss a reasonable value of rsi | |
782 // we be generated. | |
783 if (!r_2->is_valid()) { | |
784 // __ fld_s(Address(saved_sp, ld_off)); | |
785 // __ fstp_s(Address(rsp, st_off)); | |
786 __ movl(rsi, Address(saved_sp, ld_off)); | |
304 | 787 __ movptr(Address(rsp, st_off), rsi); |
0 | 788 } else { |
789 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
790 // are accessed as negative so LSW is at LOW address | |
791 | |
792 // ld_off is MSW so get LSW | |
793 // st_off is LSW (i.e. reg.first()) | |
794 // __ fld_d(Address(saved_sp, next_off)); | |
795 // __ fstp_d(Address(rsp, st_off)); | |
304 | 796 // |
797 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
798 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
799 // So we must adjust where to pick up the data to match the interpreter. | |
800 // | |
801 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
802 // are accessed as negative so LSW is at LOW address | |
803 | |
804 // ld_off is MSW so get LSW | |
805 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
806 next_off : ld_off; | |
807 __ movptr(rsi, Address(saved_sp, offset)); | |
808 __ movptr(Address(rsp, st_off), rsi); | |
809 #ifndef _LP64 | |
810 __ movptr(rsi, Address(saved_sp, ld_off)); | |
811 __ movptr(Address(rsp, st_off + wordSize), rsi); | |
812 #endif // _LP64 | |
0 | 813 } |
814 } else if (r_1->is_Register()) { // Register argument | |
815 Register r = r_1->as_Register(); | |
816 assert(r != rax, "must be different"); | |
817 if (r_2->is_valid()) { | |
304 | 818 // |
819 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
820 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
821 // So we must adjust where to pick up the data to match the interpreter. | |
822 | |
823 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
824 next_off : ld_off; | |
825 | |
826 // this can be a misaligned move | |
827 __ movptr(r, Address(saved_sp, offset)); | |
828 #ifndef _LP64 | |
0 | 829 assert(r_2->as_Register() != rax, "need another temporary register"); |
830 // Remember r_1 is low address (and LSB on x86) | |
831 // So r_2 gets loaded from high address regardless of the platform | |
304 | 832 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); |
833 #endif // _LP64 | |
0 | 834 } else { |
835 __ movl(r, Address(saved_sp, ld_off)); | |
836 } | |
837 } else { | |
838 assert(r_1->is_XMMRegister(), ""); | |
839 if (!r_2->is_valid()) { | |
840 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); | |
841 } else { | |
842 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); | |
843 } | |
844 } | |
845 } | |
846 | |
847 // 6243940 We might end up in handle_wrong_method if | |
848 // the callee is deoptimized as we race thru here. If that | |
849 // happens we don't want to take a safepoint because the | |
850 // caller frame will look interpreted and arguments are now | |
851 // "compiled" so it is much better to make this transition | |
852 // invisible to the stack walking code. Unfortunately if | |
853 // we try and find the callee by normal means a safepoint | |
854 // is possible. So we stash the desired callee in the thread | |
855 // and the vm will find there should this case occur. | |
856 | |
857 __ get_thread(rax); | |
304 | 858 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); |
0 | 859 |
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860 // move Method* to rax, in case we end up in an c2i adapter. |
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861 // the c2i adapters expect Method* in rax, (c2) because c2's |
0 | 862 // resolve stubs return the result (the method) in rax,. |
863 // I'd love to fix this. | |
304 | 864 __ mov(rax, rbx); |
0 | 865 |
866 __ jmp(rdi); | |
867 } | |
868 | |
869 // --------------------------------------------------------------- | |
870 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
871 int total_args_passed, | |
872 int comp_args_on_stack, | |
873 const BasicType *sig_bt, | |
1187
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874 const VMRegPair *regs, |
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875 AdapterFingerPrint* fingerprint) { |
0 | 876 address i2c_entry = __ pc(); |
877 | |
878 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
879 | |
880 // ------------------------------------------------------------------------- | |
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881 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls |
0 | 882 // to the interpreter. The args start out packed in the compiled layout. They |
883 // need to be unpacked into the interpreter layout. This will almost always | |
884 // require some stack space. We grow the current (compiled) stack, then repack | |
885 // the args. We finally end in a jump to the generic interpreter entry point. | |
886 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
887 // compiled code, which relys solely on SP and not EBP, get sick). | |
888 | |
889 address c2i_unverified_entry = __ pc(); | |
890 Label skip_fixup; | |
891 | |
892 Register holder = rax; | |
893 Register receiver = rcx; | |
894 Register temp = rbx; | |
895 | |
896 { | |
897 | |
898 Label missed; | |
304 | 899 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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900 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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901 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
0 | 902 __ jcc(Assembler::notEqual, missed); |
903 // Method might have been compiled since the call site was patched to | |
904 // interpreted if that is the case treat it as a miss so we can get | |
905 // the call site corrected. | |
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906 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 907 __ jcc(Assembler::equal, skip_fixup); |
908 | |
909 __ bind(missed); | |
910 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
911 } | |
912 | |
913 address c2i_entry = __ pc(); | |
914 | |
915 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
916 | |
917 __ flush(); | |
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918 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 919 } |
920 | |
921 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
922 VMRegPair *regs, | |
923 int total_args_passed) { | |
924 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
925 // the arguments NOT counting out_preserve_stack_slots. | |
926 | |
927 uint stack = 0; // All arguments on stack | |
928 | |
929 for( int i = 0; i < total_args_passed; i++) { | |
930 // From the type and the argument number (count) compute the location | |
931 switch( sig_bt[i] ) { | |
932 case T_BOOLEAN: | |
933 case T_CHAR: | |
934 case T_FLOAT: | |
935 case T_BYTE: | |
936 case T_SHORT: | |
937 case T_INT: | |
938 case T_OBJECT: | |
939 case T_ARRAY: | |
940 case T_ADDRESS: | |
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941 case T_METADATA: |
0 | 942 regs[i].set1(VMRegImpl::stack2reg(stack++)); |
943 break; | |
944 case T_LONG: | |
945 case T_DOUBLE: // The stack numbering is reversed from Java | |
946 // Since C arguments do not get reversed, the ordering for | |
947 // doubles on the stack must be opposite the Java convention | |
948 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
949 regs[i].set2(VMRegImpl::stack2reg(stack)); | |
950 stack += 2; | |
951 break; | |
952 case T_VOID: regs[i].set_bad(); break; | |
953 default: | |
954 ShouldNotReachHere(); | |
955 break; | |
956 } | |
957 } | |
958 return stack; | |
959 } | |
960 | |
961 // A simple move of integer like type | |
962 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
963 if (src.first()->is_stack()) { | |
964 if (dst.first()->is_stack()) { | |
965 // stack to stack | |
966 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
967 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
304 | 968 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); |
969 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
0 | 970 } else { |
971 // stack to reg | |
304 | 972 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
0 | 973 } |
974 } else if (dst.first()->is_stack()) { | |
975 // reg to stack | |
304 | 976 // no need to sign extend on 64bit |
977 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
0 | 978 } else { |
304 | 979 if (dst.first() != src.first()) { |
980 __ mov(dst.first()->as_Register(), src.first()->as_Register()); | |
981 } | |
0 | 982 } |
983 } | |
984 | |
985 // An oop arg. Must pass a handle not the oop itself | |
986 static void object_move(MacroAssembler* masm, | |
987 OopMap* map, | |
988 int oop_handle_offset, | |
989 int framesize_in_slots, | |
990 VMRegPair src, | |
991 VMRegPair dst, | |
992 bool is_receiver, | |
993 int* receiver_offset) { | |
994 | |
995 // Because of the calling conventions we know that src can be a | |
996 // register or a stack location. dst can only be a stack location. | |
997 | |
998 assert(dst.first()->is_stack(), "must be stack"); | |
999 // must pass a handle. First figure out the location we use as a handle | |
1000 | |
1001 if (src.first()->is_stack()) { | |
1002 // Oop is already on the stack as an argument | |
1003 Register rHandle = rax; | |
1004 Label nil; | |
304 | 1005 __ xorptr(rHandle, rHandle); |
1006 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); | |
0 | 1007 __ jcc(Assembler::equal, nil); |
304 | 1008 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 1009 __ bind(nil); |
304 | 1010 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1011 |
1012 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1013 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1014 if (is_receiver) { | |
1015 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1016 } | |
1017 } else { | |
1018 // Oop is in an a register we must store it to the space we reserve | |
1019 // on the stack for oop_handles | |
1020 const Register rOop = src.first()->as_Register(); | |
1021 const Register rHandle = rax; | |
1022 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; | |
1023 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1024 Label skip; | |
304 | 1025 __ movptr(Address(rsp, offset), rOop); |
0 | 1026 map->set_oop(VMRegImpl::stack2reg(oop_slot)); |
304 | 1027 __ xorptr(rHandle, rHandle); |
1028 __ cmpptr(rOop, (int32_t)NULL_WORD); | |
0 | 1029 __ jcc(Assembler::equal, skip); |
304 | 1030 __ lea(rHandle, Address(rsp, offset)); |
0 | 1031 __ bind(skip); |
1032 // Store the handle parameter | |
304 | 1033 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1034 if (is_receiver) { |
1035 *receiver_offset = offset; | |
1036 } | |
1037 } | |
1038 } | |
1039 | |
1040 // A float arg may have to do float reg int reg conversion | |
1041 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1042 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1043 | |
1044 // Because of the calling convention we know that src is either a stack location | |
1045 // or an xmm register. dst can only be a stack location. | |
1046 | |
1047 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); | |
1048 | |
1049 if (src.first()->is_stack()) { | |
1050 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1051 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1052 } else { |
1053 // reg to stack | |
1054 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1055 } | |
1056 } | |
1057 | |
1058 // A long move | |
1059 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1060 | |
1061 // The only legal possibility for a long_move VMRegPair is: | |
1062 // 1: two stack slots (possibly unaligned) | |
1063 // as neither the java or C calling convention will use registers | |
1064 // for longs. | |
1065 | |
1066 if (src.first()->is_stack() && dst.first()->is_stack()) { | |
1067 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); | |
304 | 1068 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
1069 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
1070 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
1071 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
0 | 1072 } else { |
1073 ShouldNotReachHere(); | |
1074 } | |
1075 } | |
1076 | |
1077 // A double move | |
1078 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1079 | |
1080 // The only legal possibilities for a double_move VMRegPair are: | |
1081 // The painful thing here is that like long_move a VMRegPair might be | |
1082 | |
1083 // Because of the calling convention we know that src is either | |
1084 // 1: a single physical register (xmm registers only) | |
1085 // 2: two stack slots (possibly unaligned) | |
1086 // dst can only be a pair of stack slots. | |
1087 | |
1088 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); | |
1089 | |
1090 if (src.first()->is_stack()) { | |
1091 // source is all stack | |
304 | 1092 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
1093 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
1094 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
1095 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
0 | 1096 } else { |
1097 // reg to stack | |
1098 // No worries about stack alignment | |
1099 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1100 } | |
1101 } | |
1102 | |
1103 | |
1104 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1105 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1106 // which by this time is free to use | |
1107 switch (ret_type) { | |
1108 case T_FLOAT: | |
1109 __ fstp_s(Address(rbp, -wordSize)); | |
1110 break; | |
1111 case T_DOUBLE: | |
1112 __ fstp_d(Address(rbp, -2*wordSize)); | |
1113 break; | |
1114 case T_VOID: break; | |
1115 case T_LONG: | |
304 | 1116 __ movptr(Address(rbp, -wordSize), rax); |
1117 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx)); | |
0 | 1118 break; |
1119 default: { | |
304 | 1120 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1121 } |
1122 } | |
1123 } | |
1124 | |
1125 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1126 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1127 // which by this time is free to use | |
1128 switch (ret_type) { | |
1129 case T_FLOAT: | |
1130 __ fld_s(Address(rbp, -wordSize)); | |
1131 break; | |
1132 case T_DOUBLE: | |
1133 __ fld_d(Address(rbp, -2*wordSize)); | |
1134 break; | |
1135 case T_LONG: | |
304 | 1136 __ movptr(rax, Address(rbp, -wordSize)); |
1137 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize))); | |
0 | 1138 break; |
1139 case T_VOID: break; | |
1140 default: { | |
304 | 1141 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1142 } |
1143 } | |
1144 } | |
1145 | |
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1146 |
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1147 static void save_or_restore_arguments(MacroAssembler* masm, |
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1148 const int stack_slots, |
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1149 const int total_in_args, |
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1150 const int arg_save_area, |
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1151 OopMap* map, |
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1152 VMRegPair* in_regs, |
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1153 BasicType* in_sig_bt) { |
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1154 // if map is non-NULL then the code should store the values, |
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1155 // otherwise it should load them. |
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1156 int handle_index = 0; |
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1157 // Save down double word first |
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1158 for ( int i = 0; i < total_in_args; i++) { |
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1159 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1160 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1161 int offset = slot * VMRegImpl::stack_slot_size; |
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1162 handle_index += 2; |
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1163 assert(handle_index <= stack_slots, "overflow"); |
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1164 if (map != NULL) { |
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1165 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1166 } else { |
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1167 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1168 } |
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1169 } |
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1170 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) { |
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1171 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1172 int offset = slot * VMRegImpl::stack_slot_size; |
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1173 handle_index += 2; |
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1174 assert(handle_index <= stack_slots, "overflow"); |
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1175 if (map != NULL) { |
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1176 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1177 if (in_regs[i].second()->is_Register()) { |
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1178 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register()); |
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1179 } |
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1180 } else { |
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1181 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1182 if (in_regs[i].second()->is_Register()) { |
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1183 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4)); |
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1184 } |
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1185 } |
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1186 } |
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1187 } |
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1188 // Save or restore single word registers |
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1189 for ( int i = 0; i < total_in_args; i++) { |
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1190 if (in_regs[i].first()->is_Register()) { |
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1191 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1192 int offset = slot * VMRegImpl::stack_slot_size; |
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1193 assert(handle_index <= stack_slots, "overflow"); |
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1194 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1195 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1196 } |
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1197 |
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1198 // Value is in an input register pass we must flush it to the stack |
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1199 const Register reg = in_regs[i].first()->as_Register(); |
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1200 switch (in_sig_bt[i]) { |
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1201 case T_ARRAY: |
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1202 if (map != NULL) { |
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1203 __ movptr(Address(rsp, offset), reg); |
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1204 } else { |
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1205 __ movptr(reg, Address(rsp, offset)); |
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1206 } |
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1207 break; |
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1208 case T_BOOLEAN: |
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1209 case T_CHAR: |
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1210 case T_BYTE: |
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1211 case T_SHORT: |
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1212 case T_INT: |
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1213 if (map != NULL) { |
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1214 __ movl(Address(rsp, offset), reg); |
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1215 } else { |
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1216 __ movl(reg, Address(rsp, offset)); |
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1217 } |
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1218 break; |
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1219 case T_OBJECT: |
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1220 default: ShouldNotReachHere(); |
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1221 } |
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1222 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1223 if (in_sig_bt[i] == T_FLOAT) { |
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1224 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
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1225 int offset = slot * VMRegImpl::stack_slot_size; |
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1226 assert(handle_index <= stack_slots, "overflow"); |
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1227 if (map != NULL) { |
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1228 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1229 } else { |
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1230 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1231 } |
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1232 } |
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1233 } else if (in_regs[i].first()->is_stack()) { |
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1234 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1235 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1236 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1237 } |
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1238 } |
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|
1239 } |
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1240 } |
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|
1241 |
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1242 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1243 // keeps a new JNI critical region from starting until a GC has been |
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1244 // forced. Save down any oops in registers and describe them in an |
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1245 // OopMap. |
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|
1246 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1247 Register thread, |
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|
1248 int stack_slots, |
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1249 int total_c_args, |
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1250 int total_in_args, |
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1251 int arg_save_area, |
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1252 OopMapSet* oop_maps, |
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1253 VMRegPair* in_regs, |
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1254 BasicType* in_sig_bt) { |
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1255 __ block_comment("check GC_locker::needs_gc"); |
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|
1256 Label cont; |
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|
1257 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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|
1258 __ jcc(Assembler::equal, cont); |
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|
1259 |
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1260 // Save down any incoming oops and call into the runtime to halt for a GC |
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|
1261 |
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|
1262 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1263 |
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1264 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1265 arg_save_area, map, in_regs, in_sig_bt); |
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1266 |
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1267 address the_pc = __ pc(); |
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1268 oop_maps->add_gc_map( __ offset(), map); |
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1269 __ set_last_Java_frame(thread, rsp, noreg, the_pc); |
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|
1270 |
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|
1271 __ block_comment("block_for_jni_critical"); |
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|
1272 __ push(thread); |
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|
1273 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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|
1274 __ increment(rsp, wordSize); |
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|
1275 |
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|
1276 __ get_thread(thread); |
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|
1277 __ reset_last_Java_frame(thread, false, true); |
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|
1278 |
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|
1279 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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|
1280 arg_save_area, NULL, in_regs, in_sig_bt); |
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|
1281 |
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|
1282 __ bind(cont); |
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|
1283 #ifdef ASSERT |
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|
1284 if (StressCriticalJNINatives) { |
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|
1285 // Stress register saving |
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|
1286 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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|
1287 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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|
1288 arg_save_area, map, in_regs, in_sig_bt); |
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|
1289 // Destroy argument registers |
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|
1290 for (int i = 0; i < total_in_args - 1; i++) { |
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|
1291 if (in_regs[i].first()->is_Register()) { |
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|
1292 const Register reg = in_regs[i].first()->as_Register(); |
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|
1293 __ xorptr(reg, reg); |
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|
1294 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1295 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1296 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1297 ShouldNotReachHere(); |
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1298 } else if (in_regs[i].first()->is_stack()) { |
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1299 // Nothing to do |
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1300 } else { |
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1301 ShouldNotReachHere(); |
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1302 } |
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1303 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1304 i++; |
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1305 } |
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1306 } |
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1307 |
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1308 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1309 arg_save_area, NULL, in_regs, in_sig_bt); |
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1310 } |
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1311 #endif |
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1312 } |
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1313 |
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1314 // Unpack an array argument into a pointer to the body and the length |
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1315 // if the array is non-null, otherwise pass 0 for both. |
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1316 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1317 Register tmp_reg = rax; |
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1318 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1319 "possible collision"); |
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1320 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1321 "possible collision"); |
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1322 |
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1323 // Pass the length, ptr pair |
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1324 Label is_null, done; |
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1325 VMRegPair tmp(tmp_reg->as_VMReg()); |
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1326 if (reg.first()->is_stack()) { |
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1327 // Load the arg up from the stack |
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1328 simple_move32(masm, reg, tmp); |
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1329 reg = tmp; |
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1330 } |
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1331 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1332 __ jccb(Assembler::equal, is_null); |
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1333 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1334 simple_move32(masm, tmp, body_arg); |
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1335 // load the length relative to the body. |
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1336 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1337 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1338 simple_move32(masm, tmp, length_arg); |
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1339 __ jmpb(done); |
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1340 __ bind(is_null); |
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1341 // Pass zeros |
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1342 __ xorptr(tmp_reg, tmp_reg); |
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1343 simple_move32(masm, tmp, body_arg); |
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1344 simple_move32(masm, tmp, length_arg); |
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1345 __ bind(done); |
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1346 } |
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1347 |
6266
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1348 static void verify_oop_args(MacroAssembler* masm, |
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1349 int total_args_passed, |
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1350 const BasicType* sig_bt, |
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1351 const VMRegPair* regs) { |
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1352 Register temp_reg = rbx; // not part of any compiled calling seq |
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1353 if (VerifyOops) { |
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1354 for (int i = 0; i < total_args_passed; i++) { |
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1355 if (sig_bt[i] == T_OBJECT || |
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1356 sig_bt[i] == T_ARRAY) { |
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1357 VMReg r = regs[i].first(); |
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1358 assert(r->is_valid(), "bad oop arg"); |
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1359 if (r->is_stack()) { |
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1360 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1361 __ verify_oop(temp_reg); |
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1362 } else { |
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1363 __ verify_oop(r->as_Register()); |
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1364 } |
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1365 } |
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1366 } |
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1367 } |
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1368 } |
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1369 |
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1370 static void gen_special_dispatch(MacroAssembler* masm, |
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1371 int total_args_passed, |
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1372 int comp_args_on_stack, |
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1373 vmIntrinsics::ID special_dispatch, |
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1374 const BasicType* sig_bt, |
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1375 const VMRegPair* regs) { |
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1376 verify_oop_args(masm, total_args_passed, sig_bt, regs); |
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1377 |
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1378 // Now write the args into the outgoing interpreter space |
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1379 bool has_receiver = false; |
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1380 Register receiver_reg = noreg; |
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1381 int member_arg_pos = -1; |
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1382 Register member_reg = noreg; |
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1383 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(special_dispatch); |
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1384 if (ref_kind != 0) { |
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1385 member_arg_pos = total_args_passed - 1; // trailing MemberName argument |
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1386 member_reg = rbx; // known to be free at this point |
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1387 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1388 } else if (special_dispatch == vmIntrinsics::_invokeBasic) { |
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1389 has_receiver = true; |
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1390 } else { |
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1391 guarantee(false, err_msg("special_dispatch=%d", special_dispatch)); |
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1392 } |
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1393 |
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1394 if (member_reg != noreg) { |
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1395 // Load the member_arg into register, if necessary. |
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1396 assert(member_arg_pos >= 0 && member_arg_pos < total_args_passed, "oob"); |
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1397 assert(sig_bt[member_arg_pos] == T_OBJECT, "dispatch argument must be an object"); |
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1398 VMReg r = regs[member_arg_pos].first(); |
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1399 assert(r->is_valid(), "bad member arg"); |
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1400 if (r->is_stack()) { |
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1401 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1402 } else { |
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1403 // no data motion is needed |
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1404 member_reg = r->as_Register(); |
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1405 } |
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1406 } |
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1407 |
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1408 if (has_receiver) { |
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1409 // Make sure the receiver is loaded into a register. |
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1410 assert(total_args_passed > 0, "oob"); |
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1411 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1412 VMReg r = regs[0].first(); |
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1413 assert(r->is_valid(), "bad receiver arg"); |
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1414 if (r->is_stack()) { |
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1415 // Porting note: This assumes that compiled calling conventions always |
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1416 // pass the receiver oop in a register. If this is not true on some |
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1417 // platform, pick a temp and load the receiver from stack. |
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1418 assert(false, "receiver always in a register"); |
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1419 receiver_reg = rcx; // known to be free at this point |
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1420 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1421 } else { |
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1422 // no data motion is needed |
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1423 receiver_reg = r->as_Register(); |
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1424 } |
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1425 } |
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1426 |
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1427 // Figure out which address we are really jumping to: |
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1428 MethodHandles::generate_method_handle_dispatch(masm, special_dispatch, |
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1429 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1430 } |
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1431 |
0 | 1432 // --------------------------------------------------------------------------- |
1433 // Generate a native wrapper for a given method. The method takes arguments | |
1434 // in the Java compiled code convention, marshals them to the native | |
1435 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1436 // returns to java state (possibly blocking), unhandlizes any result and | |
1437 // returns. | |
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1438 // |
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1439 // Critical native functions are a shorthand for the use of |
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1440 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1441 // functions. The wrapper is expected to unpack the arguments before |
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1442 // passing them to the callee and perform checks before and after the |
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1443 // native call to ensure that they GC_locker |
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1444 // lock_critical/unlock_critical semantics are followed. Some other |
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1445 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1446 // block and the check for pending exceptions it's impossible for them |
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1447 // to be thrown. |
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1448 // |
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1449 // They are roughly structured like this: |
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1450 // if (GC_locker::needs_gc()) |
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1451 // SharedRuntime::block_for_jni_critical(); |
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1452 // tranistion to thread_in_native |
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1453 // unpack arrray arguments and call native entry point |
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1454 // check for safepoint in progress |
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1455 // check if any thread suspend flags are set |
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1456 // call into JVM and possible unlock the JNI critical |
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1457 // if a GC was suppressed while in the critical native. |
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1458 // transition back to thread_in_Java |
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1459 // return to caller |
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1460 // |
6266
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1461 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1462 methodHandle method, |
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1463 int compile_id, |
0 | 1464 int total_in_args, |
1465 int comp_args_on_stack, | |
6266
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1466 BasicType* in_sig_bt, |
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1467 VMRegPair* in_regs, |
0 | 1468 BasicType ret_type) { |
6266
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1469 if (method->is_method_handle_intrinsic()) { |
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1470 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1471 intptr_t start = (intptr_t)__ pc(); |
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1472 int vep_offset = ((intptr_t)__ pc()) - start; |
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1473 gen_special_dispatch(masm, |
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1474 total_in_args, |
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1475 comp_args_on_stack, |
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1476 method->intrinsic_id(), |
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1477 in_sig_bt, |
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1478 in_regs); |
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1479 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
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1480 __ flush(); |
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1481 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
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1482 return nmethod::new_native_nmethod(method, |
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1483 compile_id, |
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1484 masm->code(), |
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1485 vep_offset, |
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1486 frame_complete, |
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1487 stack_slots / VMRegImpl::slots_per_word, |
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1488 in_ByteSize(-1), |
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1489 in_ByteSize(-1), |
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1490 (OopMapSet*)NULL); |
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1491 } |
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1492 bool is_critical_native = true; |
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1493 address native_func = method->critical_native_function(); |
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1494 if (native_func == NULL) { |
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1495 native_func = method->native_function(); |
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1496 is_critical_native = false; |
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1497 } |
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1498 assert(native_func != NULL, "must have function"); |
0 | 1499 |
1500 // An OopMap for lock (and class if static) | |
1501 OopMapSet *oop_maps = new OopMapSet(); | |
1502 | |
1503 // We have received a description of where all the java arg are located | |
1504 // on entry to the wrapper. We need to convert these args to where | |
1505 // the jni function will expect them. To figure out where they go | |
1506 // we convert the java signature to a C signature by inserting | |
1507 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1508 | |
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1509 int total_c_args = total_in_args; |
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1510 if (!is_critical_native) { |
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1511 total_c_args += 1; |
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1512 if (method->is_static()) { |
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1513 total_c_args++; |
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1514 } |
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1515 } else { |
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1516 for (int i = 0; i < total_in_args; i++) { |
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1517 if (in_sig_bt[i] == T_ARRAY) { |
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1518 total_c_args++; |
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1519 } |
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1520 } |
0 | 1521 } |
1522 | |
1523 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1524 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1525 BasicType* in_elem_bt = NULL; |
0 | 1526 |
1527 int argc = 0; | |
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1528 if (!is_critical_native) { |
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1529 out_sig_bt[argc++] = T_ADDRESS; |
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1530 if (method->is_static()) { |
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1531 out_sig_bt[argc++] = T_OBJECT; |
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1532 } |
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1533 |
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1534 for (int i = 0; i < total_in_args ; i++ ) { |
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1535 out_sig_bt[argc++] = in_sig_bt[i]; |
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1536 } |
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1537 } else { |
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1538 Thread* THREAD = Thread::current(); |
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1539 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1540 SignatureStream ss(method->signature()); |
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1541 for (int i = 0; i < total_in_args ; i++ ) { |
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1542 if (in_sig_bt[i] == T_ARRAY) { |
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1543 // Arrays are passed as int, elem* pair |
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1544 out_sig_bt[argc++] = T_INT; |
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1545 out_sig_bt[argc++] = T_ADDRESS; |
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1546 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1547 const char* at = atype->as_C_string(); |
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1548 if (strlen(at) == 2) { |
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1549 assert(at[0] == '[', "must be"); |
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1550 switch (at[1]) { |
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1551 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1552 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1553 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1554 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1555 case 'I': in_elem_bt[i] = T_INT; break; |
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1556 case 'J': in_elem_bt[i] = T_LONG; break; |
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1557 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1558 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1559 default: ShouldNotReachHere(); |
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1560 } |
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1561 } |
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1562 } else { |
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1563 out_sig_bt[argc++] = in_sig_bt[i]; |
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1564 in_elem_bt[i] = T_VOID; |
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1565 } |
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1566 if (in_sig_bt[i] != T_VOID) { |
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1567 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1568 ss.next(); |
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1569 } |
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1570 } |
0 | 1571 } |
1572 | |
1573 // Now figure out where the args must be stored and how much stack space | |
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1574 // they require. |
0 | 1575 int out_arg_slots; |
1576 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
1577 | |
1578 // Compute framesize for the wrapper. We need to handlize all oops in | |
1579 // registers a max of 2 on x86. | |
1580 | |
1581 // Calculate the total number of stack slots we will need. | |
1582 | |
1583 // First count the abi requirement plus all of the outgoing args | |
1584 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1585 | |
1586 // Now the space for the inbound oop handle area | |
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1587 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers |
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1588 if (is_critical_native) { |
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1589 // Critical natives may have to call out so they need a save area |
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1590 // for register arguments. |
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1591 int double_slots = 0; |
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1592 int single_slots = 0; |
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1593 for ( int i = 0; i < total_in_args; i++) { |
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1594 if (in_regs[i].first()->is_Register()) { |
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1595 const Register reg = in_regs[i].first()->as_Register(); |
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1596 switch (in_sig_bt[i]) { |
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1597 case T_ARRAY: // critical array (uses 2 slots on LP64) |
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1598 case T_BOOLEAN: |
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1599 case T_BYTE: |
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1600 case T_SHORT: |
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1601 case T_CHAR: |
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1602 case T_INT: single_slots++; break; |
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1603 case T_LONG: double_slots++; break; |
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1604 default: ShouldNotReachHere(); |
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1605 } |
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1606 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1607 switch (in_sig_bt[i]) { |
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1608 case T_FLOAT: single_slots++; break; |
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1609 case T_DOUBLE: double_slots++; break; |
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1610 default: ShouldNotReachHere(); |
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1611 } |
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1612 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1613 ShouldNotReachHere(); |
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1614 } |
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1615 } |
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1616 total_save_slots = double_slots * 2 + single_slots; |
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1617 // align the save area |
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1618 if (double_slots != 0) { |
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1619 stack_slots = round_to(stack_slots, 2); |
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1620 } |
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1621 } |
0 | 1622 |
1623 int oop_handle_offset = stack_slots; | |
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1624 stack_slots += total_save_slots; |
0 | 1625 |
1626 // Now any space we need for handlizing a klass if static method | |
1627 | |
1628 int klass_slot_offset = 0; | |
1629 int klass_offset = -1; | |
1630 int lock_slot_offset = 0; | |
1631 bool is_static = false; | |
1632 | |
1633 if (method->is_static()) { | |
1634 klass_slot_offset = stack_slots; | |
1635 stack_slots += VMRegImpl::slots_per_word; | |
1636 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1637 is_static = true; | |
1638 } | |
1639 | |
1640 // Plus a lock if needed | |
1641 | |
1642 if (method->is_synchronized()) { | |
1643 lock_slot_offset = stack_slots; | |
1644 stack_slots += VMRegImpl::slots_per_word; | |
1645 } | |
1646 | |
1647 // Now a place (+2) to save return values or temp during shuffling | |
1648 // + 2 for return address (which we own) and saved rbp, | |
1649 stack_slots += 4; | |
1650 | |
1651 // Ok The space we have allocated will look like: | |
1652 // | |
1653 // | |
1654 // FP-> | | | |
1655 // |---------------------| | |
1656 // | 2 slots for moves | | |
1657 // |---------------------| | |
1658 // | lock box (if sync) | | |
1659 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) | |
1660 // | klass (if static) | | |
1661 // |---------------------| <- klass_slot_offset | |
1662 // | oopHandle area | | |
1663 // |---------------------| <- oop_handle_offset (a max of 2 registers) | |
1664 // | outbound memory | | |
1665 // | based arguments | | |
1666 // | | | |
1667 // |---------------------| | |
1668 // | | | |
1669 // SP-> | out_preserved_slots | | |
1670 // | |
1671 // | |
1672 // **************************************************************************** | |
1673 // WARNING - on Windows Java Natives use pascal calling convention and pop the | |
1674 // arguments off of the stack after the jni call. Before the call we can use | |
1675 // instructions that are SP relative. After the jni call we switch to FP | |
1676 // relative instructions instead of re-adjusting the stack on windows. | |
1677 // **************************************************************************** | |
1678 | |
1679 | |
1680 // Now compute actual number of stack words we need rounding to make | |
1681 // stack properly aligned. | |
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1682 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1683 |
1684 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1685 | |
1686 intptr_t start = (intptr_t)__ pc(); | |
1687 | |
1688 // First thing make an ic check to see if we should even be here | |
1689 | |
1690 // We are free to use all registers as temps without saving them and | |
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1691 // restoring them except rbp. rbp is the only callee save register |
0 | 1692 // as far as the interpreter and the compiler(s) are concerned. |
1693 | |
1694 | |
1695 const Register ic_reg = rax; | |
1696 const Register receiver = rcx; | |
1697 Label hit; | |
1698 Label exception_pending; | |
1699 | |
1700 __ verify_oop(receiver); | |
304 | 1701 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
0 | 1702 __ jcc(Assembler::equal, hit); |
1703 | |
1704 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1705 | |
1706 // verified entry must be aligned for code patching. | |
1707 // and the first 5 bytes must be in the same cache line | |
1708 // if we align at 8 then we will be sure 5 bytes are in the same line | |
1709 __ align(8); | |
1710 | |
1711 __ bind(hit); | |
1712 | |
1713 int vep_offset = ((intptr_t)__ pc()) - start; | |
1714 | |
1715 #ifdef COMPILER1 | |
1716 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { | |
1717 // Object.hashCode can pull the hashCode from the header word | |
1718 // instead of doing a full VM transition once it's been computed. | |
1719 // Since hashCode is usually polymorphic at call sites we can't do | |
1720 // this optimization at the call site without a lot of work. | |
1721 Label slowCase; | |
1722 Register receiver = rcx; | |
1723 Register result = rax; | |
304 | 1724 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); |
0 | 1725 |
1726 // check if locked | |
304 | 1727 __ testptr(result, markOopDesc::unlocked_value); |
0 | 1728 __ jcc (Assembler::zero, slowCase); |
1729 | |
1730 if (UseBiasedLocking) { | |
1731 // Check if biased and fall through to runtime if so | |
304 | 1732 __ testptr(result, markOopDesc::biased_lock_bit_in_place); |
0 | 1733 __ jcc (Assembler::notZero, slowCase); |
1734 } | |
1735 | |
1736 // get hash | |
304 | 1737 __ andptr(result, markOopDesc::hash_mask_in_place); |
0 | 1738 // test if hashCode exists |
1739 __ jcc (Assembler::zero, slowCase); | |
304 | 1740 __ shrptr(result, markOopDesc::hash_shift); |
0 | 1741 __ ret(0); |
1742 __ bind (slowCase); | |
1743 } | |
1744 #endif // COMPILER1 | |
1745 | |
1746 // The instruction at the verified entry point must be 5 bytes or longer | |
1747 // because it can be patched on the fly by make_non_entrant. The stack bang | |
1748 // instruction fits that requirement. | |
1749 | |
1750 // Generate stack overflow check | |
1751 | |
1752 if (UseStackBanging) { | |
1753 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
1754 } else { | |
1755 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
1756 __ fat_nop(); | |
1757 } | |
1758 | |
1759 // Generate a new frame for the wrapper. | |
1760 __ enter(); | |
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1761 // -2 because return address is already present and so is saved rbp |
304 | 1762 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 1763 |
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1764 // Frame is now completed as far as size and linkage. |
0 | 1765 int frame_complete = ((intptr_t)__ pc()) - start; |
1766 | |
1767 // Calculate the difference between rsp and rbp,. We need to know it | |
1768 // after the native call because on windows Java Natives will pop | |
1769 // the arguments and it is painful to do rsp relative addressing | |
1770 // in a platform independent way. So after the call we switch to | |
1771 // rbp, relative addressing. | |
1772 | |
1773 int fp_adjustment = stack_size - 2*wordSize; | |
1774 | |
1775 #ifdef COMPILER2 | |
1776 // C2 may leave the stack dirty if not in SSE2+ mode | |
1777 if (UseSSE >= 2) { | |
1778 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
1779 } else { | |
1780 __ empty_FPU_stack(); | |
1781 } | |
1782 #endif /* COMPILER2 */ | |
1783 | |
1784 // Compute the rbp, offset for any slots used after the jni call | |
1785 | |
1786 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; | |
1787 | |
1788 // We use rdi as a thread pointer because it is callee save and | |
1789 // if we load it once it is usable thru the entire wrapper | |
1790 const Register thread = rdi; | |
1791 | |
1792 // We use rsi as the oop handle for the receiver/klass | |
1793 // It is callee save so it survives the call to native | |
1794 | |
1795 const Register oop_handle_reg = rsi; | |
1796 | |
1797 __ get_thread(thread); | |
1798 | |
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1799 if (is_critical_native) { |
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1800 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args, |
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1801 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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1802 } |
0 | 1803 |
1804 // | |
1805 // We immediately shuffle the arguments so that any vm call we have to | |
1806 // make from here on out (sync slow path, jvmti, etc.) we will have | |
1807 // captured the oops from our caller and have a valid oopMap for | |
1808 // them. | |
1809 | |
1810 // ----------------- | |
1811 // The Grand Shuffle | |
1812 // | |
1813 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* | |
1814 // and, if static, the class mirror instead of a receiver. This pretty much | |
1815 // guarantees that register layout will not match (and x86 doesn't use reg | |
1816 // parms though amd does). Since the native abi doesn't use register args | |
1817 // and the java conventions does we don't have to worry about collisions. | |
1818 // All of our moved are reg->stack or stack->stack. | |
1819 // We ignore the extra arguments during the shuffle and handle them at the | |
1820 // last moment. The shuffle is described by the two calling convention | |
1821 // vectors we have in our possession. We simply walk the java vector to | |
1822 // get the source locations and the c vector to get the destinations. | |
1823 | |
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1824 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 ); |
0 | 1825 |
1826 // Record rsp-based slot for receiver on stack for non-static methods | |
1827 int receiver_offset = -1; | |
1828 | |
1829 // This is a trick. We double the stack slots so we can claim | |
1830 // the oops in the caller's frame. Since we are sure to have | |
1831 // more args than the caller doubling is enough to make | |
1832 // sure we can capture all the incoming oop args from the | |
1833 // caller. | |
1834 // | |
1835 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
1836 | |
1837 // Mark location of rbp, | |
1838 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); | |
1839 | |
1840 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx | |
1841 // Are free to temporaries if we have to do stack to steck moves. | |
1842 // All inbound args are referenced based on rbp, and all outbound args via rsp. | |
1843 | |
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1844 for (int i = 0; i < total_in_args ; i++, c_arg++ ) { |
0 | 1845 switch (in_sig_bt[i]) { |
1846 case T_ARRAY: | |
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1847 if (is_critical_native) { |
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1848 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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1849 c_arg++; |
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1850 break; |
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1851 } |
0 | 1852 case T_OBJECT: |
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1853 assert(!is_critical_native, "no oop arguments"); |
0 | 1854 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
1855 ((i == 0) && (!is_static)), | |
1856 &receiver_offset); | |
1857 break; | |
1858 case T_VOID: | |
1859 break; | |
1860 | |
1861 case T_FLOAT: | |
1862 float_move(masm, in_regs[i], out_regs[c_arg]); | |
1863 break; | |
1864 | |
1865 case T_DOUBLE: | |
1866 assert( i + 1 < total_in_args && | |
1867 in_sig_bt[i + 1] == T_VOID && | |
1868 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
1869 double_move(masm, in_regs[i], out_regs[c_arg]); | |
1870 break; | |
1871 | |
1872 case T_LONG : | |
1873 long_move(masm, in_regs[i], out_regs[c_arg]); | |
1874 break; | |
1875 | |
1876 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
1877 | |
1878 default: | |
1879 simple_move32(masm, in_regs[i], out_regs[c_arg]); | |
1880 } | |
1881 } | |
1882 | |
1883 // Pre-load a static method's oop into rsi. Used both by locking code and | |
1884 // the normal JNI call code. | |
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1885 if (method->is_static() && !is_critical_native) { |
0 | 1886 |
1887 // load opp into a register | |
1888 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); | |
1889 | |
1890 // Now handlize the static class mirror it's known not-null. | |
304 | 1891 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
0 | 1892 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
1893 | |
1894 // Now get the handle | |
304 | 1895 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
0 | 1896 // store the klass handle as second argument |
304 | 1897 __ movptr(Address(rsp, wordSize), oop_handle_reg); |
0 | 1898 } |
1899 | |
1900 // Change state to native (we save the return address in the thread, since it might not | |
1901 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
1902 // points into the right code segment. It does not have to be the correct return pc. | |
1903 // We use the same pc/oopMap repeatedly when we call out | |
1904 | |
1905 intptr_t the_pc = (intptr_t) __ pc(); | |
1906 oop_maps->add_gc_map(the_pc - start, map); | |
1907 | |
1908 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc); | |
1909 | |
1910 | |
1911 // We have all of the arguments setup at this point. We must not touch any register | |
1912 // argument registers at this point (what if we save/restore them there are no oop? | |
1913 | |
1914 { | |
1915 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
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1916 __ mov_metadata(rax, method()); |
0 | 1917 __ call_VM_leaf( |
1918 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
1919 thread, rax); | |
1920 } | |
1921 | |
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1922 // RedefineClasses() tracing support for obsolete method entry |
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1923 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1924 __ mov_metadata(rax, method()); |
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1925 __ call_VM_leaf( |
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1926 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1927 thread, rax); |
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1928 } |
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1929 |
0 | 1930 // These are register definitions we need for locking/unlocking |
1931 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction | |
1932 const Register obj_reg = rcx; // Will contain the oop | |
1933 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) | |
1934 | |
1935 Label slow_path_lock; | |
1936 Label lock_done; | |
1937 | |
1938 // Lock a synchronized method | |
1939 if (method->is_synchronized()) { | |
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1940 assert(!is_critical_native, "unhandled"); |
0 | 1941 |
1942 | |
1943 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
1944 | |
1945 // Get the handle (the 2nd argument) | |
304 | 1946 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
0 | 1947 |
1948 // Get address of the box | |
1949 | |
304 | 1950 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); |
0 | 1951 |
1952 // Load the oop from the handle | |
304 | 1953 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 1954 |
1955 if (UseBiasedLocking) { | |
1956 // Note that oop_handle_reg is trashed during this call | |
1957 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock); | |
1958 } | |
1959 | |
1960 // Load immediate 1 into swap_reg %rax, | |
304 | 1961 __ movptr(swap_reg, 1); |
0 | 1962 |
1963 // Load (object->mark() | 1) into swap_reg %rax, | |
304 | 1964 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 1965 |
1966 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 1967 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 1968 |
1969 if (os::is_MP()) { | |
1970 __ lock(); | |
1971 } | |
1972 | |
1973 // src -> dest iff dest == rax, else rax, <- dest | |
1974 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) | |
304 | 1975 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 1976 __ jcc(Assembler::equal, lock_done); |
1977 | |
1978 // Test if the oopMark is an obvious stack pointer, i.e., | |
1979 // 1) (mark & 3) == 0, and | |
1980 // 2) rsp <= mark < mark + os::pagesize() | |
1981 // These 3 tests can be done by evaluating the following | |
1982 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
1983 // assuming both stack pointer and pagesize have their | |
1984 // least significant 2 bits clear. | |
1985 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg | |
1986 | |
304 | 1987 __ subptr(swap_reg, rsp); |
1988 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 1989 |
1990 // Save the test result, for recursive case, the result is zero | |
304 | 1991 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 1992 __ jcc(Assembler::notEqual, slow_path_lock); |
1993 // Slow path will re-enter here | |
1994 __ bind(lock_done); | |
1995 | |
1996 if (UseBiasedLocking) { | |
1997 // Re-fetch oop_handle_reg as we trashed it above | |
304 | 1998 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
0 | 1999 } |
2000 } | |
2001 | |
2002 | |
2003 // Finally just about ready to make the JNI call | |
2004 | |
2005 | |
2006 // get JNIEnv* which is first argument to native | |
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2007 if (!is_critical_native) { |
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2008 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2009 __ movptr(Address(rsp, 0), rdx); |
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2010 } |
0 | 2011 |
2012 // Now set thread in native | |
2013 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); | |
2014 | |
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2015 __ call(RuntimeAddress(native_func)); |
0 | 2016 |
2017 // WARNING - on Windows Java Natives use pascal calling convention and pop the | |
2018 // arguments off of the stack. We could just re-adjust the stack pointer here | |
2019 // and continue to do SP relative addressing but we instead switch to FP | |
2020 // relative addressing. | |
2021 | |
2022 // Unpack native results. | |
2023 switch (ret_type) { | |
2024 case T_BOOLEAN: __ c2bool(rax); break; | |
304 | 2025 case T_CHAR : __ andptr(rax, 0xFFFF); break; |
0 | 2026 case T_BYTE : __ sign_extend_byte (rax); break; |
2027 case T_SHORT : __ sign_extend_short(rax); break; | |
2028 case T_INT : /* nothing to do */ break; | |
2029 case T_DOUBLE : | |
2030 case T_FLOAT : | |
2031 // Result is in st0 we'll save as needed | |
2032 break; | |
2033 case T_ARRAY: // Really a handle | |
2034 case T_OBJECT: // Really a handle | |
2035 break; // can't de-handlize until after safepoint check | |
2036 case T_VOID: break; | |
2037 case T_LONG: break; | |
2038 default : ShouldNotReachHere(); | |
2039 } | |
2040 | |
2041 // Switch thread to "native transition" state before reading the synchronization state. | |
2042 // This additional state is necessary because reading and testing the synchronization | |
2043 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2044 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2045 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2046 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2047 // didn't see any synchronization is progress, and escapes. | |
2048 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); | |
2049 | |
2050 if(os::is_MP()) { | |
2051 if (UseMembar) { | |
304 | 2052 // Force this write out before the read below |
2053 __ membar(Assembler::Membar_mask_bits( | |
2054 Assembler::LoadLoad | Assembler::LoadStore | | |
2055 Assembler::StoreLoad | Assembler::StoreStore)); | |
0 | 2056 } else { |
2057 // Write serialization page so VM thread can do a pseudo remote membar. | |
2058 // We use the current thread pointer to calculate a thread specific | |
2059 // offset to write to within the page. This minimizes bus traffic | |
2060 // due to cache line collision. | |
2061 __ serialize_memory(thread, rcx); | |
2062 } | |
2063 } | |
2064 | |
2065 if (AlwaysRestoreFPU) { | |
2066 // Make sure the control word is correct. | |
2067 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
2068 } | |
2069 | |
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2070 Label after_transition; |
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2071 |
0 | 2072 // check for safepoint operation in progress and/or pending suspend requests |
2073 { Label Continue; | |
2074 | |
2075 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
2076 SafepointSynchronize::_not_synchronized); | |
2077 | |
2078 Label L; | |
2079 __ jcc(Assembler::notEqual, L); | |
2080 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); | |
2081 __ jcc(Assembler::equal, Continue); | |
2082 __ bind(L); | |
2083 | |
2084 // Don't use call_VM as it will see a possible pending exception and forward it | |
2085 // and never return here preventing us from clearing _last_native_pc down below. | |
2086 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2087 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2088 // by hand. | |
2089 // | |
2090 save_native_result(masm, ret_type, stack_slots); | |
304 | 2091 __ push(thread); |
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2092 if (!is_critical_native) { |
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2093 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2094 JavaThread::check_special_condition_for_native_trans))); |
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2095 } else { |
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2096 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2097 JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2098 } |
0 | 2099 __ increment(rsp, wordSize); |
2100 // Restore any method result value | |
2101 restore_native_result(masm, ret_type, stack_slots); | |
2102 | |
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2103 if (is_critical_native) { |
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2104 // The call above performed the transition to thread_in_Java so |
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2105 // skip the transition logic below. |
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2106 __ jmpb(after_transition); |
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2107 } |
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2108 |
0 | 2109 __ bind(Continue); |
2110 } | |
2111 | |
2112 // change thread state | |
2113 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2114 __ bind(after_transition); |
0 | 2115 |
2116 Label reguard; | |
2117 Label reguard_done; | |
2118 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2119 __ jcc(Assembler::equal, reguard); | |
2120 | |
2121 // slow path reguard re-enters here | |
2122 __ bind(reguard_done); | |
2123 | |
2124 // Handle possible exception (will unlock if necessary) | |
2125 | |
2126 // native result if any is live | |
2127 | |
2128 // Unlock | |
2129 Label slow_path_unlock; | |
2130 Label unlock_done; | |
2131 if (method->is_synchronized()) { | |
2132 | |
2133 Label done; | |
2134 | |
2135 // Get locked oop from the handle we passed to jni | |
304 | 2136 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2137 |
2138 if (UseBiasedLocking) { | |
2139 __ biased_locking_exit(obj_reg, rbx, done); | |
2140 } | |
2141 | |
2142 // Simple recursive lock? | |
2143 | |
304 | 2144 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD); |
0 | 2145 __ jcc(Assembler::equal, done); |
2146 | |
2147 // Must save rax, if if it is live now because cmpxchg must use it | |
2148 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2149 save_native_result(masm, ret_type, stack_slots); | |
2150 } | |
2151 | |
2152 // get old displaced header | |
304 | 2153 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); |
0 | 2154 |
2155 // get address of the stack lock | |
304 | 2156 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
0 | 2157 |
2158 // Atomic swap old header if oop still contains the stack lock | |
2159 if (os::is_MP()) { | |
2160 __ lock(); | |
2161 } | |
2162 | |
2163 // src -> dest iff dest == rax, else rax, <- dest | |
2164 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) | |
304 | 2165 __ cmpxchgptr(rbx, Address(obj_reg, 0)); |
0 | 2166 __ jcc(Assembler::notEqual, slow_path_unlock); |
2167 | |
2168 // slow path re-enters here | |
2169 __ bind(unlock_done); | |
2170 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2171 restore_native_result(masm, ret_type, stack_slots); | |
2172 } | |
2173 | |
2174 __ bind(done); | |
2175 | |
2176 } | |
2177 | |
2178 { | |
2179 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
2180 // Tell dtrace about this method exit | |
2181 save_native_result(masm, ret_type, stack_slots); | |
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2182 __ mov_metadata(rax, method()); |
0 | 2183 __ call_VM_leaf( |
2184 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2185 thread, rax); | |
2186 restore_native_result(masm, ret_type, stack_slots); | |
2187 } | |
2188 | |
2189 // We can finally stop using that last_Java_frame we setup ages ago | |
2190 | |
2191 __ reset_last_Java_frame(thread, false, true); | |
2192 | |
2193 // Unpack oop result | |
2194 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2195 Label L; | |
304 | 2196 __ cmpptr(rax, (int32_t)NULL_WORD); |
0 | 2197 __ jcc(Assembler::equal, L); |
304 | 2198 __ movptr(rax, Address(rax, 0)); |
0 | 2199 __ bind(L); |
2200 __ verify_oop(rax); | |
2201 } | |
2202 | |
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2203 if (!is_critical_native) { |
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2204 // reset handle block |
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2205 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); |
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2206 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD); |
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2207 |
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2208 // Any exception pending? |
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2209 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2210 __ jcc(Assembler::notEqual, exception_pending); |
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2211 } |
0 | 2212 |
2213 // no exception, we're almost done | |
2214 | |
2215 // check that only result value is on FPU stack | |
2216 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); | |
2217 | |
2218 // Fixup floating pointer results so that result looks like a return from a compiled method | |
2219 if (ret_type == T_FLOAT) { | |
2220 if (UseSSE >= 1) { | |
2221 // Pop st0 and store as float and reload into xmm register | |
2222 __ fstp_s(Address(rbp, -4)); | |
2223 __ movflt(xmm0, Address(rbp, -4)); | |
2224 } | |
2225 } else if (ret_type == T_DOUBLE) { | |
2226 if (UseSSE >= 2) { | |
2227 // Pop st0 and store as double and reload into xmm register | |
2228 __ fstp_d(Address(rbp, -8)); | |
2229 __ movdbl(xmm0, Address(rbp, -8)); | |
2230 } | |
2231 } | |
2232 | |
2233 // Return | |
2234 | |
2235 __ leave(); | |
2236 __ ret(0); | |
2237 | |
2238 // Unexpected paths are out of line and go here | |
2239 | |
2240 // Slow path locking & unlocking | |
2241 if (method->is_synchronized()) { | |
2242 | |
2243 // BEGIN Slow path lock | |
2244 | |
2245 __ bind(slow_path_lock); | |
2246 | |
2247 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2248 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
304 | 2249 __ push(thread); |
2250 __ push(lock_reg); | |
2251 __ push(obj_reg); | |
0 | 2252 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); |
304 | 2253 __ addptr(rsp, 3*wordSize); |
0 | 2254 |
2255 #ifdef ASSERT | |
2256 { Label L; | |
304 | 2257 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2258 __ jcc(Assembler::equal, L); |
2259 __ stop("no pending exception allowed on exit from monitorenter"); | |
2260 __ bind(L); | |
2261 } | |
2262 #endif | |
2263 __ jmp(lock_done); | |
2264 | |
2265 // END Slow path lock | |
2266 | |
2267 // BEGIN Slow path unlock | |
2268 __ bind(slow_path_unlock); | |
2269 | |
2270 // Slow path unlock | |
2271 | |
2272 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2273 save_native_result(masm, ret_type, stack_slots); | |
2274 } | |
2275 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2276 | |
304 | 2277 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
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2278 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); |
0 | 2279 |
2280 | |
2281 // should be a peal | |
2282 // +wordSize because of the push above | |
304 | 2283 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
2284 __ push(rax); | |
2285 | |
2286 __ push(obj_reg); | |
0 | 2287 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); |
304 | 2288 __ addptr(rsp, 2*wordSize); |
0 | 2289 #ifdef ASSERT |
2290 { | |
2291 Label L; | |
304 | 2292 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2293 __ jcc(Assembler::equal, L); |
2294 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2295 __ bind(L); | |
2296 } | |
2297 #endif /* ASSERT */ | |
2298 | |
304 | 2299 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
0 | 2300 |
2301 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2302 restore_native_result(masm, ret_type, stack_slots); | |
2303 } | |
2304 __ jmp(unlock_done); | |
2305 // END Slow path unlock | |
2306 | |
2307 } | |
2308 | |
2309 // SLOW PATH Reguard the stack if needed | |
2310 | |
2311 __ bind(reguard); | |
2312 save_native_result(masm, ret_type, stack_slots); | |
2313 { | |
2314 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); | |
2315 } | |
2316 restore_native_result(masm, ret_type, stack_slots); | |
2317 __ jmp(reguard_done); | |
2318 | |
2319 | |
2320 // BEGIN EXCEPTION PROCESSING | |
2321 | |
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2322 if (!is_critical_native) { |
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2323 // Forward the exception |
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|
2324 __ bind(exception_pending); |
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diff
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|
2325 |
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7013347: allow crypto functions to be called inline to enhance performance
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diff
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|
2326 // remove possible return value from FPU register stack |
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parents:
3931
diff
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|
2327 __ empty_FPU_stack(); |
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7013347: allow crypto functions to be called inline to enhance performance
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diff
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|
2328 |
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7013347: allow crypto functions to be called inline to enhance performance
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diff
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|
2329 // pop our frame |
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diff
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|
2330 __ leave(); |
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diff
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|
2331 // and forward the exception |
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parents:
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diff
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|
2332 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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diff
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|
2333 } |
0 | 2334 |
2335 __ flush(); | |
2336 | |
2337 nmethod *nm = nmethod::new_native_nmethod(method, | |
2405
3d58a4983660
7022998: JSR 292 recursive method handle calls inline themselves infinitely
twisti
parents:
2245
diff
changeset
|
2338 compile_id, |
0 | 2339 masm->code(), |
2340 vep_offset, | |
2341 frame_complete, | |
2342 stack_slots / VMRegImpl::slots_per_word, | |
2343 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2344 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2345 oop_maps); | |
4873
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parents:
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diff
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|
2346 |
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diff
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|
2347 if (is_critical_native) { |
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parents:
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diff
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|
2348 nm->set_lazy_critical_native(true); |
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parents:
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diff
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|
2349 } |
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|
2350 |
0 | 2351 return nm; |
2352 | |
2353 } | |
2354 | |
116
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2355 #ifdef HAVE_DTRACE_H |
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diff
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|
2356 // --------------------------------------------------------------------------- |
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|
2357 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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0
diff
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2358 // in the Java compiled code convention, marshals them to the native |
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0
diff
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2359 // abi and then leaves nops at the position you would expect to call a native |
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2360 // function. When the probe is enabled the nops are replaced with a trap |
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0
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2361 // instruction that dtrace inserts and the trace will cause a notification |
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0
diff
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|
2362 // to dtrace. |
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0
diff
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|
2363 // |
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2364 // The probes are only able to take primitive types and java/lang/String as |
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0
diff
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2365 // arguments. No other java types are allowed. Strings are converted to utf8 |
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0
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2366 // strings so that from dtrace point of view java strings are converted to C |
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2367 // strings. There is an arbitrary fixed limit on the total space that a method |
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|
2368 // can use for converting the strings. (256 chars per string in the signature). |
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2369 // So any java string larger then this is truncated. |
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0
diff
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|
2370 |
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|
2371 nmethod *SharedRuntime::generate_dtrace_nmethod( |
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0
diff
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|
2372 MacroAssembler *masm, methodHandle method) { |
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0
diff
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|
2373 |
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0
diff
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|
2374 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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0
diff
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|
2375 // be single threaded in this method. |
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0
diff
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|
2376 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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0
diff
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|
2377 |
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0
diff
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|
2378 // Fill in the signature array, for the calling-convention call. |
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0
diff
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|
2379 int total_args_passed = method->size_of_parameters(); |
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0
diff
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|
2380 |
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|
2381 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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|
2382 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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0
diff
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|
2383 |
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0
diff
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|
2384 // The signature we are going to use for the trap that dtrace will see |
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0
diff
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|
2385 // java/lang/String is converted. We drop "this" and any other object |
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0
diff
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|
2386 // is converted to NULL. (A one-slot java/lang/Long object reference |
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0
diff
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|
2387 // is converted to a two-slot long, which is why we double the allocation). |
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diff
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|
2388 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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|
2389 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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diff
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|
2390 |
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0
diff
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|
2391 int i=0; |
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0
diff
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|
2392 int total_strings = 0; |
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diff
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|
2393 int first_arg_to_pass = 0; |
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diff
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|
2394 int total_c_args = 0; |
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|
2395 |
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|
2396 if( !method->is_static() ) { // Pass in receiver first |
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|
2397 in_sig_bt[i++] = T_OBJECT; |
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0
diff
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|
2398 first_arg_to_pass = 1; |
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0
diff
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|
2399 } |
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0
diff
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|
2400 |
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0
diff
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|
2401 // We need to convert the java args to where a native (non-jni) function |
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0
diff
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|
2402 // would expect them. To figure out where they go we convert the java |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2403 // signature to a C signature. |
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0
diff
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|
2404 |
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0
diff
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|
2405 SignatureStream ss(method->signature()); |
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0
diff
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|
2406 for ( ; !ss.at_return_type(); ss.next()) { |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
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|
2407 BasicType bt = ss.type(); |
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0
diff
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|
2408 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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0
diff
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|
2409 out_sig_bt[total_c_args++] = bt; |
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0
diff
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|
2410 if( bt == T_OBJECT) { |
2177
3582bf76420e
6990754: Use native memory and reference counting to implement SymbolTable
coleenp
parents:
1972
diff
changeset
|
2411 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
116
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|
2412 if (s == vmSymbols::java_lang_String()) { |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2413 total_strings++; |
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0
diff
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|
2414 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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0
diff
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|
2415 } else if (s == vmSymbols::java_lang_Boolean() || |
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0
diff
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|
2416 s == vmSymbols::java_lang_Character() || |
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0
diff
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|
2417 s == vmSymbols::java_lang_Byte() || |
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0
diff
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|
2418 s == vmSymbols::java_lang_Short() || |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
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|
2419 s == vmSymbols::java_lang_Integer() || |
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0
diff
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|
2420 s == vmSymbols::java_lang_Float()) { |
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0
diff
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|
2421 out_sig_bt[total_c_args-1] = T_INT; |
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0
diff
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|
2422 } else if (s == vmSymbols::java_lang_Long() || |
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0
diff
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|
2423 s == vmSymbols::java_lang_Double()) { |
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0
diff
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|
2424 out_sig_bt[total_c_args-1] = T_LONG; |
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0
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|
2425 out_sig_bt[total_c_args++] = T_VOID; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2426 } |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
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|
2427 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
018d5b58dd4f
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kamg
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0
diff
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|
2428 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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kamg
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0
diff
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|
2429 out_sig_bt[total_c_args++] = T_VOID; |
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kamg
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0
diff
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|
2430 } |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
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|
2431 } |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2432 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
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|
2433 assert(i==total_args_passed, "validly parsed signature"); |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
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|
2434 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
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|
2435 // Now get the compiled-Java layout as input arguments |
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0
diff
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|
2436 int comp_args_on_stack; |
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0
diff
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|
2437 comp_args_on_stack = SharedRuntime::java_calling_convention( |
018d5b58dd4f
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0
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|
2438 in_sig_bt, in_regs, total_args_passed, false); |
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0
diff
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|
2439 |
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0
diff
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|
2440 // Now figure out where the args must be stored and how much stack space |
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0
diff
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|
2441 // they require (neglecting out_preserve_stack_slots). |
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kamg
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0
diff
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|
2442 |
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|
2443 int out_arg_slots; |
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|
2444 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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|
2445 |
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0
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|
2446 // Calculate the total number of stack slots we will need. |
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0
diff
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|
2447 |
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|
2448 // First count the abi requirement plus all of the outgoing args |
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0
diff
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|
2449 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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kamg
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0
diff
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|
2450 |
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0
diff
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|
2451 // Now space for the string(s) we must convert |
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0
diff
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|
2452 |
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|
2453 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2454 for (i = 0; i < total_strings ; i++) { |
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2455 string_locs[i] = stack_slots; |
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2456 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2457 } |
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2458 |
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2459 // + 2 for return address (which we own) and saved rbp, |
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2460 |
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2461 stack_slots += 2; |
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2462 |
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2463 // Ok The space we have allocated will look like: |
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2464 // |
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2465 // |
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2466 // FP-> | | |
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2467 // |---------------------| |
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2468 // | string[n] | |
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2469 // |---------------------| <- string_locs[n] |
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2470 // | string[n-1] | |
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2471 // |---------------------| <- string_locs[n-1] |
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2472 // | ... | |
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2473 // | ... | |
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2474 // |---------------------| <- string_locs[1] |
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2475 // | string[0] | |
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2476 // |---------------------| <- string_locs[0] |
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2477 // | outbound memory | |
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2478 // | based arguments | |
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2479 // | | |
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2480 // |---------------------| |
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2481 // | | |
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2482 // SP-> | out_preserved_slots | |
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2483 // |
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2484 // |
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2485 |
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2486 // Now compute actual number of stack words we need rounding to make |
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2487 // stack properly aligned. |
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2488 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); |
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2489 |
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2490 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2491 |
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2492 intptr_t start = (intptr_t)__ pc(); |
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2493 |
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2494 // First thing make an ic check to see if we should even be here |
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2495 |
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2496 // We are free to use all registers as temps without saving them and |
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2497 // restoring them except rbp. rbp, is the only callee save register |
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2498 // as far as the interpreter and the compiler(s) are concerned. |
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2499 |
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2500 const Register ic_reg = rax; |
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2501 const Register receiver = rcx; |
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2502 Label hit; |
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2503 Label exception_pending; |
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2504 |
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2505 |
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2506 __ verify_oop(receiver); |
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2507 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2508 __ jcc(Assembler::equal, hit); |
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2509 |
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2510 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2511 |
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2512 // verified entry must be aligned for code patching. |
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2513 // and the first 5 bytes must be in the same cache line |
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2514 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2515 __ align(8); |
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2516 |
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2517 __ bind(hit); |
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2518 |
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2519 int vep_offset = ((intptr_t)__ pc()) - start; |
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2520 |
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2521 |
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2522 // The instruction at the verified entry point must be 5 bytes or longer |
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2523 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2524 // instruction fits that requirement. |
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2525 |
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2526 // Generate stack overflow check |
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2527 |
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2528 |
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2529 if (UseStackBanging) { |
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2530 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2531 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2532 } else { |
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2533 __ movl(rax, stack_size); |
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2534 __ bang_stack_size(rax, rbx); |
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2535 } |
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2536 } else { |
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|
2537 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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|
2538 __ fat_nop(); |
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|
2539 } |
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|
2540 |
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2541 assert(((int)__ pc() - start - vep_offset) >= 5, |
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2542 "valid size for make_non_entrant"); |
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2543 |
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2544 // Generate a new frame for the wrapper. |
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|
2545 __ enter(); |
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|
2546 |
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2547 // -2 because return address is already present and so is saved rbp, |
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2548 if (stack_size - 2*wordSize != 0) { |
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2549 __ subl(rsp, stack_size - 2*wordSize); |
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2550 } |
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|
2551 |
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2552 // Frame is now completed as far a size and linkage. |
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2553 |
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2554 int frame_complete = ((intptr_t)__ pc()) - start; |
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2555 |
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2556 // First thing we do store all the args as if we are doing the call. |
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2557 // Since the C calling convention is stack based that ensures that |
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2558 // all the Java register args are stored before we need to convert any |
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2559 // string we might have. |
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|
2560 |
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|
2561 int sid = 0; |
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2562 int c_arg, j_arg; |
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2563 int string_reg = 0; |
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2564 |
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2565 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2566 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2567 |
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2568 VMRegPair src = in_regs[j_arg]; |
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2569 VMRegPair dst = out_regs[c_arg]; |
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2570 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID, |
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2571 "stack based abi assumed"); |
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|
2572 |
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2573 switch (in_sig_bt[j_arg]) { |
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2574 |
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2575 case T_ARRAY: |
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|
2576 case T_OBJECT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2577 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2578 // Any register based arg for a java string after the first |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2579 // will be destroyed by the call to get_utf so we store |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2580 // the original value in the location the utf string address |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2581 // will eventually be stored. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2582 if (src.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2583 if (string_reg++ != 0) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2584 simple_move32(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2585 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2586 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2587 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2588 // need to unbox a one-word value |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2589 Register in_reg = rax; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2590 if ( src.first()->is_reg() ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2591 in_reg = src.first()->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2592 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2593 simple_move32(masm, src, in_reg->as_VMReg()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2594 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2595 Label skipUnbox; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2596 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2597 if ( out_sig_bt[c_arg] == T_LONG ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2598 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2599 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2600 __ testl(in_reg, in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2601 __ jcc(Assembler::zero, skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2602 assert(dst.first()->is_stack() && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2603 (!dst.second()->is_valid() || dst.second()->is_stack()), |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2604 "value(s) must go into stack slots"); |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2605 |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2606 BasicType bt = out_sig_bt[c_arg]; |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2607 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2608 if ( bt == T_LONG ) { |
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2609 __ movl(rbx, Address(in_reg, |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2610 box_offset + VMRegImpl::stack_slot_size)); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2611 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2612 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2613 __ movl(in_reg, Address(in_reg, box_offset)); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2614 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2615 __ bind(skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2616 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2617 // Convert the arg to NULL |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2618 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2619 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2620 if (out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2621 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2622 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2623 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2624 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2625 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2626 case T_VOID: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2627 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2628 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2629 case T_FLOAT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2630 float_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2631 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2632 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2633 case T_DOUBLE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2634 assert( j_arg + 1 < total_args_passed && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2635 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2636 double_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2637 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2638 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2639 case T_LONG : |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2640 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2641 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2642 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2643 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2644 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2645 default: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2646 simple_move32(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2647 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2648 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2649 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2650 // Now we must convert any string we have to utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2651 // |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2652 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2653 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2654 sid < total_strings ; j_arg++, c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2655 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2656 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2657 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2658 Address utf8_addr = Address( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2659 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2660 __ leal(rax, utf8_addr); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2661 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2662 // The first string we find might still be in the original java arg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2663 // register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2664 VMReg orig_loc = in_regs[j_arg].first(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2665 Register string_oop; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2666 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2667 // This is where the argument will eventually reside |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2668 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first())); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2669 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2670 if (sid == 1 && orig_loc->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2671 string_oop = orig_loc->as_Register(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2672 assert(string_oop != rax, "smashed arg"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2673 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2674 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2675 if (orig_loc->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2676 // Get the copy of the jls object |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2677 __ movl(rcx, dest); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2678 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2679 // arg is still in the original location |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2680 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc))); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2681 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2682 string_oop = rcx; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2683 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2684 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2685 Label nullString; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2686 __ movl(dest, NULL_WORD); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2687 __ testl(string_oop, string_oop); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2688 __ jcc(Assembler::zero, nullString); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2689 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2690 // Now we can store the address of the utf string as the argument |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2691 __ movl(dest, rax); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2692 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2693 // And do the conversion |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2694 __ call_VM_leaf(CAST_FROM_FN_PTR( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2695 address, SharedRuntime::get_utf), string_oop, rax); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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2696 __ bind(nullString); |
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2697 } |
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2698 |
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2699 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2700 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2701 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
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2702 } |
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2703 } |
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2704 |
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2705 |
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2706 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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2707 // patch in the trap |
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2708 |
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2709 int patch_offset = ((intptr_t)__ pc()) - start; |
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2710 |
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2711 __ nop(); |
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2712 |
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2713 |
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2714 // Return |
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2715 |
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2716 __ leave(); |
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2717 __ ret(0); |
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2718 |
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2719 __ flush(); |
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2720 |
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2721 nmethod *nm = nmethod::new_dtrace_nmethod( |
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2722 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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2723 stack_slots / VMRegImpl::slots_per_word); |
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2724 return nm; |
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2725 |
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2726 } |
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2727 |
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2728 #endif // HAVE_DTRACE_H |
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2729 |
0 | 2730 // this function returns the adjust size (in number of words) to a c2i adapter |
2731 // activation for use during deoptimization | |
2732 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 2733 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 2734 } |
2735 | |
2736 | |
2737 uint SharedRuntime::out_preserve_stack_slots() { | |
2738 return 0; | |
2739 } | |
2740 | |
2741 | |
2742 //------------------------------generate_deopt_blob---------------------------- | |
2743 void SharedRuntime::generate_deopt_blob() { | |
2744 // allocate space for the code | |
2745 ResourceMark rm; | |
2746 // setup code generation tools | |
2747 CodeBuffer buffer("deopt_blob", 1024, 1024); | |
2748 MacroAssembler* masm = new MacroAssembler(&buffer); | |
2749 int frame_size_in_words; | |
2750 OopMap* map = NULL; | |
2751 // Account for the extra args we place on the stack | |
2752 // by the time we call fetch_unroll_info | |
2753 const int additional_words = 2; // deopt kind, thread | |
2754 | |
2755 OopMapSet *oop_maps = new OopMapSet(); | |
2756 | |
2757 // ------------- | |
2758 // This code enters when returning to a de-optimized nmethod. A return | |
2759 // address has been pushed on the the stack, and return values are in | |
2760 // registers. | |
2761 // If we are doing a normal deopt then we were called from the patched | |
2762 // nmethod from the point we returned to the nmethod. So the return | |
2763 // address on the stack is wrong by NativeCall::instruction_size | |
2764 // We will adjust the value to it looks like we have the original return | |
2765 // address on the stack (like when we eagerly deoptimized). | |
2766 // In the case of an exception pending with deoptimized then we enter | |
2767 // with a return address on the stack that points after the call we patched | |
2768 // into the exception handler. We have the following register state: | |
2769 // rax,: exception | |
2770 // rbx,: exception handler | |
2771 // rdx: throwing pc | |
2772 // So in this case we simply jam rdx into the useless return address and | |
2773 // the stack looks just like we want. | |
2774 // | |
2775 // At this point we need to de-opt. We save the argument return | |
2776 // registers. We call the first C routine, fetch_unroll_info(). This | |
2777 // routine captures the return values and returns a structure which | |
2778 // describes the current frame size and the sizes of all replacement frames. | |
2779 // The current frame is compiled code and may contain many inlined | |
2780 // functions, each with their own JVM state. We pop the current frame, then | |
2781 // push all the new frames. Then we call the C routine unpack_frames() to | |
2782 // populate these frames. Finally unpack_frames() returns us the new target | |
2783 // address. Notice that callee-save registers are BLOWN here; they have | |
2784 // already been captured in the vframeArray at the time the return PC was | |
2785 // patched. | |
2786 address start = __ pc(); | |
2787 Label cont; | |
2788 | |
2789 // Prolog for non exception case! | |
2790 | |
2791 // Save everything in sight. | |
2792 | |
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2793 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
0 | 2794 // Normal deoptimization |
304 | 2795 __ push(Deoptimization::Unpack_deopt); |
0 | 2796 __ jmp(cont); |
2797 | |
2798 int reexecute_offset = __ pc() - start; | |
2799 | |
2800 // Reexecute case | |
2801 // return address is the pc describes what bci to do re-execute at | |
2802 | |
2803 // No need to update map as each call to save_live_registers will produce identical oopmap | |
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2804 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
0 | 2805 |
304 | 2806 __ push(Deoptimization::Unpack_reexecute); |
0 | 2807 __ jmp(cont); |
2808 | |
2809 int exception_offset = __ pc() - start; | |
2810 | |
2811 // Prolog for exception case | |
2812 | |
2813 // all registers are dead at this entry point, except for rax, and | |
2814 // rdx which contain the exception oop and exception pc | |
2815 // respectively. Set them in TLS and fall thru to the | |
2816 // unpack_with_exception_in_tls entry point. | |
2817 | |
2818 __ get_thread(rdi); | |
304 | 2819 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); |
2820 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); | |
0 | 2821 |
2822 int exception_in_tls_offset = __ pc() - start; | |
2823 | |
2824 // new implementation because exception oop is now passed in JavaThread | |
2825 | |
2826 // Prolog for exception case | |
2827 // All registers must be preserved because they might be used by LinearScan | |
2828 // Exceptiop oop and throwing PC are passed in JavaThread | |
2829 // tos: stack at point of call to method that threw the exception (i.e. only | |
2830 // args are on the stack, no return address) | |
2831 | |
2832 // make room on stack for the return address | |
2833 // It will be patched later with the throwing pc. The correct value is not | |
2834 // available now because loading it from memory would destroy registers. | |
304 | 2835 __ push(0); |
0 | 2836 |
2837 // Save everything in sight. | |
2838 | |
2839 // No need to update map as each call to save_live_registers will produce identical oopmap | |
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2840 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
0 | 2841 |
2842 // Now it is safe to overwrite any register | |
2843 | |
2844 // store the correct deoptimization type | |
304 | 2845 __ push(Deoptimization::Unpack_exception); |
0 | 2846 |
2847 // load throwing pc from JavaThread and patch it as the return address | |
2848 // of the current frame. Then clear the field in JavaThread | |
2849 __ get_thread(rdi); | |
304 | 2850 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); |
2851 __ movptr(Address(rbp, wordSize), rdx); | |
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2852 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); |
0 | 2853 |
2854 #ifdef ASSERT | |
2855 // verify that there is really an exception oop in JavaThread | |
304 | 2856 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); |
0 | 2857 __ verify_oop(rax); |
2858 | |
2859 // verify that there is no pending exception | |
2860 Label no_pending_exception; | |
304 | 2861 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); |
2862 __ testptr(rax, rax); | |
0 | 2863 __ jcc(Assembler::zero, no_pending_exception); |
2864 __ stop("must not have pending exception here"); | |
2865 __ bind(no_pending_exception); | |
2866 #endif | |
2867 | |
2868 __ bind(cont); | |
2869 | |
2870 // Compiled code leaves the floating point stack dirty, empty it. | |
2871 __ empty_FPU_stack(); | |
2872 | |
2873 | |
2874 // Call C code. Need thread and this frame, but NOT official VM entry | |
2875 // crud. We cannot block on this call, no GC can happen. | |
2876 __ get_thread(rcx); | |
304 | 2877 __ push(rcx); |
0 | 2878 // fetch_unroll_info needs to call last_java_frame() |
2879 __ set_last_Java_frame(rcx, noreg, noreg, NULL); | |
2880 | |
2881 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); | |
2882 | |
2883 // Need to have an oopmap that tells fetch_unroll_info where to | |
2884 // find any register it might need. | |
2885 | |
2886 oop_maps->add_gc_map( __ pc()-start, map); | |
2887 | |
2888 // Discard arg to fetch_unroll_info | |
304 | 2889 __ pop(rcx); |
0 | 2890 |
2891 __ get_thread(rcx); | |
2892 __ reset_last_Java_frame(rcx, false, false); | |
2893 | |
2894 // Load UnrollBlock into EDI | |
304 | 2895 __ mov(rdi, rax); |
0 | 2896 |
2897 // Move the unpack kind to a safe place in the UnrollBlock because | |
2898 // we are very short of registers | |
2899 | |
2900 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()); | |
2901 // retrieve the deopt kind from where we left it. | |
304 | 2902 __ pop(rax); |
0 | 2903 __ movl(unpack_kind, rax); // save the unpack_kind value |
2904 | |
2905 Label noException; | |
2906 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? | |
2907 __ jcc(Assembler::notEqual, noException); | |
304 | 2908 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); |
2909 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); | |
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2910 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); |
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2911 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); |
0 | 2912 |
2913 __ verify_oop(rax); | |
2914 | |
2915 // Overwrite the result registers with the exception results. | |
304 | 2916 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
2917 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
0 | 2918 |
2919 __ bind(noException); | |
2920 | |
2921 // Stack is back to only having register save data on the stack. | |
2922 // Now restore the result registers. Everything else is either dead or captured | |
2923 // in the vframeArray. | |
2924 | |
2925 RegisterSaver::restore_result_registers(masm); | |
2926 | |
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2927 // Non standard control word may be leaked out through a safepoint blob, and we can |
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2928 // deopt at a poll point with the non standard control word. However, we should make |
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2929 // sure the control word is correct after restore_result_registers. |
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2930 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); |
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2931 |
0 | 2932 // All of the register save area has been popped of the stack. Only the |
2933 // return address remains. | |
2934 | |
2935 // Pop all the frames we must move/replace. | |
2936 // | |
2937 // Frame picture (youngest to oldest) | |
2938 // 1: self-frame (no frame link) | |
2939 // 2: deopting frame (no frame link) | |
2940 // 3: caller of deopting frame (could be compiled/interpreted). | |
2941 // | |
2942 // Note: by leaving the return address of self-frame on the stack | |
2943 // and using the size of frame 2 to adjust the stack | |
2944 // when we are done the return to frame 3 will still be on the stack. | |
2945 | |
2946 // Pop deoptimized frame | |
304 | 2947 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
0 | 2948 |
2949 // sp should be pointing at the return address to the caller (3) | |
2950 | |
2951 // Stack bang to make sure there's enough room for these interpreter frames. | |
2952 if (UseStackBanging) { | |
2953 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
2954 __ bang_stack_size(rbx, rcx); | |
2955 } | |
2956 | |
2957 // Load array of frame pcs into ECX | |
304 | 2958 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
2959 | |
2960 __ pop(rsi); // trash the old pc | |
0 | 2961 |
2962 // Load array of frame sizes into ESI | |
304 | 2963 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 2964 |
2965 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
2966 | |
2967 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
2968 __ movl(counter, rbx); | |
2969 | |
2970 // Pick up the initial fp we should save | |
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2971 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 2972 |
2973 // Now adjust the caller's stack to make up for the extra locals | |
2974 // but record the original sp so that we can save it in the skeletal interpreter | |
2975 // frame and the stack walking of interpreter_sender will get the unextended sp | |
2976 // value and not the "real" sp value. | |
2977 | |
2978 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
304 | 2979 __ movptr(sp_temp, rsp); |
2980 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
2981 __ subptr(rsp, rbx); | |
0 | 2982 |
2983 // Push interpreter frames in a loop | |
2984 Label loop; | |
2985 __ bind(loop); | |
304 | 2986 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
0 | 2987 #ifdef CC_INTERP |
304 | 2988 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
0 | 2989 #ifdef ASSERT |
304 | 2990 __ push(0xDEADDEAD); // Make a recognizable pattern |
2991 __ push(0xDEADDEAD); | |
0 | 2992 #else /* ASSERT */ |
304 | 2993 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
0 | 2994 #endif /* ASSERT */ |
2995 #else /* CC_INTERP */ | |
304 | 2996 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
0 | 2997 #endif /* CC_INTERP */ |
304 | 2998 __ pushptr(Address(rcx, 0)); // save return address |
0 | 2999 __ enter(); // save old & set new rbp, |
304 | 3000 __ subptr(rsp, rbx); // Prolog! |
3001 __ movptr(rbx, sp_temp); // sender's sp | |
0 | 3002 #ifdef CC_INTERP |
304 | 3003 __ movptr(Address(rbp, |
0 | 3004 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
3005 rbx); // Make it walkable | |
3006 #else /* CC_INTERP */ | |
3007 // This value is corrected by layout_activation_impl | |
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3008 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); |
304 | 3009 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
0 | 3010 #endif /* CC_INTERP */ |
304 | 3011 __ movptr(sp_temp, rsp); // pass to next frame |
3012 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3013 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3014 __ decrementl(counter); // decrement counter | |
0 | 3015 __ jcc(Assembler::notZero, loop); |
304 | 3016 __ pushptr(Address(rcx, 0)); // save final return address |
0 | 3017 |
3018 // Re-push self-frame | |
3019 __ enter(); // save old & set new rbp, | |
3020 | |
3021 // Return address and rbp, are in place | |
3022 // We'll push additional args later. Just allocate a full sized | |
3023 // register save area | |
304 | 3024 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); |
0 | 3025 |
3026 // Restore frame locals after moving the frame | |
304 | 3027 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
3028 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
0 | 3029 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local |
3030 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
3031 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
3032 | |
3033 // Set up the args to unpack_frame | |
3034 | |
3035 __ pushl(unpack_kind); // get the unpack_kind value | |
3036 __ get_thread(rcx); | |
304 | 3037 __ push(rcx); |
0 | 3038 |
3039 // set last_Java_sp, last_Java_fp | |
3040 __ set_last_Java_frame(rcx, noreg, rbp, NULL); | |
3041 | |
3042 // Call C code. Need thread but NOT official VM entry | |
3043 // crud. We cannot block on this call, no GC can happen. Call should | |
3044 // restore return values to their stack-slots with the new SP. | |
3045 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3046 // Set an oopmap for the call site | |
3047 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); | |
3048 | |
3049 // rax, contains the return result type | |
304 | 3050 __ push(rax); |
0 | 3051 |
3052 __ get_thread(rcx); | |
3053 __ reset_last_Java_frame(rcx, false, false); | |
3054 | |
3055 // Collect return values | |
304 | 3056 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); |
3057 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); | |
0 | 3058 |
3059 // Clear floating point stack before returning to interpreter | |
3060 __ empty_FPU_stack(); | |
3061 | |
3062 // Check if we should push the float or double return value. | |
3063 Label results_done, yes_double_value; | |
3064 __ cmpl(Address(rsp, 0), T_DOUBLE); | |
3065 __ jcc (Assembler::zero, yes_double_value); | |
3066 __ cmpl(Address(rsp, 0), T_FLOAT); | |
3067 __ jcc (Assembler::notZero, results_done); | |
3068 | |
3069 // return float value as expected by interpreter | |
3070 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
3071 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
3072 __ jmp(results_done); | |
3073 | |
3074 // return double value as expected by interpreter | |
3075 __ bind(yes_double_value); | |
3076 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
3077 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
3078 | |
3079 __ bind(results_done); | |
3080 | |
3081 // Pop self-frame. | |
3082 __ leave(); // Epilog! | |
3083 | |
3084 // Jump to interpreter | |
3085 __ ret(0); | |
3086 | |
3087 // ------------- | |
3088 // make sure all code is generated | |
3089 masm->flush(); | |
3090 | |
3091 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); | |
3092 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
3093 } | |
3094 | |
3095 | |
3096 #ifdef COMPILER2 | |
3097 //------------------------------generate_uncommon_trap_blob-------------------- | |
3098 void SharedRuntime::generate_uncommon_trap_blob() { | |
3099 // allocate space for the code | |
3100 ResourceMark rm; | |
3101 // setup code generation tools | |
3102 CodeBuffer buffer("uncommon_trap_blob", 512, 512); | |
3103 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3104 | |
3105 enum frame_layout { | |
3106 arg0_off, // thread sp + 0 // Arg location for | |
3107 arg1_off, // unloaded_class_index sp + 1 // calling C | |
3108 // The frame sender code expects that rbp will be in the "natural" place and | |
3109 // will override any oopMap setting for it. We must therefore force the layout | |
3110 // so that it agrees with the frame sender code. | |
3111 rbp_off, // callee saved register sp + 2 | |
3112 return_off, // slot for return address sp + 3 | |
3113 framesize | |
3114 }; | |
3115 | |
3116 address start = __ pc(); | |
3117 // Push self-frame. | |
304 | 3118 __ subptr(rsp, return_off*wordSize); // Epilog! |
0 | 3119 |
3120 // rbp, is an implicitly saved callee saved register (i.e. the calling | |
3121 // convention will save restore it in prolog/epilog) Other than that | |
3122 // there are no callee save registers no that adapter frames are gone. | |
304 | 3123 __ movptr(Address(rsp, rbp_off*wordSize), rbp); |
0 | 3124 |
3125 // Clear the floating point exception stack | |
3126 __ empty_FPU_stack(); | |
3127 | |
3128 // set last_Java_sp | |
3129 __ get_thread(rdx); | |
3130 __ set_last_Java_frame(rdx, noreg, noreg, NULL); | |
3131 | |
3132 // Call C code. Need thread but NOT official VM entry | |
3133 // crud. We cannot block on this call, no GC can happen. Call should | |
3134 // capture callee-saved registers as well as return values. | |
304 | 3135 __ movptr(Address(rsp, arg0_off*wordSize), rdx); |
0 | 3136 // argument already in ECX |
3137 __ movl(Address(rsp, arg1_off*wordSize),rcx); | |
3138 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); | |
3139 | |
3140 // Set an oopmap for the call site | |
3141 OopMapSet *oop_maps = new OopMapSet(); | |
3142 OopMap* map = new OopMap( framesize, 0 ); | |
3143 // No oopMap for rbp, it is known implicitly | |
3144 | |
3145 oop_maps->add_gc_map( __ pc()-start, map); | |
3146 | |
3147 __ get_thread(rcx); | |
3148 | |
3149 __ reset_last_Java_frame(rcx, false, false); | |
3150 | |
3151 // Load UnrollBlock into EDI | |
304 | 3152 __ movptr(rdi, rax); |
0 | 3153 |
3154 // Pop all the frames we must move/replace. | |
3155 // | |
3156 // Frame picture (youngest to oldest) | |
3157 // 1: self-frame (no frame link) | |
3158 // 2: deopting frame (no frame link) | |
3159 // 3: caller of deopting frame (could be compiled/interpreted). | |
3160 | |
3161 // Pop self-frame. We have no frame, and must rely only on EAX and ESP. | |
304 | 3162 __ addptr(rsp,(framesize-1)*wordSize); // Epilog! |
0 | 3163 |
3164 // Pop deoptimized frame | |
304 | 3165 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
3166 __ addptr(rsp, rcx); | |
0 | 3167 |
3168 // sp should be pointing at the return address to the caller (3) | |
3169 | |
3170 // Stack bang to make sure there's enough room for these interpreter frames. | |
3171 if (UseStackBanging) { | |
3172 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3173 __ bang_stack_size(rbx, rcx); | |
3174 } | |
3175 | |
3176 | |
3177 // Load array of frame pcs into ECX | |
3178 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
3179 | |
304 | 3180 __ pop(rsi); // trash the pc |
0 | 3181 |
3182 // Load array of frame sizes into ESI | |
304 | 3183 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3184 |
3185 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
3186 | |
3187 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3188 __ movl(counter, rbx); | |
3189 | |
3190 // Pick up the initial fp we should save | |
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3191 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3192 |
3193 // Now adjust the caller's stack to make up for the extra locals | |
3194 // but record the original sp so that we can save it in the skeletal interpreter | |
3195 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3196 // value and not the "real" sp value. | |
3197 | |
3198 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
304 | 3199 __ movptr(sp_temp, rsp); |
3200 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
3201 __ subptr(rsp, rbx); | |
0 | 3202 |
3203 // Push interpreter frames in a loop | |
3204 Label loop; | |
3205 __ bind(loop); | |
304 | 3206 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
0 | 3207 #ifdef CC_INTERP |
304 | 3208 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
0 | 3209 #ifdef ASSERT |
304 | 3210 __ push(0xDEADDEAD); // Make a recognizable pattern |
3211 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...) | |
0 | 3212 #else /* ASSERT */ |
304 | 3213 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
0 | 3214 #endif /* ASSERT */ |
3215 #else /* CC_INTERP */ | |
304 | 3216 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
0 | 3217 #endif /* CC_INTERP */ |
304 | 3218 __ pushptr(Address(rcx, 0)); // save return address |
0 | 3219 __ enter(); // save old & set new rbp, |
304 | 3220 __ subptr(rsp, rbx); // Prolog! |
3221 __ movptr(rbx, sp_temp); // sender's sp | |
0 | 3222 #ifdef CC_INTERP |
304 | 3223 __ movptr(Address(rbp, |
0 | 3224 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
3225 rbx); // Make it walkable | |
3226 #else /* CC_INTERP */ | |
3227 // This value is corrected by layout_activation_impl | |
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3228 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); |
304 | 3229 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
0 | 3230 #endif /* CC_INTERP */ |
304 | 3231 __ movptr(sp_temp, rsp); // pass to next frame |
3232 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3233 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3234 __ decrementl(counter); // decrement counter | |
0 | 3235 __ jcc(Assembler::notZero, loop); |
304 | 3236 __ pushptr(Address(rcx, 0)); // save final return address |
0 | 3237 |
3238 // Re-push self-frame | |
3239 __ enter(); // save old & set new rbp, | |
304 | 3240 __ subptr(rsp, (framesize-2) * wordSize); // Prolog! |
0 | 3241 |
3242 | |
3243 // set last_Java_sp, last_Java_fp | |
3244 __ get_thread(rdi); | |
3245 __ set_last_Java_frame(rdi, noreg, rbp, NULL); | |
3246 | |
3247 // Call C code. Need thread but NOT official VM entry | |
3248 // crud. We cannot block on this call, no GC can happen. Call should | |
3249 // restore return values to their stack-slots with the new SP. | |
304 | 3250 __ movptr(Address(rsp,arg0_off*wordSize),rdi); |
0 | 3251 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); |
3252 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3253 // Set an oopmap for the call site | |
3254 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); | |
3255 | |
3256 __ get_thread(rdi); | |
3257 __ reset_last_Java_frame(rdi, true, false); | |
3258 | |
3259 // Pop self-frame. | |
3260 __ leave(); // Epilog! | |
3261 | |
3262 // Jump to interpreter | |
3263 __ ret(0); | |
3264 | |
3265 // ------------- | |
3266 // make sure all code is generated | |
3267 masm->flush(); | |
3268 | |
3269 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); | |
3270 } | |
3271 #endif // COMPILER2 | |
3272 | |
3273 //------------------------------generate_handler_blob------ | |
3274 // | |
3275 // Generate a special Compile2Runtime blob that saves all registers, | |
3276 // setup oopmap, and calls safepoint code to stop the compiled code for | |
3277 // a safepoint. | |
3278 // | |
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3279 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
0 | 3280 |
3281 // Account for thread arg in our frame | |
3282 const int additional_words = 1; | |
3283 int frame_size_in_words; | |
3284 | |
3285 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); | |
3286 | |
3287 ResourceMark rm; | |
3288 OopMapSet *oop_maps = new OopMapSet(); | |
3289 OopMap* map; | |
3290 | |
3291 // allocate space for the code | |
3292 // setup code generation tools | |
3293 CodeBuffer buffer("handler_blob", 1024, 512); | |
3294 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3295 | |
3296 const Register java_thread = rdi; // callee-saved for VC++ | |
3297 address start = __ pc(); | |
3298 address call_pc = NULL; | |
3299 | |
3300 // If cause_return is true we are at a poll_return and there is | |
3301 // the return address on the stack to the caller on the nmethod | |
3302 // that is safepoint. We can leave this return on the stack and | |
3303 // effectively complete the return and safepoint in the caller. | |
3304 // Otherwise we push space for a return address that the safepoint | |
3305 // handler will install later to make the stack walking sensible. | |
3306 if( !cause_return ) | |
304 | 3307 __ push(rbx); // Make room for return address (or push it again) |
0 | 3308 |
3309 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); | |
3310 | |
3311 // The following is basically a call_VM. However, we need the precise | |
3312 // address of the call in order to generate an oopmap. Hence, we do all the | |
3313 // work ourselves. | |
3314 | |
3315 // Push thread argument and setup last_Java_sp | |
3316 __ get_thread(java_thread); | |
304 | 3317 __ push(java_thread); |
0 | 3318 __ set_last_Java_frame(java_thread, noreg, noreg, NULL); |
3319 | |
3320 // if this was not a poll_return then we need to correct the return address now. | |
3321 if( !cause_return ) { | |
304 | 3322 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset())); |
3323 __ movptr(Address(rbp, wordSize), rax); | |
0 | 3324 } |
3325 | |
3326 // do the call | |
3327 __ call(RuntimeAddress(call_ptr)); | |
3328 | |
3329 // Set an oopmap for the call site. This oopmap will map all | |
3330 // oop-registers and debug-info registers as callee-saved. This | |
3331 // will allow deoptimization at this safepoint to find all possible | |
3332 // debug-info recordings, as well as let GC find all oops. | |
3333 | |
3334 oop_maps->add_gc_map( __ pc() - start, map); | |
3335 | |
3336 // Discard arg | |
304 | 3337 __ pop(rcx); |
0 | 3338 |
3339 Label noException; | |
3340 | |
3341 // Clear last_Java_sp again | |
3342 __ get_thread(java_thread); | |
3343 __ reset_last_Java_frame(java_thread, false, false); | |
3344 | |
304 | 3345 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3346 __ jcc(Assembler::equal, noException); |
3347 | |
3348 // Exception pending | |
3349 | |
3350 RegisterSaver::restore_live_registers(masm); | |
3351 | |
3352 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3353 | |
3354 __ bind(noException); | |
3355 | |
3356 // Normal exit, register restoring and exit | |
3357 RegisterSaver::restore_live_registers(masm); | |
3358 | |
3359 __ ret(0); | |
3360 | |
3361 // make sure all code is generated | |
3362 masm->flush(); | |
3363 | |
3364 // Fill-out other meta info | |
3365 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3366 } | |
3367 | |
3368 // | |
3369 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3370 // | |
3371 // Generate a stub that calls into vm to find out the proper destination | |
3372 // of a java call. All the argument registers are live at this point | |
3373 // but since this is generic code we don't know what they are and the caller | |
3374 // must do any gc of the args. | |
3375 // | |
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3376 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3377 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3378 | |
3379 // allocate space for the code | |
3380 ResourceMark rm; | |
3381 | |
3382 CodeBuffer buffer(name, 1000, 512); | |
3383 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3384 | |
3385 int frame_size_words; | |
3386 enum frame_layout { | |
3387 thread_off, | |
3388 extra_words }; | |
3389 | |
3390 OopMapSet *oop_maps = new OopMapSet(); | |
3391 OopMap* map = NULL; | |
3392 | |
3393 int start = __ offset(); | |
3394 | |
3395 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); | |
3396 | |
3397 int frame_complete = __ offset(); | |
3398 | |
3399 const Register thread = rdi; | |
3400 __ get_thread(rdi); | |
3401 | |
304 | 3402 __ push(thread); |
0 | 3403 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
3404 | |
3405 __ call(RuntimeAddress(destination)); | |
3406 | |
3407 | |
3408 // Set an oopmap for the call site. | |
3409 // We need this not only for callee-saved registers, but also for volatile | |
3410 // registers that the compiler might be keeping live across a safepoint. | |
3411 | |
3412 oop_maps->add_gc_map( __ offset() - start, map); | |
3413 | |
3414 // rax, contains the address we are going to jump to assuming no exception got installed | |
3415 | |
304 | 3416 __ addptr(rsp, wordSize); |
0 | 3417 |
3418 // clear last_Java_sp | |
3419 __ reset_last_Java_frame(thread, true, false); | |
3420 // check for pending exceptions | |
3421 Label pending; | |
304 | 3422 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3423 __ jcc(Assembler::notEqual, pending); |
3424 | |
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3425 // get the returned Method* |
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3426 __ get_vm_result_2(rbx, thread); |
304 | 3427 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); |
3428 | |
3429 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); | |
0 | 3430 |
3431 RegisterSaver::restore_live_registers(masm); | |
3432 | |
3433 // We are back the the original state on entry and ready to go. | |
3434 | |
3435 __ jmp(rax); | |
3436 | |
3437 // Pending exception after the safepoint | |
3438 | |
3439 __ bind(pending); | |
3440 | |
3441 RegisterSaver::restore_live_registers(masm); | |
3442 | |
3443 // exception pending => remove activation and forward to exception handler | |
3444 | |
3445 __ get_thread(thread); | |
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3446 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
304 | 3447 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
0 | 3448 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3449 | |
3450 // ------------- | |
3451 // make sure all code is generated | |
3452 masm->flush(); | |
3453 | |
3454 // return the blob | |
3455 // frame_size_words or bytes?? | |
3456 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); | |
3457 } |