Mercurial > hg > graal-compiler
annotate src/cpu/ppc/vm/interp_masm_ppc_64.hpp @ 14443:3205e78d8193
8029396: PPC64 (part 212): Several memory ordering fixes in C-code.
Summary: memory ordering fixes in GC and other runtime code showing on PPC64.
Reviewed-by: kvn, coleenp
author | goetz |
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date | Mon, 02 Dec 2013 10:26:14 +0100 |
parents | ec28f9c041ff |
children | 67fa91961822 |
rev | line source |
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1 /* |
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2 * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved. |
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3 * Copyright 2012, 2013 SAP AG. All rights reserved. |
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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5 * |
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6 * This code is free software; you can redistribute it and/or modify it |
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7 * under the terms of the GNU General Public License version 2 only, as |
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8 * published by the Free Software Foundation. |
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9 * |
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10 * This code is distributed in the hope that it will be useful, but WITHOUT |
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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13 * version 2 for more details (a copy is included in the LICENSE file that |
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14 * accompanied this code). |
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15 * |
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16 * You should have received a copy of the GNU General Public License version |
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17 * 2 along with this work; if not, write to the Free Software Foundation, |
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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19 * |
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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21 * or visit www.oracle.com if you need additional information or have any |
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22 * questions. |
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23 * |
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24 */ |
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25 |
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26 #ifndef CPU_PPC_VM_INTERP_MASM_PPC_64_HPP |
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27 #define CPU_PPC_VM_INTERP_MASM_PPC_64_HPP |
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28 |
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29 #include "assembler_ppc.inline.hpp" |
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30 #include "interpreter/invocationCounter.hpp" |
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31 |
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32 // This file specializes the assembler with interpreter-specific macros |
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33 |
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34 |
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35 class InterpreterMacroAssembler: public MacroAssembler { |
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36 |
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37 public: |
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38 InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code) {} |
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39 |
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40 // Handy address generation macros |
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41 #define thread_(field_name) in_bytes(JavaThread::field_name ## _offset()), R16_thread |
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42 #define method_(field_name) in_bytes(Method::field_name ## _offset()), R19_method |
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43 |
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44 #ifdef CC_INTERP |
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45 #define state_(field_name) in_bytes(byte_offset_of(BytecodeInterpreter, field_name)), R14_state |
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46 #define prev_state_(field_name) in_bytes(byte_offset_of(BytecodeInterpreter, field_name)), R15_prev_state |
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47 #endif |
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48 |
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49 void get_method_counters(Register method, Register Rcounters, Label& skip); |
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50 void increment_invocation_counter(Register iv_be_count, Register Rtmp1, Register Rtmp2_r0); |
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51 |
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52 // Object locking |
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53 void lock_object (Register lock_reg, Register obj_reg); |
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54 void unlock_object(Register lock_reg); |
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55 |
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56 // Debugging |
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57 void verify_oop(Register reg, TosState state = atos); // only if +VerifyOops && state == atos |
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58 |
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59 // support for jvmdi/jvmpi |
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60 void notify_method_entry(); |
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61 void notify_method_exit(bool save_result, TosState state); |
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62 |
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63 // Convert the current TOP_IJAVA_FRAME into a PARENT_IJAVA_FRAME |
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64 // (using parent_frame_resize) and push a new interpreter |
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65 // TOP_IJAVA_FRAME (using frame_size). |
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66 void push_interpreter_frame(Register top_frame_size, Register parent_frame_resize, |
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67 Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register pc=noreg); |
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68 |
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69 // Pop the topmost TOP_IJAVA_FRAME and convert the previous |
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70 // PARENT_IJAVA_FRAME back into a TOP_IJAVA_FRAME. |
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71 void pop_interpreter_frame(Register tmp1, Register tmp2, Register tmp3, Register tmp4); |
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72 |
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73 // Turn state's interpreter frame into the current TOP_IJAVA_FRAME. |
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74 void pop_interpreter_frame_to_state(Register state, Register tmp1, Register tmp2, Register tmp3); |
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75 |
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76 // Set SP to initial caller's sp, but before fix the back chain. |
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77 void resize_frame_to_initial_caller(Register tmp1, Register tmp2); |
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78 |
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79 // Pop the current interpreter state (without popping the |
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80 // correspoding frame) and restore R14_state and R15_prev_state |
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81 // accordingly. Use prev_state_may_be_0 to indicate whether |
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82 // prev_state may be 0 in order to generate an extra check before |
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83 // retrieving prev_state_(_prev_link). |
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84 void pop_interpreter_state(bool prev_state_may_be_0); |
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85 |
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86 void restore_prev_state(); |
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87 }; |
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88 |
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89 #endif // CPU_PPC_VM_INTERP_MASM_PPC_64_HPP |