Mercurial > hg > graal-compiler
annotate src/cpu/ppc/vm/vm_version_ppc.cpp @ 21151:7ffff68b31fb
Add assert in PEReadEliminationClosure
author | Gilles Duboscq <gilles.m.duboscq@oracle.com> |
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date | Wed, 29 Apr 2015 14:36:13 +0200 |
parents | c5e86c5cd22e |
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rev | line source |
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1 /* |
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2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. |
17807 | 3 * Copyright 2012, 2014 SAP AG. All rights reserved. |
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4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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5 * |
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6 * This code is free software; you can redistribute it and/or modify it |
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7 * under the terms of the GNU General Public License version 2 only, as |
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8 * published by the Free Software Foundation. |
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9 * |
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10 * This code is distributed in the hope that it will be useful, but WITHOUT |
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11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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13 * version 2 for more details (a copy is included in the LICENSE file that |
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14 * accompanied this code). |
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15 * |
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16 * You should have received a copy of the GNU General Public License version |
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17 * 2 along with this work; if not, write to the Free Software Foundation, |
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18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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19 * |
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20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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21 * or visit www.oracle.com if you need additional information or have any |
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22 * questions. |
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23 * |
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24 */ |
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25 |
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26 #include "precompiled.hpp" |
17803 | 27 #include "asm/assembler.inline.hpp" |
28 #include "asm/macroAssembler.inline.hpp" | |
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29 #include "compiler/disassembler.hpp" |
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30 #include "memory/resourceArea.hpp" |
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31 #include "runtime/java.hpp" |
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32 #include "runtime/stubCodeGenerator.hpp" |
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33 #include "utilities/defaultStream.hpp" |
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34 #include "vm_version_ppc.hpp" |
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35 #ifdef TARGET_OS_FAMILY_aix |
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36 # include "os_aix.inline.hpp" |
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37 #endif |
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38 #ifdef TARGET_OS_FAMILY_linux |
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39 # include "os_linux.inline.hpp" |
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40 #endif |
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41 |
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42 # include <sys/sysinfo.h> |
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43 |
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44 int VM_Version::_features = VM_Version::unknown_m; |
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45 int VM_Version::_measured_cache_line_size = 128; // default value |
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46 const char* VM_Version::_features_str = ""; |
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47 bool VM_Version::_is_determine_features_test_running = false; |
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48 |
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49 |
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50 #define MSG(flag) \ |
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51 if (flag && !FLAG_IS_DEFAULT(flag)) \ |
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52 jio_fprintf(defaultStream::error_stream(), \ |
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53 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \ |
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54 " -XX:+" #flag " will be disabled!\n"); |
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55 |
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56 void VM_Version::initialize() { |
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57 |
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58 // Test which instructions are supported and measure cache line size. |
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59 determine_features(); |
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60 |
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61 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features. |
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62 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) { |
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63 if (VM_Version::has_popcntw()) { |
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64 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7); |
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65 } else if (VM_Version::has_cmpb()) { |
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66 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6); |
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67 } else if (VM_Version::has_popcntb()) { |
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68 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5); |
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69 } else { |
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70 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0); |
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71 } |
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72 } |
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73 guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 || |
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74 PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7, |
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75 "PowerArchitecturePPC64 should be 0, 5, 6 or 7"); |
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76 |
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77 if (!UseSIGTRAP) { |
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78 MSG(TrapBasedICMissChecks); |
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79 MSG(TrapBasedNotEntrantChecks); |
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80 MSG(TrapBasedNullChecks); |
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81 FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false); |
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82 FLAG_SET_ERGO(bool, TrapBasedNullChecks, false); |
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83 FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false); |
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84 } |
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85 |
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86 #ifdef COMPILER2 |
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87 if (!UseSIGTRAP) { |
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88 MSG(TrapBasedRangeChecks); |
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89 FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false); |
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90 } |
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91 |
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92 // On Power6 test for section size. |
14445 | 93 if (PowerArchitecturePPC64 == 6) { |
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94 determine_section_size(); |
14445 | 95 // TODO: PPC port } else { |
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96 // TODO: PPC port PdScheduling::power6SectorSize = 0x20; |
14445 | 97 } |
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98 |
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99 MaxVectorSize = 8; |
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100 #endif |
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101 |
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102 // Create and print feature-string. |
14445 | 103 char buf[(num_features+1) * 16]; // Max 16 chars per feature. |
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104 jio_snprintf(buf, sizeof(buf), |
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105 "ppc64%s%s%s%s%s%s%s%s", |
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106 (has_fsqrt() ? " fsqrt" : ""), |
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107 (has_isel() ? " isel" : ""), |
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108 (has_lxarxeh() ? " lxarxeh" : ""), |
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109 (has_cmpb() ? " cmpb" : ""), |
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110 //(has_mftgpr()? " mftgpr" : ""), |
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111 (has_popcntb() ? " popcntb" : ""), |
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112 (has_popcntw() ? " popcntw" : ""), |
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113 (has_fcfids() ? " fcfids" : ""), |
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114 (has_vand() ? " vand" : "") |
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115 // Make sure number of %s matches num_features! |
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116 ); |
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117 _features_str = strdup(buf); |
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118 NOT_PRODUCT(if (Verbose) print_features();); |
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119 |
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120 // PPC64 supports 8-byte compare-exchange operations (see |
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121 // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr) |
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122 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). |
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123 _supports_cx8 = true; |
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124 |
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125 UseSSE = 0; // Only on x86 and x64 |
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126 |
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127 intx cache_line_size = _measured_cache_line_size; |
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128 |
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129 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1; |
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130 |
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131 if (AllocatePrefetchStyle == 4) { |
14445 | 132 AllocatePrefetchStepSize = cache_line_size; // Need exact value. |
133 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default. | |
134 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined? | |
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135 } else { |
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136 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size; |
14445 | 137 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value. |
138 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined? | |
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139 } |
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140 |
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141 assert(AllocatePrefetchLines > 0, "invalid value"); |
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142 if (AllocatePrefetchLines < 1) { // Set valid value in product VM. |
14445 | 143 AllocatePrefetchLines = 1; // Conservative value. |
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144 } |
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145 |
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146 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) { |
14445 | 147 AllocatePrefetchStyle = 1; // Fall back if inappropriate. |
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148 } |
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149 |
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150 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive"); |
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151 |
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152 if (UseCRC32Intrinsics) { |
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153 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) |
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154 warning("CRC32 intrinsics are not available on this CPU"); |
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155 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false); |
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156 } |
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157 |
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158 // The AES intrinsic stubs require AES instruction support. |
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159 if (UseAES) { |
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160 warning("AES instructions are not available on this CPU"); |
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161 FLAG_SET_DEFAULT(UseAES, false); |
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162 } |
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163 if (UseAESIntrinsics) { |
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164 if (!FLAG_IS_DEFAULT(UseAESIntrinsics)) |
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165 warning("AES intrinsics are not available on this CPU"); |
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166 FLAG_SET_DEFAULT(UseAESIntrinsics, false); |
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167 } |
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168 |
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169 if (UseSHA) { |
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170 warning("SHA instructions are not available on this CPU"); |
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171 FLAG_SET_DEFAULT(UseSHA, false); |
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172 } |
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173 if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) { |
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174 warning("SHA intrinsics are not available on this CPU"); |
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175 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); |
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176 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); |
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177 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); |
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178 } |
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179 |
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180 } |
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181 |
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182 void VM_Version::print_features() { |
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183 tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), (int) get_cache_line_size()); |
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184 } |
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185 |
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186 #ifdef COMPILER2 |
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187 // Determine section size on power6: If section size is 8 instructions, |
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188 // there should be a difference between the two testloops of ~15 %. If |
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189 // no difference is detected the section is assumed to be 32 instructions. |
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190 void VM_Version::determine_section_size() { |
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191 |
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192 int unroll = 80; |
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193 |
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194 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord; |
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195 |
14445 | 196 // Allocate space for the code. |
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197 ResourceMark rm; |
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198 CodeBuffer cb("detect_section_size", code_size, 0); |
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199 MacroAssembler* a = new MacroAssembler(&cb); |
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200 |
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201 uint32_t *code = (uint32_t *)a->pc(); |
14445 | 202 // Emit code. |
17803 | 203 void (*test1)() = (void(*)())(void *)a->function_entry(); |
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204 |
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205 Label l1; |
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206 |
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207 a->li(R4, 1); |
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208 a->sldi(R4, R4, 28); |
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209 a->b(l1); |
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210 a->align(CodeEntryAlignment); |
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211 |
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212 a->bind(l1); |
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213 |
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214 for (int i = 0; i < unroll; i++) { |
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215 // Schleife 1 |
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216 // ------- sector 0 ------------ |
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217 // ;; 0 |
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218 a->nop(); // 1 |
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219 a->fpnop0(); // 2 |
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220 a->fpnop1(); // 3 |
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221 a->addi(R4,R4, -1); // 4 |
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222 |
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223 // ;; 1 |
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224 a->nop(); // 5 |
14445 | 225 a->fmr(F6, F6); // 6 |
226 a->fmr(F7, F7); // 7 | |
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227 a->endgroup(); // 8 |
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228 // ------- sector 8 ------------ |
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229 |
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230 // ;; 2 |
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231 a->nop(); // 9 |
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232 a->nop(); // 10 |
14445 | 233 a->fmr(F8, F8); // 11 |
234 a->fmr(F9, F9); // 12 | |
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235 |
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236 // ;; 3 |
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237 a->nop(); // 13 |
14445 | 238 a->fmr(F10, F10); // 14 |
239 a->fmr(F11, F11); // 15 | |
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240 a->endgroup(); // 16 |
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241 // -------- sector 16 ------------- |
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242 |
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243 // ;; 4 |
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244 a->nop(); // 17 |
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245 a->nop(); // 18 |
14445 | 246 a->fmr(F15, F15); // 19 |
247 a->fmr(F16, F16); // 20 | |
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248 |
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249 // ;; 5 |
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250 a->nop(); // 21 |
14445 | 251 a->fmr(F17, F17); // 22 |
252 a->fmr(F18, F18); // 23 | |
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253 a->endgroup(); // 24 |
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254 // ------- sector 24 ------------ |
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255 |
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256 // ;; 6 |
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257 a->nop(); // 25 |
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258 a->nop(); // 26 |
14445 | 259 a->fmr(F19, F19); // 27 |
260 a->fmr(F20, F20); // 28 | |
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261 |
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262 // ;; 7 |
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263 a->nop(); // 29 |
14445 | 264 a->fmr(F21, F21); // 30 |
265 a->fmr(F22, F22); // 31 | |
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266 a->brnop0(); // 32 |
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267 |
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268 // ------- sector 32 ------------ |
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269 } |
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270 |
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271 // ;; 8 |
14445 | 272 a->cmpdi(CCR0, R4, unroll); // 33 |
273 a->bge(CCR0, l1); // 34 | |
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274 a->blr(); |
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275 |
14445 | 276 // Emit code. |
17803 | 277 void (*test2)() = (void(*)())(void *)a->function_entry(); |
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278 // uint32_t *code = (uint32_t *)a->pc(); |
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279 |
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280 Label l2; |
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281 |
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282 a->li(R4, 1); |
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283 a->sldi(R4, R4, 28); |
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284 a->b(l2); |
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285 a->align(CodeEntryAlignment); |
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286 |
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287 a->bind(l2); |
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288 |
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289 for (int i = 0; i < unroll; i++) { |
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290 // Schleife 2 |
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291 // ------- sector 0 ------------ |
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292 // ;; 0 |
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293 a->brnop0(); // 1 |
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294 a->nop(); // 2 |
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295 //a->cmpdi(CCR0, R4, unroll); |
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296 a->fpnop0(); // 3 |
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297 a->fpnop1(); // 4 |
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298 a->addi(R4,R4, -1); // 5 |
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299 |
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300 // ;; 1 |
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301 |
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302 a->nop(); // 6 |
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303 a->fmr(F6, F6); // 7 |
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304 a->fmr(F7, F7); // 8 |
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305 // ------- sector 8 --------------- |
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306 |
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307 // ;; 2 |
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308 a->endgroup(); // 9 |
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309 |
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310 // ;; 3 |
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311 a->nop(); // 10 |
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312 a->nop(); // 11 |
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313 a->fmr(F8, F8); // 12 |
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314 |
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315 // ;; 4 |
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316 a->fmr(F9, F9); // 13 |
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317 a->nop(); // 14 |
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318 a->fmr(F10, F10); // 15 |
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319 |
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320 // ;; 5 |
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321 a->fmr(F11, F11); // 16 |
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322 // -------- sector 16 ------------- |
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323 |
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324 // ;; 6 |
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325 a->endgroup(); // 17 |
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326 |
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327 // ;; 7 |
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328 a->nop(); // 18 |
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329 a->nop(); // 19 |
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330 a->fmr(F15, F15); // 20 |
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331 |
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332 // ;; 8 |
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333 a->fmr(F16, F16); // 21 |
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334 a->nop(); // 22 |
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335 a->fmr(F17, F17); // 23 |
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336 |
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337 // ;; 9 |
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338 a->fmr(F18, F18); // 24 |
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339 // -------- sector 24 ------------- |
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340 |
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341 // ;; 10 |
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342 a->endgroup(); // 25 |
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343 |
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344 // ;; 11 |
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345 a->nop(); // 26 |
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346 a->nop(); // 27 |
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347 a->fmr(F19, F19); // 28 |
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348 |
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349 // ;; 12 |
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350 a->fmr(F20, F20); // 29 |
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351 a->nop(); // 30 |
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352 a->fmr(F21, F21); // 31 |
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353 |
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354 // ;; 13 |
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355 a->fmr(F22, F22); // 32 |
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356 } |
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357 |
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358 // -------- sector 32 ------------- |
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359 // ;; 14 |
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360 a->cmpdi(CCR0, R4, unroll); // 33 |
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361 a->bge(CCR0, l2); // 34 |
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362 |
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363 a->blr(); |
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364 uint32_t *code_end = (uint32_t *)a->pc(); |
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365 a->flush(); |
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366 |
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367 double loop1_seconds,loop2_seconds, rel_diff; |
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368 uint64_t start1, stop1; |
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369 |
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370 start1 = os::current_thread_cpu_time(false); |
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371 (*test1)(); |
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372 stop1 = os::current_thread_cpu_time(false); |
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373 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0); |
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374 |
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375 |
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376 start1 = os::current_thread_cpu_time(false); |
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377 (*test2)(); |
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378 stop1 = os::current_thread_cpu_time(false); |
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379 |
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380 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0); |
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381 |
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382 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100; |
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383 |
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384 if (PrintAssembly) { |
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385 ttyLocker ttyl; |
20644
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386 tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); |
14408
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387 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); |
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388 tty->print_cr("Time loop1 :%f", loop1_seconds); |
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389 tty->print_cr("Time loop2 :%f", loop2_seconds); |
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390 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff); |
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391 |
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392 if (rel_diff > 12.0) { |
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393 tty->print_cr("Section Size 8 Instructions"); |
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394 } else{ |
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395 tty->print_cr("Section Size 32 Instructions or Power5"); |
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396 } |
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397 } |
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398 |
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399 #if 0 // TODO: PPC port |
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400 // Set sector size (if not set explicitly). |
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401 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) { |
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402 if (rel_diff > 12.0) { |
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403 PdScheduling::power6SectorSize = 0x20; |
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404 } else { |
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405 PdScheduling::power6SectorSize = 0x80; |
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406 } |
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407 } else if (Power6SectorSize128PPC64) { |
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408 PdScheduling::power6SectorSize = 0x80; |
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409 } else { |
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410 PdScheduling::power6SectorSize = 0x20; |
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411 } |
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412 #endif |
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413 if (UsePower6SchedulerPPC64) Unimplemented(); |
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414 } |
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415 #endif // COMPILER2 |
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416 |
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417 void VM_Version::determine_features() { |
17803 | 418 #if defined(ABI_ELFv2) |
419 const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect. | |
420 #else | |
14445 | 421 // 7 InstWords for each call (function descriptor + blr instruction). |
422 const int code_size = (num_features+1+2*7)*BytesPerInstWord; | |
17803 | 423 #endif |
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424 int features = 0; |
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425 |
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426 // create test area |
14445 | 427 enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size). |
14408
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428 char test_area[BUFFER_SIZE]; |
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429 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1]; |
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430 |
14445 | 431 // Allocate space for the code. |
14408
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432 ResourceMark rm; |
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433 CodeBuffer cb("detect_cpu_features", code_size, 0); |
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434 MacroAssembler* a = new MacroAssembler(&cb); |
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435 |
17807 | 436 // Must be set to true so we can generate the test code. |
437 _features = VM_Version::all_features_m; | |
438 | |
14445 | 439 // Emit code. |
17803 | 440 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry(); |
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441 uint32_t *code = (uint32_t *)a->pc(); |
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442 // Don't use R0 in ldarx. |
14445 | 443 // Keep R3_ARG1 unmodified, it contains &field (see below). |
444 // Keep R4_ARG2 unmodified, it contains offset = 0 (see below). | |
445 a->fsqrt(F3, F4); // code[0] -> fsqrt_m | |
17807 | 446 a->fsqrts(F3, F4); // code[1] -> fsqrts_m |
447 a->isel(R7, R5, R6, 0); // code[2] -> isel_m | |
448 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m | |
449 a->cmpb(R7, R5, R6); // code[4] -> bcmp | |
450 //a->mftgpr(R7, F3); // code[5] -> mftgpr | |
451 a->popcntb(R7, R5); // code[6] -> popcntb | |
452 a->popcntw(R7, R5); // code[7] -> popcntw | |
453 a->fcfids(F3, F4); // code[8] -> fcfids | |
454 a->vand(VR0, VR0, VR0); // code[9] -> vand | |
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455 a->blr(); |
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456 |
14445 | 457 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it. |
17803 | 458 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry(); |
14445 | 459 a->dcbz(R3_ARG1); // R3_ARG1 = addr |
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460 a->blr(); |
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461 |
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462 uint32_t *code_end = (uint32_t *)a->pc(); |
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463 a->flush(); |
17807 | 464 _features = VM_Version::unknown_m; |
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465 |
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466 // Print the detection code. |
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467 if (PrintAssembly) { |
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468 ttyLocker ttyl; |
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469 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); |
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470 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); |
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471 } |
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472 |
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473 // Measure cache line size. |
14445 | 474 memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF. |
475 (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle. | |
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476 int count = 0; // count zeroed bytes |
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477 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++; |
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478 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2"); |
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479 _measured_cache_line_size = count; |
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480 |
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481 // Execute code. Illegal instructions will be replaced by 0 in the signal handler. |
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482 VM_Version::_is_determine_features_test_running = true; |
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483 (*test)((address)mid_of_test_area, (uint64_t)0); |
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484 VM_Version::_is_determine_features_test_running = false; |
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485 |
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486 // determine which instructions are legal. |
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487 int feature_cntr = 0; |
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488 if (code[feature_cntr++]) features |= fsqrt_m; |
17807 | 489 if (code[feature_cntr++]) features |= fsqrts_m; |
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490 if (code[feature_cntr++]) features |= isel_m; |
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491 if (code[feature_cntr++]) features |= lxarxeh_m; |
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492 if (code[feature_cntr++]) features |= cmpb_m; |
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493 //if(code[feature_cntr++])features |= mftgpr_m; |
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494 if (code[feature_cntr++]) features |= popcntb_m; |
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495 if (code[feature_cntr++]) features |= popcntw_m; |
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496 if (code[feature_cntr++]) features |= fcfids_m; |
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497 if (code[feature_cntr++]) features |= vand_m; |
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498 |
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499 // Print the detection code. |
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500 if (PrintAssembly) { |
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501 ttyLocker ttyl; |
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502 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code)); |
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503 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); |
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504 } |
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505 |
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506 _features = features; |
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507 } |
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508 |
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509 |
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510 static int saved_features = 0; |
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511 |
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512 void VM_Version::allow_all() { |
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513 saved_features = _features; |
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514 _features = all_features_m; |
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515 } |
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516 |
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517 void VM_Version::revert() { |
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518 _features = saved_features; |
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519 } |