Mercurial > hg > graal-compiler
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 6536:845b13a1c4a7
increase code cache size for Graal
author | Lukas Stadler <lukas.stadler@jku.at> |
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date | Tue, 09 Oct 2012 13:34:25 +0200 |
parents | ea845fd3c820 |
children | e522a00b91aa |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "asm/assembler.hpp" | |
27 #include "assembler_x86.inline.hpp" | |
28 #include "code/debugInfoRec.hpp" | |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
32 #include "oops/compiledICHolderOop.hpp" | |
33 #include "prims/jvmtiRedefineClassesTrace.hpp" | |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
0 | 43 |
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44 #define __ masm-> |
0 | 45 |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
0 | 48 class SimpleRuntimeFrame { |
49 | |
50 public: | |
51 | |
52 // Most of the runtime stubs have this simple frame layout. | |
53 // This class exists to make the layout shared in one place. | |
54 // Offsets are for compiler stack slots, which are jints. | |
55 enum layout { | |
56 // The frame sender code expects that rbp will be in the "natural" place and | |
57 // will override any oopMap setting for it. We must therefore force the layout | |
58 // so that it agrees with the frame sender code. | |
59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
60 rbp_off2, | |
61 return_off, return_off2, | |
62 framesize | |
63 }; | |
64 }; | |
65 | |
66 class RegisterSaver { | |
67 // Capture info about frame layout. Layout offsets are in jint | |
68 // units because compiler frame slots are jints. | |
69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
70 enum layout { | |
71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
73 DEF_XMM_OFFS(0), | |
74 DEF_XMM_OFFS(1), | |
75 DEF_XMM_OFFS(2), | |
76 DEF_XMM_OFFS(3), | |
77 DEF_XMM_OFFS(4), | |
78 DEF_XMM_OFFS(5), | |
79 DEF_XMM_OFFS(6), | |
80 DEF_XMM_OFFS(7), | |
81 DEF_XMM_OFFS(8), | |
82 DEF_XMM_OFFS(9), | |
83 DEF_XMM_OFFS(10), | |
84 DEF_XMM_OFFS(11), | |
85 DEF_XMM_OFFS(12), | |
86 DEF_XMM_OFFS(13), | |
87 DEF_XMM_OFFS(14), | |
88 DEF_XMM_OFFS(15), | |
89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
90 fpu_stateH_end, | |
91 r15_off, r15H_off, | |
92 r14_off, r14H_off, | |
93 r13_off, r13H_off, | |
94 r12_off, r12H_off, | |
95 r11_off, r11H_off, | |
96 r10_off, r10H_off, | |
97 r9_off, r9H_off, | |
98 r8_off, r8H_off, | |
99 rdi_off, rdiH_off, | |
100 rsi_off, rsiH_off, | |
101 ignore_off, ignoreH_off, // extra copy of rbp | |
102 rsp_off, rspH_off, | |
103 rbx_off, rbxH_off, | |
104 rdx_off, rdxH_off, | |
105 rcx_off, rcxH_off, | |
106 rax_off, raxH_off, | |
107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
108 align_off, alignH_off, | |
109 flags_off, flagsH_off, | |
110 // The frame sender code expects that rbp will be in the "natural" place and | |
111 // will override any oopMap setting for it. We must therefore force the layout | |
112 // so that it agrees with the frame sender code. | |
113 rbp_off, rbpH_off, // copy of rbp we will restore | |
114 return_off, returnH_off, // slot for return address | |
115 reg_save_size // size in compiler stack slots | |
116 }; | |
117 | |
118 public: | |
119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); | |
120 static void restore_live_registers(MacroAssembler* masm); | |
121 | |
122 // Offsets into the register save area | |
123 // Used by deoptimization when it is managing result register | |
124 // values on its own | |
125 | |
126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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129 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
0 | 130 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
131 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
132 | |
133 // During deoptimization only the result registers need to be restored, | |
134 // all the other values have already been extracted. | |
135 static void restore_result_registers(MacroAssembler* masm); | |
136 }; | |
137 | |
138 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { | |
139 | |
140 // Always make the frame size 16-byte aligned | |
141 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
142 reg_save_size*BytesPerInt, 16); | |
143 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
144 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
145 // The caller will allocate additional_frame_words | |
146 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
147 // CodeBlob frame size is in words. | |
148 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
149 *total_frame_words = frame_size_in_words; | |
150 | |
151 // Save registers, fpu state, and flags. | |
152 // We assume caller has already pushed the return address onto the | |
153 // stack, so rsp is 8-byte aligned here. | |
154 // We push rpb twice in this sequence because we want the real rbp | |
155 // to be under the return like a normal enter. | |
156 | |
157 __ enter(); // rsp becomes 16-byte aligned here | |
158 __ push_CPU_state(); // Push a multiple of 16 bytes | |
159 if (frame::arg_reg_save_area_bytes != 0) { | |
160 // Allocate argument register save area | |
304 | 161 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 162 } |
163 | |
164 // Set an oopmap for the call site. This oopmap will map all | |
165 // oop-registers and debug-info registers as callee-saved. This | |
166 // will allow deoptimization at this safepoint to find all possible | |
167 // debug-info recordings, as well as let GC find all oops. | |
168 | |
169 OopMapSet *oop_maps = new OopMapSet(); | |
170 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
171 map->set_callee_saved(VMRegImpl::stack2reg( rax_off + additional_frame_slots), rax->as_VMReg()); | |
172 map->set_callee_saved(VMRegImpl::stack2reg( rcx_off + additional_frame_slots), rcx->as_VMReg()); | |
173 map->set_callee_saved(VMRegImpl::stack2reg( rdx_off + additional_frame_slots), rdx->as_VMReg()); | |
174 map->set_callee_saved(VMRegImpl::stack2reg( rbx_off + additional_frame_slots), rbx->as_VMReg()); | |
175 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
176 // and the location where rbp was saved by is ignored | |
177 map->set_callee_saved(VMRegImpl::stack2reg( rsi_off + additional_frame_slots), rsi->as_VMReg()); | |
178 map->set_callee_saved(VMRegImpl::stack2reg( rdi_off + additional_frame_slots), rdi->as_VMReg()); | |
179 map->set_callee_saved(VMRegImpl::stack2reg( r8_off + additional_frame_slots), r8->as_VMReg()); | |
180 map->set_callee_saved(VMRegImpl::stack2reg( r9_off + additional_frame_slots), r9->as_VMReg()); | |
181 map->set_callee_saved(VMRegImpl::stack2reg( r10_off + additional_frame_slots), r10->as_VMReg()); | |
182 map->set_callee_saved(VMRegImpl::stack2reg( r11_off + additional_frame_slots), r11->as_VMReg()); | |
183 map->set_callee_saved(VMRegImpl::stack2reg( r12_off + additional_frame_slots), r12->as_VMReg()); | |
184 map->set_callee_saved(VMRegImpl::stack2reg( r13_off + additional_frame_slots), r13->as_VMReg()); | |
185 map->set_callee_saved(VMRegImpl::stack2reg( r14_off + additional_frame_slots), r14->as_VMReg()); | |
186 map->set_callee_saved(VMRegImpl::stack2reg( r15_off + additional_frame_slots), r15->as_VMReg()); | |
187 map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off + additional_frame_slots), xmm0->as_VMReg()); | |
188 map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off + additional_frame_slots), xmm1->as_VMReg()); | |
189 map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off + additional_frame_slots), xmm2->as_VMReg()); | |
190 map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off + additional_frame_slots), xmm3->as_VMReg()); | |
191 map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off + additional_frame_slots), xmm4->as_VMReg()); | |
192 map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off + additional_frame_slots), xmm5->as_VMReg()); | |
193 map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off + additional_frame_slots), xmm6->as_VMReg()); | |
194 map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off + additional_frame_slots), xmm7->as_VMReg()); | |
195 map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off + additional_frame_slots), xmm8->as_VMReg()); | |
196 map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off + additional_frame_slots), xmm9->as_VMReg()); | |
197 map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg()); | |
198 map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg()); | |
199 map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg()); | |
200 map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg()); | |
201 map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg()); | |
202 map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg()); | |
203 | |
204 // %%% These should all be a waste but we'll keep things as they were for now | |
205 if (true) { | |
206 map->set_callee_saved(VMRegImpl::stack2reg( raxH_off + additional_frame_slots), | |
207 rax->as_VMReg()->next()); | |
208 map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off + additional_frame_slots), | |
209 rcx->as_VMReg()->next()); | |
210 map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off + additional_frame_slots), | |
211 rdx->as_VMReg()->next()); | |
212 map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off + additional_frame_slots), | |
213 rbx->as_VMReg()->next()); | |
214 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
215 map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off + additional_frame_slots), | |
216 rsi->as_VMReg()->next()); | |
217 map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off + additional_frame_slots), | |
218 rdi->as_VMReg()->next()); | |
219 map->set_callee_saved(VMRegImpl::stack2reg( r8H_off + additional_frame_slots), | |
220 r8->as_VMReg()->next()); | |
221 map->set_callee_saved(VMRegImpl::stack2reg( r9H_off + additional_frame_slots), | |
222 r9->as_VMReg()->next()); | |
223 map->set_callee_saved(VMRegImpl::stack2reg( r10H_off + additional_frame_slots), | |
224 r10->as_VMReg()->next()); | |
225 map->set_callee_saved(VMRegImpl::stack2reg( r11H_off + additional_frame_slots), | |
226 r11->as_VMReg()->next()); | |
227 map->set_callee_saved(VMRegImpl::stack2reg( r12H_off + additional_frame_slots), | |
228 r12->as_VMReg()->next()); | |
229 map->set_callee_saved(VMRegImpl::stack2reg( r13H_off + additional_frame_slots), | |
230 r13->as_VMReg()->next()); | |
231 map->set_callee_saved(VMRegImpl::stack2reg( r14H_off + additional_frame_slots), | |
232 r14->as_VMReg()->next()); | |
233 map->set_callee_saved(VMRegImpl::stack2reg( r15H_off + additional_frame_slots), | |
234 r15->as_VMReg()->next()); | |
235 map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off + additional_frame_slots), | |
236 xmm0->as_VMReg()->next()); | |
237 map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off + additional_frame_slots), | |
238 xmm1->as_VMReg()->next()); | |
239 map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off + additional_frame_slots), | |
240 xmm2->as_VMReg()->next()); | |
241 map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off + additional_frame_slots), | |
242 xmm3->as_VMReg()->next()); | |
243 map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off + additional_frame_slots), | |
244 xmm4->as_VMReg()->next()); | |
245 map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off + additional_frame_slots), | |
246 xmm5->as_VMReg()->next()); | |
247 map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off + additional_frame_slots), | |
248 xmm6->as_VMReg()->next()); | |
249 map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off + additional_frame_slots), | |
250 xmm7->as_VMReg()->next()); | |
251 map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off + additional_frame_slots), | |
252 xmm8->as_VMReg()->next()); | |
253 map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off + additional_frame_slots), | |
254 xmm9->as_VMReg()->next()); | |
255 map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots), | |
256 xmm10->as_VMReg()->next()); | |
257 map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots), | |
258 xmm11->as_VMReg()->next()); | |
259 map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots), | |
260 xmm12->as_VMReg()->next()); | |
261 map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots), | |
262 xmm13->as_VMReg()->next()); | |
263 map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots), | |
264 xmm14->as_VMReg()->next()); | |
265 map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots), | |
266 xmm15->as_VMReg()->next()); | |
267 } | |
268 | |
269 return map; | |
270 } | |
271 | |
272 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
273 if (frame::arg_reg_save_area_bytes != 0) { | |
274 // Pop arg register save area | |
304 | 275 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 276 } |
277 // Recover CPU state | |
278 __ pop_CPU_state(); | |
279 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 280 __ pop(rbp); |
0 | 281 } |
282 | |
283 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
284 | |
285 // Just restore result register. Only used by deoptimization. By | |
286 // now any callee save register that needs to be restored to a c2 | |
287 // caller of the deoptee has been extracted into the vframeArray | |
288 // and will be stuffed into the c2i adapter we create for later | |
289 // restoration so only result registers need to be restored here. | |
290 | |
291 // Restore fp result register | |
292 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
293 // Restore integer result register | |
304 | 294 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
295 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
296 | |
0 | 297 // Pop all of the register save are off the stack except the return address |
304 | 298 __ addptr(rsp, return_offset_in_bytes()); |
0 | 299 } |
300 | |
301 // The java_calling_convention describes stack locations as ideal slots on | |
302 // a frame with no abi restrictions. Since we must observe abi restrictions | |
303 // (like the placement of the register window) the slots must be biased by | |
304 // the following value. | |
305 static int reg2offset_in(VMReg r) { | |
306 // Account for saved rbp and return address | |
307 // This should really be in_preserve_stack_slots | |
308 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
309 } | |
310 | |
311 static int reg2offset_out(VMReg r) { | |
312 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
313 } | |
314 | |
315 // --------------------------------------------------------------------------- | |
316 // Read the array of BasicTypes from a signature, and compute where the | |
317 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
318 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
319 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
320 // as framesizes are fixed. | |
321 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
322 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
323 // up to RegisterImpl::number_of_registers) are the 64-bit | |
324 // integer registers. | |
325 | |
326 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
327 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
328 // units regardless of build. Of course for i486 there is no 64 bit build | |
329 | |
330 // The Java calling convention is a "shifted" version of the C ABI. | |
331 // By skipping the first C ABI register we can call non-static jni methods | |
332 // with small numbers of arguments without having to shuffle the arguments | |
333 // at all. Since we control the java ABI we ought to at least get some | |
334 // advantage out of it. | |
335 | |
336 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
337 VMRegPair *regs, | |
338 int total_args_passed, | |
339 int is_outgoing) { | |
340 | |
341 // Create the mapping between argument positions and | |
342 // registers. | |
343 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
344 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
345 }; | |
346 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
347 j_farg0, j_farg1, j_farg2, j_farg3, | |
348 j_farg4, j_farg5, j_farg6, j_farg7 | |
349 }; | |
350 | |
351 | |
352 uint int_args = 0; | |
353 uint fp_args = 0; | |
354 uint stk_args = 0; // inc by 2 each time | |
355 | |
356 for (int i = 0; i < total_args_passed; i++) { | |
357 switch (sig_bt[i]) { | |
358 case T_BOOLEAN: | |
359 case T_CHAR: | |
360 case T_BYTE: | |
361 case T_SHORT: | |
362 case T_INT: | |
363 if (int_args < Argument::n_int_register_parameters_j) { | |
364 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
365 } else { | |
366 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
367 stk_args += 2; | |
368 } | |
369 break; | |
370 case T_VOID: | |
371 // halves of T_LONG or T_DOUBLE | |
372 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
373 regs[i].set_bad(); | |
374 break; | |
375 case T_LONG: | |
376 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
377 // fall through | |
378 case T_OBJECT: | |
379 case T_ARRAY: | |
380 case T_ADDRESS: | |
381 if (int_args < Argument::n_int_register_parameters_j) { | |
382 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
383 } else { | |
384 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
385 stk_args += 2; | |
386 } | |
387 break; | |
388 case T_FLOAT: | |
389 if (fp_args < Argument::n_float_register_parameters_j) { | |
390 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
391 } else { | |
392 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
393 stk_args += 2; | |
394 } | |
395 break; | |
396 case T_DOUBLE: | |
397 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
398 if (fp_args < Argument::n_float_register_parameters_j) { | |
399 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
400 } else { | |
401 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
402 stk_args += 2; | |
403 } | |
404 break; | |
405 default: | |
406 ShouldNotReachHere(); | |
407 break; | |
408 } | |
409 } | |
410 | |
411 return round_to(stk_args, 2); | |
412 } | |
413 | |
414 // Patch the callers callsite with entry to compiled code if it exists. | |
415 static void patch_callers_callsite(MacroAssembler *masm) { | |
416 Label L; | |
417 __ verify_oop(rbx); | |
304 | 418 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 419 __ jcc(Assembler::equal, L); |
420 | |
421 // Save the current stack pointer | |
304 | 422 __ mov(r13, rsp); |
0 | 423 // Schedule the branch target address early. |
424 // Call into the VM to patch the caller, then jump to compiled callee | |
425 // rax isn't live so capture return address while we easily can | |
304 | 426 __ movptr(rax, Address(rsp, 0)); |
0 | 427 |
428 // align stack so push_CPU_state doesn't fault | |
304 | 429 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 430 __ push_CPU_state(); |
431 | |
432 | |
433 __ verify_oop(rbx); | |
434 // VM needs caller's callsite | |
435 // VM needs target method | |
436 // This needs to be a long call since we will relocate this adapter to | |
437 // the codeBuffer and it may not reach | |
438 | |
439 // Allocate argument register save area | |
440 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 441 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 442 } |
304 | 443 __ mov(c_rarg0, rbx); |
444 __ mov(c_rarg1, rax); | |
0 | 445 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
446 | |
447 // De-allocate argument register save area | |
448 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 449 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 450 } |
451 | |
452 __ pop_CPU_state(); | |
453 // restore sp | |
304 | 454 __ mov(rsp, r13); |
0 | 455 __ bind(L); |
456 } | |
457 | |
458 | |
459 static void gen_c2i_adapter(MacroAssembler *masm, | |
460 int total_args_passed, | |
461 int comp_args_on_stack, | |
462 const BasicType *sig_bt, | |
463 const VMRegPair *regs, | |
464 Label& skip_fixup) { | |
465 // Before we get into the guts of the C2I adapter, see if we should be here | |
466 // at all. We've come from compiled code and are attempting to jump to the | |
467 // interpreter, which means the caller made a static call to get here | |
468 // (vcalls always get a compiled target if there is one). Check for a | |
469 // compiled target. If there is one, we need to patch the caller's call. | |
470 patch_callers_callsite(masm); | |
471 | |
472 __ bind(skip_fixup); | |
473 | |
474 // Since all args are passed on the stack, total_args_passed * | |
475 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
476 // we also account for the return address location since | |
477 // we store it first rather than hold it in rax across all the shuffling | |
478 | |
1506 | 479 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 480 |
481 // stack is aligned, keep it that way | |
482 extraspace = round_to(extraspace, 2*wordSize); | |
483 | |
484 // Get return address | |
304 | 485 __ pop(rax); |
0 | 486 |
487 // set senderSP value | |
304 | 488 __ mov(r13, rsp); |
489 | |
490 __ subptr(rsp, extraspace); | |
0 | 491 |
492 // Store the return address in the expected location | |
304 | 493 __ movptr(Address(rsp, 0), rax); |
0 | 494 |
495 // Now write the args into the outgoing interpreter space | |
496 for (int i = 0; i < total_args_passed; i++) { | |
497 if (sig_bt[i] == T_VOID) { | |
498 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
499 continue; | |
500 } | |
501 | |
502 // offset to start parameters | |
1506 | 503 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
504 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 505 |
506 // Say 4 args: | |
507 // i st_off | |
508 // 0 32 T_LONG | |
509 // 1 24 T_VOID | |
510 // 2 16 T_OBJECT | |
511 // 3 8 T_BOOL | |
512 // - 0 return address | |
513 // | |
514 // However to make thing extra confusing. Because we can fit a long/double in | |
515 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
516 // leaves one slot empty and only stores to a single slot. In this case the | |
517 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
518 | |
519 VMReg r_1 = regs[i].first(); | |
520 VMReg r_2 = regs[i].second(); | |
521 if (!r_1->is_valid()) { | |
522 assert(!r_2->is_valid(), ""); | |
523 continue; | |
524 } | |
525 if (r_1->is_stack()) { | |
526 // memory to memory use rax | |
527 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
528 if (!r_2->is_valid()) { | |
529 // sign extend?? | |
530 __ movl(rax, Address(rsp, ld_off)); | |
304 | 531 __ movptr(Address(rsp, st_off), rax); |
0 | 532 |
533 } else { | |
534 | |
535 __ movq(rax, Address(rsp, ld_off)); | |
536 | |
537 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
538 // T_DOUBLE and T_LONG use two slots in the interpreter | |
539 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
540 // ld_off == LSW, ld_off+wordSize == MSW | |
541 // st_off == MSW, next_off == LSW | |
542 __ movq(Address(rsp, next_off), rax); | |
543 #ifdef ASSERT | |
544 // Overwrite the unused slot with known junk | |
545 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 546 __ movptr(Address(rsp, st_off), rax); |
0 | 547 #endif /* ASSERT */ |
548 } else { | |
549 __ movq(Address(rsp, st_off), rax); | |
550 } | |
551 } | |
552 } else if (r_1->is_Register()) { | |
553 Register r = r_1->as_Register(); | |
554 if (!r_2->is_valid()) { | |
555 // must be only an int (or less ) so move only 32bits to slot | |
556 // why not sign extend?? | |
557 __ movl(Address(rsp, st_off), r); | |
558 } else { | |
559 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
560 // T_DOUBLE and T_LONG use two slots in the interpreter | |
561 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
562 // long/double in gpr | |
563 #ifdef ASSERT | |
564 // Overwrite the unused slot with known junk | |
565 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 566 __ movptr(Address(rsp, st_off), rax); |
0 | 567 #endif /* ASSERT */ |
568 __ movq(Address(rsp, next_off), r); | |
569 } else { | |
304 | 570 __ movptr(Address(rsp, st_off), r); |
0 | 571 } |
572 } | |
573 } else { | |
574 assert(r_1->is_XMMRegister(), ""); | |
575 if (!r_2->is_valid()) { | |
576 // only a float use just part of the slot | |
577 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
578 } else { | |
579 #ifdef ASSERT | |
580 // Overwrite the unused slot with known junk | |
581 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 582 __ movptr(Address(rsp, st_off), rax); |
0 | 583 #endif /* ASSERT */ |
584 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
585 } | |
586 } | |
587 } | |
588 | |
589 // Schedule the branch target address early. | |
304 | 590 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset()))); |
0 | 591 __ jmp(rcx); |
592 } | |
593 | |
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594 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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595 address code_start, address code_end, |
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596 Label& L_ok) { |
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597 Label L_fail; |
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598 __ lea(temp_reg, ExternalAddress(code_start)); |
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599 __ cmpptr(pc_reg, temp_reg); |
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600 __ jcc(Assembler::belowEqual, L_fail); |
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601 __ lea(temp_reg, ExternalAddress(code_end)); |
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602 __ cmpptr(pc_reg, temp_reg); |
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603 __ jcc(Assembler::below, L_ok); |
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604 __ bind(L_fail); |
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605 } |
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606 |
0 | 607 static void gen_i2c_adapter(MacroAssembler *masm, |
608 int total_args_passed, | |
609 int comp_args_on_stack, | |
610 const BasicType *sig_bt, | |
611 const VMRegPair *regs) { | |
612 | |
613 // Note: r13 contains the senderSP on entry. We must preserve it since | |
614 // we may do a i2c -> c2i transition if we lose a race where compiled | |
615 // code goes non-entrant while we get args ready. | |
616 // In addition we use r13 to locate all the interpreter args as | |
617 // we must align the stack to 16 bytes on an i2c entry else we | |
618 // lose alignment we expect in all compiled code and register | |
619 // save code can segv when fxsave instructions find improperly | |
620 // aligned stack pointer. | |
621 | |
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622 // Adapters can be frameless because they do not require the caller |
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623 // to perform additional cleanup work, such as correcting the stack pointer. |
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624 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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625 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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626 // even if a callee has modified the stack pointer. |
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627 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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628 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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629 // up via the senderSP register). |
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630 // In other words, if *either* the caller or callee is interpreted, we can |
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631 // get the stack pointer repaired after a call. |
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632 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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633 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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634 // both caller and callee would be compiled methods, and neither would |
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635 // clean up the stack pointer changes performed by the two adapters. |
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636 // If this happens, control eventually transfers back to the compiled |
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637 // caller, but with an uncorrected stack, causing delayed havoc. |
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638 |
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639 // Pick up the return address |
304 | 640 __ movptr(rax, Address(rsp, 0)); |
0 | 641 |
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642 if (VerifyAdapterCalls && |
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643 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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644 // So, let's test for cascading c2i/i2c adapters right now. |
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645 // assert(Interpreter::contains($return_addr) || |
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646 // StubRoutines::contains($return_addr), |
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647 // "i2c adapter must return to an interpreter frame"); |
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648 __ block_comment("verify_i2c { "); |
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649 Label L_ok; |
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650 if (Interpreter::code() != NULL) |
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651 range_check(masm, rax, r11, |
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652 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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653 L_ok); |
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654 if (StubRoutines::code1() != NULL) |
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655 range_check(masm, rax, r11, |
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656 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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657 L_ok); |
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658 if (StubRoutines::code2() != NULL) |
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659 range_check(masm, rax, r11, |
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660 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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661 L_ok); |
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662 const char* msg = "i2c adapter must return to an interpreter frame"; |
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663 __ block_comment(msg); |
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664 __ stop(msg); |
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665 __ bind(L_ok); |
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666 __ block_comment("} verify_i2ce "); |
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667 } |
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668 |
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669 // Must preserve original SP for loading incoming arguments because |
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670 // we need to align the outgoing SP for compiled code. |
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671 __ movptr(r11, rsp); |
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672 |
0 | 673 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
674 // in registers, we will occasionally have no stack args. | |
675 int comp_words_on_stack = 0; | |
676 if (comp_args_on_stack) { | |
677 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
678 // registers are below. By subtracting stack0, we either get a negative | |
679 // number (all values in registers) or the maximum stack slot accessed. | |
680 | |
681 // Convert 4-byte c2 stack slots to words. | |
682 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
683 // Round up to miminum stack alignment, in wordSize | |
684 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 685 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 686 } |
687 | |
688 | |
689 // Ensure compiled code always sees stack at proper alignment | |
304 | 690 __ andptr(rsp, -16); |
0 | 691 |
692 // push the return address and misalign the stack that youngest frame always sees | |
693 // as far as the placement of the call instruction | |
304 | 694 __ push(rax); |
0 | 695 |
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696 // Put saved SP in another register |
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697 const Register saved_sp = rax; |
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698 __ movptr(saved_sp, r11); |
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699 |
0 | 700 // Will jump to the compiled code just as if compiled code was doing it. |
701 // Pre-load the register-jump target early, to schedule it better. | |
304 | 702 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset()))); |
0 | 703 |
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704 #ifdef GRAAL |
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705 // check if this call should be routed towards a specific entry point |
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706 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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707 Label no_alternative_target; |
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708 __ jcc(Assembler::equal, no_alternative_target); |
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709 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()))); |
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710 __ movptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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711 __ bind(no_alternative_target); |
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712 #endif |
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713 |
0 | 714 // Now generate the shuffle code. Pick up all register args and move the |
715 // rest through the floating point stack top. | |
716 for (int i = 0; i < total_args_passed; i++) { | |
717 if (sig_bt[i] == T_VOID) { | |
718 // Longs and doubles are passed in native word order, but misaligned | |
719 // in the 32-bit build. | |
720 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
721 continue; | |
722 } | |
723 | |
724 // Pick up 0, 1 or 2 words from SP+offset. | |
725 | |
726 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
727 "scrambled load targets?"); | |
728 // Load in argument order going down. | |
1506 | 729 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 730 // Point to interpreter value (vs. tag) |
1506 | 731 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 732 // |
733 // | |
734 // | |
735 VMReg r_1 = regs[i].first(); | |
736 VMReg r_2 = regs[i].second(); | |
737 if (!r_1->is_valid()) { | |
738 assert(!r_2->is_valid(), ""); | |
739 continue; | |
740 } | |
741 if (r_1->is_stack()) { | |
742 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
743 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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744 |
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745 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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746 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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747 // will be generated. |
0 | 748 if (!r_2->is_valid()) { |
749 // sign extend??? | |
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750 __ movl(r13, Address(saved_sp, ld_off)); |
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751 __ movptr(Address(rsp, st_off), r13); |
0 | 752 } else { |
753 // | |
754 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
755 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
756 // So we must adjust where to pick up the data to match the interpreter. | |
757 // | |
758 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
759 // are accessed as negative so LSW is at LOW address | |
760 | |
761 // ld_off is MSW so get LSW | |
762 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
763 next_off : ld_off; | |
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764 __ movq(r13, Address(saved_sp, offset)); |
0 | 765 // st_off is LSW (i.e. reg.first()) |
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766 __ movq(Address(rsp, st_off), r13); |
0 | 767 } |
768 } else if (r_1->is_Register()) { // Register argument | |
769 Register r = r_1->as_Register(); | |
770 assert(r != rax, "must be different"); | |
771 if (r_2->is_valid()) { | |
772 // | |
773 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
774 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
775 // So we must adjust where to pick up the data to match the interpreter. | |
776 | |
777 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
778 next_off : ld_off; | |
779 | |
780 // this can be a misaligned move | |
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781 __ movq(r, Address(saved_sp, offset)); |
0 | 782 } else { |
783 // sign extend and use a full word? | |
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784 __ movl(r, Address(saved_sp, ld_off)); |
0 | 785 } |
786 } else { | |
787 if (!r_2->is_valid()) { | |
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788 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 789 } else { |
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790 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 791 } |
792 } | |
793 } | |
794 | |
795 // 6243940 We might end up in handle_wrong_method if | |
796 // the callee is deoptimized as we race thru here. If that | |
797 // happens we don't want to take a safepoint because the | |
798 // caller frame will look interpreted and arguments are now | |
799 // "compiled" so it is much better to make this transition | |
800 // invisible to the stack walking code. Unfortunately if | |
801 // we try and find the callee by normal means a safepoint | |
802 // is possible. So we stash the desired callee in the thread | |
803 // and the vm will find there should this case occur. | |
804 | |
304 | 805 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 806 |
807 // put methodOop where a c2i would expect should we end up there | |
808 // only needed becaus eof c2 resolve stubs return methodOop as a result in | |
809 // rax | |
304 | 810 __ mov(rax, rbx); |
0 | 811 __ jmp(r11); |
812 } | |
813 | |
814 // --------------------------------------------------------------- | |
815 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
816 int total_args_passed, | |
817 int comp_args_on_stack, | |
818 const BasicType *sig_bt, | |
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819 const VMRegPair *regs, |
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820 AdapterFingerPrint* fingerprint) { |
0 | 821 address i2c_entry = __ pc(); |
822 | |
823 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
824 | |
825 // ------------------------------------------------------------------------- | |
826 // Generate a C2I adapter. On entry we know rbx holds the methodOop during calls | |
827 // to the interpreter. The args start out packed in the compiled layout. They | |
828 // need to be unpacked into the interpreter layout. This will almost always | |
829 // require some stack space. We grow the current (compiled) stack, then repack | |
830 // the args. We finally end in a jump to the generic interpreter entry point. | |
831 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
832 // compiled code, which relys solely on SP and not RBP, get sick). | |
833 | |
834 address c2i_unverified_entry = __ pc(); | |
835 Label skip_fixup; | |
836 Label ok; | |
837 | |
838 Register holder = rax; | |
839 Register receiver = j_rarg0; | |
840 Register temp = rbx; | |
841 | |
842 { | |
843 __ verify_oop(holder); | |
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844 __ load_klass(temp, receiver); |
0 | 845 __ verify_oop(temp); |
846 | |
304 | 847 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset())); |
848 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset())); | |
0 | 849 __ jcc(Assembler::equal, ok); |
850 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
851 | |
852 __ bind(ok); | |
853 // Method might have been compiled since the call site was patched to | |
854 // interpreted if that is the case treat it as a miss so we can get | |
855 // the call site corrected. | |
304 | 856 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 857 __ jcc(Assembler::equal, skip_fixup); |
858 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
859 } | |
860 | |
861 address c2i_entry = __ pc(); | |
862 | |
863 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
864 | |
865 __ flush(); | |
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866 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 867 } |
868 | |
869 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
870 VMRegPair *regs, | |
871 int total_args_passed) { | |
872 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
873 // the arguments NOT counting out_preserve_stack_slots. | |
874 | |
875 // NOTE: These arrays will have to change when c1 is ported | |
876 #ifdef _WIN64 | |
877 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
878 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
879 }; | |
880 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
881 c_farg0, c_farg1, c_farg2, c_farg3 | |
882 }; | |
883 #else | |
884 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
885 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
886 }; | |
887 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
888 c_farg0, c_farg1, c_farg2, c_farg3, | |
889 c_farg4, c_farg5, c_farg6, c_farg7 | |
890 }; | |
891 #endif // _WIN64 | |
892 | |
893 | |
894 uint int_args = 0; | |
895 uint fp_args = 0; | |
896 uint stk_args = 0; // inc by 2 each time | |
897 | |
898 for (int i = 0; i < total_args_passed; i++) { | |
899 switch (sig_bt[i]) { | |
900 case T_BOOLEAN: | |
901 case T_CHAR: | |
902 case T_BYTE: | |
903 case T_SHORT: | |
904 case T_INT: | |
905 if (int_args < Argument::n_int_register_parameters_c) { | |
906 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
907 #ifdef _WIN64 | |
908 fp_args++; | |
909 // Allocate slots for callee to stuff register args the stack. | |
910 stk_args += 2; | |
911 #endif | |
912 } else { | |
913 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
914 stk_args += 2; | |
915 } | |
916 break; | |
917 case T_LONG: | |
918 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
919 // fall through | |
920 case T_OBJECT: | |
921 case T_ARRAY: | |
922 case T_ADDRESS: | |
923 if (int_args < Argument::n_int_register_parameters_c) { | |
924 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
925 #ifdef _WIN64 | |
926 fp_args++; | |
927 stk_args += 2; | |
928 #endif | |
929 } else { | |
930 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
931 stk_args += 2; | |
932 } | |
933 break; | |
934 case T_FLOAT: | |
935 if (fp_args < Argument::n_float_register_parameters_c) { | |
936 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
937 #ifdef _WIN64 | |
938 int_args++; | |
939 // Allocate slots for callee to stuff register args the stack. | |
940 stk_args += 2; | |
941 #endif | |
942 } else { | |
943 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
944 stk_args += 2; | |
945 } | |
946 break; | |
947 case T_DOUBLE: | |
948 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
949 if (fp_args < Argument::n_float_register_parameters_c) { | |
950 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
951 #ifdef _WIN64 | |
952 int_args++; | |
953 // Allocate slots for callee to stuff register args the stack. | |
954 stk_args += 2; | |
955 #endif | |
956 } else { | |
957 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
958 stk_args += 2; | |
959 } | |
960 break; | |
961 case T_VOID: // Halves of longs and doubles | |
962 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
963 regs[i].set_bad(); | |
964 break; | |
965 default: | |
966 ShouldNotReachHere(); | |
967 break; | |
968 } | |
969 } | |
970 #ifdef _WIN64 | |
971 // windows abi requires that we always allocate enough stack space | |
972 // for 4 64bit registers to be stored down. | |
973 if (stk_args < 8) { | |
974 stk_args = 8; | |
975 } | |
976 #endif // _WIN64 | |
977 | |
978 return stk_args; | |
979 } | |
980 | |
981 // On 64 bit we will store integer like items to the stack as | |
982 // 64 bits items (sparc abi) even though java would only store | |
983 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
984 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
985 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
986 if (src.first()->is_stack()) { | |
987 if (dst.first()->is_stack()) { | |
988 // stack to stack | |
989 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
990 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
991 } else { | |
992 // stack to reg | |
993 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
994 } | |
995 } else if (dst.first()->is_stack()) { | |
996 // reg to stack | |
997 // Do we really have to sign extend??? | |
998 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
999 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1000 } else { | |
1001 // Do we really have to sign extend??? | |
1002 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
1003 if (dst.first() != src.first()) { | |
1004 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
1005 } | |
1006 } | |
1007 } | |
1008 | |
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1009 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1010 if (src.first()->is_stack()) { |
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1011 if (dst.first()->is_stack()) { |
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1012 // stack to stack |
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1013 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1014 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1015 } else { |
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1016 // stack to reg |
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1017 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1018 } |
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1019 } else if (dst.first()->is_stack()) { |
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1020 // reg to stack |
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1021 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1022 } else { |
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1023 if (dst.first() != src.first()) { |
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1024 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1025 } |
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1026 } |
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1027 } |
0 | 1028 |
1029 // An oop arg. Must pass a handle not the oop itself | |
1030 static void object_move(MacroAssembler* masm, | |
1031 OopMap* map, | |
1032 int oop_handle_offset, | |
1033 int framesize_in_slots, | |
1034 VMRegPair src, | |
1035 VMRegPair dst, | |
1036 bool is_receiver, | |
1037 int* receiver_offset) { | |
1038 | |
1039 // must pass a handle. First figure out the location we use as a handle | |
1040 | |
1041 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
1042 | |
1043 // See if oop is NULL if it is we need no handle | |
1044 | |
1045 if (src.first()->is_stack()) { | |
1046 | |
1047 // Oop is already on the stack as an argument | |
1048 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1049 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1050 if (is_receiver) { | |
1051 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1052 } | |
1053 | |
304 | 1054 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
1055 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 1056 // conditionally move a NULL |
304 | 1057 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 1058 } else { |
1059 | |
1060 // Oop is in an a register we must store it to the space we reserve | |
1061 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
1062 | |
1063 const Register rOop = src.first()->as_Register(); | |
1064 int oop_slot; | |
1065 if (rOop == j_rarg0) | |
1066 oop_slot = 0; | |
1067 else if (rOop == j_rarg1) | |
1068 oop_slot = 1; | |
1069 else if (rOop == j_rarg2) | |
1070 oop_slot = 2; | |
1071 else if (rOop == j_rarg3) | |
1072 oop_slot = 3; | |
1073 else if (rOop == j_rarg4) | |
1074 oop_slot = 4; | |
1075 else { | |
1076 assert(rOop == j_rarg5, "wrong register"); | |
1077 oop_slot = 5; | |
1078 } | |
1079 | |
1080 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
1081 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1082 | |
1083 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1084 // Store oop in handle area, may be NULL | |
304 | 1085 __ movptr(Address(rsp, offset), rOop); |
0 | 1086 if (is_receiver) { |
1087 *receiver_offset = offset; | |
1088 } | |
1089 | |
304 | 1090 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1091 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1092 // conditionally move a NULL from the handle area where it was just stored |
304 | 1093 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1094 } |
1095 | |
1096 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1097 if (dst.first()->is_stack()) { | |
304 | 1098 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1099 } |
1100 } | |
1101 | |
1102 // A float arg may have to do float reg int reg conversion | |
1103 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1104 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1105 | |
1106 // The calling conventions assures us that each VMregpair is either | |
1107 // all really one physical register or adjacent stack slots. | |
1108 // This greatly simplifies the cases here compared to sparc. | |
1109 | |
1110 if (src.first()->is_stack()) { | |
1111 if (dst.first()->is_stack()) { | |
1112 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1113 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1114 } else { |
1115 // stack to reg | |
1116 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1117 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1118 } | |
1119 } else if (dst.first()->is_stack()) { | |
1120 // reg to stack | |
1121 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1122 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1123 } else { | |
1124 // reg to reg | |
1125 // In theory these overlap but the ordering is such that this is likely a nop | |
1126 if ( src.first() != dst.first()) { | |
1127 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1128 } | |
1129 } | |
1130 } | |
1131 | |
1132 // A long move | |
1133 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1134 | |
1135 // The calling conventions assures us that each VMregpair is either | |
1136 // all really one physical register or adjacent stack slots. | |
1137 // This greatly simplifies the cases here compared to sparc. | |
1138 | |
1139 if (src.is_single_phys_reg() ) { | |
1140 if (dst.is_single_phys_reg()) { | |
1141 if (dst.first() != src.first()) { | |
304 | 1142 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1143 } |
1144 } else { | |
1145 assert(dst.is_single_reg(), "not a stack pair"); | |
1146 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1147 } | |
1148 } else if (dst.is_single_phys_reg()) { | |
1149 assert(src.is_single_reg(), "not a stack pair"); | |
1150 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1151 } else { | |
1152 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1153 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1154 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1155 } | |
1156 } | |
1157 | |
1158 // A double move | |
1159 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1160 | |
1161 // The calling conventions assures us that each VMregpair is either | |
1162 // all really one physical register or adjacent stack slots. | |
1163 // This greatly simplifies the cases here compared to sparc. | |
1164 | |
1165 if (src.is_single_phys_reg() ) { | |
1166 if (dst.is_single_phys_reg()) { | |
1167 // In theory these overlap but the ordering is such that this is likely a nop | |
1168 if ( src.first() != dst.first()) { | |
1169 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1170 } | |
1171 } else { | |
1172 assert(dst.is_single_reg(), "not a stack pair"); | |
1173 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1174 } | |
1175 } else if (dst.is_single_phys_reg()) { | |
1176 assert(src.is_single_reg(), "not a stack pair"); | |
1177 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1178 } else { | |
1179 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1180 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1181 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1182 } | |
1183 } | |
1184 | |
1185 | |
1186 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1187 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1188 // which by this time is free to use | |
1189 switch (ret_type) { | |
1190 case T_FLOAT: | |
1191 __ movflt(Address(rbp, -wordSize), xmm0); | |
1192 break; | |
1193 case T_DOUBLE: | |
1194 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1195 break; | |
1196 case T_VOID: break; | |
1197 default: { | |
304 | 1198 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1199 } |
1200 } | |
1201 } | |
1202 | |
1203 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1204 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1205 // which by this time is free to use | |
1206 switch (ret_type) { | |
1207 case T_FLOAT: | |
1208 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1209 break; | |
1210 case T_DOUBLE: | |
1211 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1212 break; | |
1213 case T_VOID: break; | |
1214 default: { | |
304 | 1215 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1216 } |
1217 } | |
1218 } | |
1219 | |
1220 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1221 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1222 if (args[i].first()->is_Register()) { | |
304 | 1223 __ push(args[i].first()->as_Register()); |
0 | 1224 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1225 __ subptr(rsp, 2*wordSize); |
0 | 1226 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1227 } | |
1228 } | |
1229 } | |
1230 | |
1231 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1232 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1233 if (args[i].first()->is_Register()) { | |
304 | 1234 __ pop(args[i].first()->as_Register()); |
0 | 1235 } else if (args[i].first()->is_XMMRegister()) { |
1236 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1237 __ addptr(rsp, 2*wordSize); |
0 | 1238 } |
1239 } | |
1240 } | |
1241 | |
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1242 |
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1243 static void save_or_restore_arguments(MacroAssembler* masm, |
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1244 const int stack_slots, |
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1245 const int total_in_args, |
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1246 const int arg_save_area, |
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1247 OopMap* map, |
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1248 VMRegPair* in_regs, |
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1249 BasicType* in_sig_bt) { |
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1250 // if map is non-NULL then the code should store the values, |
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1251 // otherwise it should load them. |
5905 | 1252 int slot = arg_save_area; |
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1253 // Save down double word first |
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1254 for ( int i = 0; i < total_in_args; i++) { |
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1255 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1256 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1257 slot += VMRegImpl::slots_per_word; |
1258 assert(slot <= stack_slots, "overflow"); | |
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1259 if (map != NULL) { |
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1260 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1261 } else { |
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1262 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1263 } |
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1264 } |
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1265 if (in_regs[i].first()->is_Register() && |
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1266 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1267 int offset = slot * VMRegImpl::stack_slot_size; |
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1268 if (map != NULL) { |
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1269 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1270 if (in_sig_bt[i] == T_ARRAY) { |
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1271 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1272 } |
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1273 } else { |
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1274 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1275 } |
5907 | 1276 slot += VMRegImpl::slots_per_word; |
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1277 } |
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1278 } |
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1279 // Save or restore single word registers |
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1280 for ( int i = 0; i < total_in_args; i++) { |
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1281 if (in_regs[i].first()->is_Register()) { |
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1282 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1283 slot++; |
1284 assert(slot <= stack_slots, "overflow"); | |
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1285 |
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1286 // Value is in an input register pass we must flush it to the stack |
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1287 const Register reg = in_regs[i].first()->as_Register(); |
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1288 switch (in_sig_bt[i]) { |
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1289 case T_BOOLEAN: |
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1290 case T_CHAR: |
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1291 case T_BYTE: |
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1292 case T_SHORT: |
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1293 case T_INT: |
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1294 if (map != NULL) { |
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1295 __ movl(Address(rsp, offset), reg); |
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1296 } else { |
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1297 __ movl(reg, Address(rsp, offset)); |
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1298 } |
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1299 break; |
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1300 case T_ARRAY: |
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1301 case T_LONG: |
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1302 // handled above |
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1303 break; |
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1304 case T_OBJECT: |
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1305 default: ShouldNotReachHere(); |
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1306 } |
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1307 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1308 if (in_sig_bt[i] == T_FLOAT) { |
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1309 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1310 slot++; |
1311 assert(slot <= stack_slots, "overflow"); | |
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1312 if (map != NULL) { |
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1313 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1314 } else { |
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1315 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1316 } |
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1317 } |
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1318 } else if (in_regs[i].first()->is_stack()) { |
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1319 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1320 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1321 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1322 } |
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1323 } |
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1324 } |
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1325 } |
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1326 |
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1327 |
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1328 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1329 // keeps a new JNI critical region from starting until a GC has been |
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1330 // forced. Save down any oops in registers and describe them in an |
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1331 // OopMap. |
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1332 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1333 int stack_slots, |
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1334 int total_c_args, |
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1335 int total_in_args, |
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1336 int arg_save_area, |
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1337 OopMapSet* oop_maps, |
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1338 VMRegPair* in_regs, |
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1339 BasicType* in_sig_bt) { |
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1340 __ block_comment("check GC_locker::needs_gc"); |
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1341 Label cont; |
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1342 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1343 __ jcc(Assembler::equal, cont); |
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1344 |
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1345 // Save down any incoming oops and call into the runtime to halt for a GC |
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1346 |
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1347 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1348 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1349 arg_save_area, map, in_regs, in_sig_bt); |
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1350 |
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1351 address the_pc = __ pc(); |
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1352 oop_maps->add_gc_map( __ offset(), map); |
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1353 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1354 |
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1355 __ block_comment("block_for_jni_critical"); |
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1356 __ movptr(c_rarg0, r15_thread); |
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1357 __ mov(r12, rsp); // remember sp |
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1358 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1359 __ andptr(rsp, -16); // align stack as required by ABI |
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1360 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1361 __ mov(rsp, r12); // restore sp |
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1362 __ reinit_heapbase(); |
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1363 |
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1364 __ reset_last_Java_frame(false, true); |
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1365 |
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1366 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1367 arg_save_area, NULL, in_regs, in_sig_bt); |
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1368 |
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1369 __ bind(cont); |
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1370 #ifdef ASSERT |
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1371 if (StressCriticalJNINatives) { |
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1372 // Stress register saving |
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1373 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1374 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1375 arg_save_area, map, in_regs, in_sig_bt); |
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1376 // Destroy argument registers |
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1377 for (int i = 0; i < total_in_args - 1; i++) { |
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1378 if (in_regs[i].first()->is_Register()) { |
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1379 const Register reg = in_regs[i].first()->as_Register(); |
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1380 __ xorptr(reg, reg); |
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1381 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1382 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1383 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1384 ShouldNotReachHere(); |
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1385 } else if (in_regs[i].first()->is_stack()) { |
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1386 // Nothing to do |
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1387 } else { |
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1388 ShouldNotReachHere(); |
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1389 } |
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1390 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1391 i++; |
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1392 } |
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1393 } |
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1394 |
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1395 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1396 arg_save_area, NULL, in_regs, in_sig_bt); |
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1397 } |
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1398 #endif |
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1399 } |
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1400 |
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1401 // Unpack an array argument into a pointer to the body and the length |
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1402 // if the array is non-null, otherwise pass 0 for both. |
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1403 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1404 Register tmp_reg = rax; |
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1405 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1406 "possible collision"); |
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1407 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1408 "possible collision"); |
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1409 |
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1410 // Pass the length, ptr pair |
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1411 Label is_null, done; |
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1412 VMRegPair tmp; |
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1413 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1414 if (reg.first()->is_stack()) { |
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1415 // Load the arg up from the stack |
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1416 move_ptr(masm, reg, tmp); |
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1417 reg = tmp; |
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1418 } |
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1419 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1420 __ jccb(Assembler::equal, is_null); |
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1421 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1422 move_ptr(masm, tmp, body_arg); |
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1423 // load the length relative to the body. |
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1424 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1425 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1426 move32_64(masm, tmp, length_arg); |
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1427 __ jmpb(done); |
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1428 __ bind(is_null); |
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1429 // Pass zeros |
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1430 __ xorptr(tmp_reg, tmp_reg); |
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1431 move_ptr(masm, tmp, body_arg); |
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1432 move32_64(masm, tmp, length_arg); |
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1433 __ bind(done); |
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1434 } |
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1435 |
5905 | 1436 |
6266
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1437 // Different signatures may require very different orders for the move |
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1438 // to avoid clobbering other arguments. There's no simple way to |
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1439 // order them safely. Compute a safe order for issuing stores and |
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1440 // break any cycles in those stores. This code is fairly general but |
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1441 // it's not necessary on the other platforms so we keep it in the |
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1442 // platform dependent code instead of moving it into a shared file. |
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1443 // (See bugs 7013347 & 7145024.) |
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1444 // Note that this code is specific to LP64. |
5905 | 1445 class ComputeMoveOrder: public StackObj { |
1446 class MoveOperation: public ResourceObj { | |
1447 friend class ComputeMoveOrder; | |
1448 private: | |
1449 VMRegPair _src; | |
1450 VMRegPair _dst; | |
1451 int _src_index; | |
1452 int _dst_index; | |
1453 bool _processed; | |
1454 MoveOperation* _next; | |
1455 MoveOperation* _prev; | |
1456 | |
1457 static int get_id(VMRegPair r) { | |
1458 return r.first()->value(); | |
1459 } | |
1460 | |
1461 public: | |
1462 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
1463 _src(src) | |
1464 , _src_index(src_index) | |
1465 , _dst(dst) | |
1466 , _dst_index(dst_index) | |
1467 , _next(NULL) | |
1468 , _prev(NULL) | |
1469 , _processed(false) { | |
1470 } | |
1471 | |
1472 VMRegPair src() const { return _src; } | |
1473 int src_id() const { return get_id(src()); } | |
1474 int src_index() const { return _src_index; } | |
1475 VMRegPair dst() const { return _dst; } | |
1476 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
1477 int dst_index() const { return _dst_index; } | |
1478 int dst_id() const { return get_id(dst()); } | |
1479 MoveOperation* next() const { return _next; } | |
1480 MoveOperation* prev() const { return _prev; } | |
1481 void set_processed() { _processed = true; } | |
1482 bool is_processed() const { return _processed; } | |
1483 | |
1484 // insert | |
1485 void break_cycle(VMRegPair temp_register) { | |
1486 // create a new store following the last store | |
1487 // to move from the temp_register to the original | |
1488 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
1489 | |
1490 // break the cycle of links and insert new_store at the end | |
1491 // break the reverse link. | |
1492 MoveOperation* p = prev(); | |
1493 assert(p->next() == this, "must be"); | |
1494 _prev = NULL; | |
1495 p->_next = new_store; | |
1496 new_store->_prev = p; | |
1497 | |
1498 // change the original store to save it's value in the temp. | |
1499 set_dst(-1, temp_register); | |
1500 } | |
1501 | |
1502 void link(GrowableArray<MoveOperation*>& killer) { | |
1503 // link this store in front the store that it depends on | |
1504 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
1505 if (n != NULL) { | |
1506 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
1507 _next = n; | |
1508 n->_prev = this; | |
1509 } | |
1510 } | |
1511 }; | |
1512 | |
1513 private: | |
1514 GrowableArray<MoveOperation*> edges; | |
1515 | |
1516 public: | |
1517 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
1518 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
1519 // Move operations where the dest is the stack can all be | |
1520 // scheduled first since they can't interfere with the other moves. | |
1521 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
1522 if (in_sig_bt[i] == T_ARRAY) { | |
1523 c_arg--; | |
1524 if (out_regs[c_arg].first()->is_stack() && | |
1525 out_regs[c_arg + 1].first()->is_stack()) { | |
1526 arg_order.push(i); | |
1527 arg_order.push(c_arg); | |
1528 } else { | |
1529 if (out_regs[c_arg].first()->is_stack() || | |
1530 in_regs[i].first() == out_regs[c_arg].first()) { | |
1531 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
1532 } else { | |
1533 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1534 } | |
1535 } | |
1536 } else if (in_sig_bt[i] == T_VOID) { | |
1537 arg_order.push(i); | |
1538 arg_order.push(c_arg); | |
1539 } else { | |
1540 if (out_regs[c_arg].first()->is_stack() || | |
1541 in_regs[i].first() == out_regs[c_arg].first()) { | |
1542 arg_order.push(i); | |
1543 arg_order.push(c_arg); | |
1544 } else { | |
1545 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1546 } | |
1547 } | |
1548 } | |
1549 // Break any cycles in the register moves and emit the in the | |
1550 // proper order. | |
1551 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
1552 for (int i = 0; i < stores->length(); i++) { | |
1553 arg_order.push(stores->at(i)->src_index()); | |
1554 arg_order.push(stores->at(i)->dst_index()); | |
1555 } | |
1556 } | |
1557 | |
1558 // Collected all the move operations | |
1559 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
1560 if (src.first() == dst.first()) return; | |
1561 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
1562 } | |
1563 | |
1564 // Walk the edges breaking cycles between moves. The result list | |
1565 // can be walked in order to produce the proper set of loads | |
1566 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
1567 // Record which moves kill which values | |
1568 GrowableArray<MoveOperation*> killer; | |
1569 for (int i = 0; i < edges.length(); i++) { | |
1570 MoveOperation* s = edges.at(i); | |
1571 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
1572 killer.at_put_grow(s->dst_id(), s, NULL); | |
1573 } | |
1574 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
1575 "make sure temp isn't in the registers that are killed"); | |
1576 | |
1577 // create links between loads and stores | |
1578 for (int i = 0; i < edges.length(); i++) { | |
1579 edges.at(i)->link(killer); | |
1580 } | |
1581 | |
1582 // at this point, all the move operations are chained together | |
1583 // in a doubly linked list. Processing it backwards finds | |
1584 // the beginning of the chain, forwards finds the end. If there's | |
1585 // a cycle it can be broken at any point, so pick an edge and walk | |
1586 // backward until the list ends or we end where we started. | |
1587 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
1588 for (int e = 0; e < edges.length(); e++) { | |
1589 MoveOperation* s = edges.at(e); | |
1590 if (!s->is_processed()) { | |
1591 MoveOperation* start = s; | |
1592 // search for the beginning of the chain or cycle | |
1593 while (start->prev() != NULL && start->prev() != s) { | |
1594 start = start->prev(); | |
1595 } | |
1596 if (start->prev() == s) { | |
1597 start->break_cycle(temp_register); | |
1598 } | |
1599 // walk the chain forward inserting to store list | |
1600 while (start != NULL) { | |
1601 stores->append(start); | |
1602 start->set_processed(); | |
1603 start = start->next(); | |
1604 } | |
1605 } | |
1606 } | |
1607 return stores; | |
1608 } | |
1609 }; | |
1610 | |
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1611 static void verify_oop_args(MacroAssembler* masm, |
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1612 int total_args_passed, |
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1613 const BasicType* sig_bt, |
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1614 const VMRegPair* regs) { |
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1615 Register temp_reg = rbx; // not part of any compiled calling seq |
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1616 if (VerifyOops) { |
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1617 for (int i = 0; i < total_args_passed; i++) { |
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1618 if (sig_bt[i] == T_OBJECT || |
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1619 sig_bt[i] == T_ARRAY) { |
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1620 VMReg r = regs[i].first(); |
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1621 assert(r->is_valid(), "bad oop arg"); |
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1622 if (r->is_stack()) { |
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1623 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1624 __ verify_oop(temp_reg); |
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1625 } else { |
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1626 __ verify_oop(r->as_Register()); |
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1627 } |
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1628 } |
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1629 } |
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1630 } |
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1631 } |
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1632 |
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1633 static void gen_special_dispatch(MacroAssembler* masm, |
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1634 int total_args_passed, |
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1635 int comp_args_on_stack, |
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1636 vmIntrinsics::ID special_dispatch, |
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1637 const BasicType* sig_bt, |
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1638 const VMRegPair* regs) { |
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1639 verify_oop_args(masm, total_args_passed, sig_bt, regs); |
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1640 |
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1641 // Now write the args into the outgoing interpreter space |
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1642 bool has_receiver = false; |
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1643 Register receiver_reg = noreg; |
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1644 int member_arg_pos = -1; |
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1645 Register member_reg = noreg; |
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1646 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(special_dispatch); |
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1647 if (ref_kind != 0) { |
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1648 member_arg_pos = total_args_passed - 1; // trailing MemberName argument |
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1649 member_reg = rbx; // known to be free at this point |
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1650 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1651 } else if (special_dispatch == vmIntrinsics::_invokeBasic) { |
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1652 has_receiver = true; |
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1653 } else { |
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1654 guarantee(false, err_msg("special_dispatch=%d", special_dispatch)); |
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1655 } |
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1656 |
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1657 if (member_reg != noreg) { |
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1658 // Load the member_arg into register, if necessary. |
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1659 assert(member_arg_pos >= 0 && member_arg_pos < total_args_passed, "oob"); |
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1660 assert(sig_bt[member_arg_pos] == T_OBJECT, "dispatch argument must be an object"); |
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1661 VMReg r = regs[member_arg_pos].first(); |
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1662 assert(r->is_valid(), "bad member arg"); |
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1663 if (r->is_stack()) { |
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1664 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1665 } else { |
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1666 // no data motion is needed |
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1667 member_reg = r->as_Register(); |
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1668 } |
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1669 } |
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1670 |
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1671 if (has_receiver) { |
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1672 // Make sure the receiver is loaded into a register. |
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1673 assert(total_args_passed > 0, "oob"); |
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1674 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1675 VMReg r = regs[0].first(); |
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1676 assert(r->is_valid(), "bad receiver arg"); |
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1677 if (r->is_stack()) { |
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1678 // Porting note: This assumes that compiled calling conventions always |
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1679 // pass the receiver oop in a register. If this is not true on some |
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1680 // platform, pick a temp and load the receiver from stack. |
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1681 assert(false, "receiver always in a register"); |
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1682 receiver_reg = j_rarg0; // known to be free at this point |
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1683 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1684 } else { |
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1685 // no data motion is needed |
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1686 receiver_reg = r->as_Register(); |
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1687 } |
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1688 } |
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1689 |
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1690 // Figure out which address we are really jumping to: |
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1691 MethodHandles::generate_method_handle_dispatch(masm, special_dispatch, |
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1692 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1693 } |
5905 | 1694 |
0 | 1695 // --------------------------------------------------------------------------- |
1696 // Generate a native wrapper for a given method. The method takes arguments | |
1697 // in the Java compiled code convention, marshals them to the native | |
1698 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1699 // returns to java state (possibly blocking), unhandlizes any result and | |
1700 // returns. | |
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1701 // |
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1702 // Critical native functions are a shorthand for the use of |
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1703 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1704 // functions. The wrapper is expected to unpack the arguments before |
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1705 // passing them to the callee and perform checks before and after the |
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1706 // native call to ensure that they GC_locker |
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1707 // lock_critical/unlock_critical semantics are followed. Some other |
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1708 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1709 // block and the check for pending exceptions it's impossible for them |
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1710 // to be thrown. |
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1711 // |
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1712 // They are roughly structured like this: |
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1713 // if (GC_locker::needs_gc()) |
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1714 // SharedRuntime::block_for_jni_critical(); |
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1715 // tranistion to thread_in_native |
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1716 // unpack arrray arguments and call native entry point |
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1717 // check for safepoint in progress |
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1718 // check if any thread suspend flags are set |
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1719 // call into JVM and possible unlock the JNI critical |
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1720 // if a GC was suppressed while in the critical native. |
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1721 // transition back to thread_in_Java |
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1722 // return to caller |
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1723 // |
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1724 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1725 methodHandle method, |
2405
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1726 int compile_id, |
0 | 1727 int total_in_args, |
1728 int comp_args_on_stack, | |
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1729 BasicType* in_sig_bt, |
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1730 VMRegPair* in_regs, |
0 | 1731 BasicType ret_type) { |
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1732 if (method->is_method_handle_intrinsic()) { |
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1733 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1734 intptr_t start = (intptr_t)__ pc(); |
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1735 int vep_offset = ((intptr_t)__ pc()) - start; |
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1736 gen_special_dispatch(masm, |
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1737 total_in_args, |
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1738 comp_args_on_stack, |
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1739 method->intrinsic_id(), |
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1740 in_sig_bt, |
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1741 in_regs); |
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1742 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
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1743 __ flush(); |
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1744 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
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1745 return nmethod::new_native_nmethod(method, |
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1746 compile_id, |
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1747 masm->code(), |
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1748 vep_offset, |
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1749 frame_complete, |
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1750 stack_slots / VMRegImpl::slots_per_word, |
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1751 in_ByteSize(-1), |
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1752 in_ByteSize(-1), |
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1753 (OopMapSet*)NULL); |
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1754 } |
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1755 bool is_critical_native = true; |
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1756 address native_func = method->critical_native_function(); |
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1757 if (native_func == NULL) { |
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1758 native_func = method->native_function(); |
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1759 is_critical_native = false; |
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1760 } |
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1761 assert(native_func != NULL, "must have function"); |
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1762 |
0 | 1763 // An OopMap for lock (and class if static) |
1764 OopMapSet *oop_maps = new OopMapSet(); | |
1765 intptr_t start = (intptr_t)__ pc(); | |
1766 | |
1767 // We have received a description of where all the java arg are located | |
1768 // on entry to the wrapper. We need to convert these args to where | |
1769 // the jni function will expect them. To figure out where they go | |
1770 // we convert the java signature to a C signature by inserting | |
1771 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1772 | |
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1773 int total_c_args = total_in_args; |
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1774 if (!is_critical_native) { |
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1775 total_c_args += 1; |
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1776 if (method->is_static()) { |
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1777 total_c_args++; |
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1778 } |
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1779 } else { |
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1780 for (int i = 0; i < total_in_args; i++) { |
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1781 if (in_sig_bt[i] == T_ARRAY) { |
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1782 total_c_args++; |
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1783 } |
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1784 } |
0 | 1785 } |
1786 | |
1787 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1788 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1789 BasicType* in_elem_bt = NULL; |
0 | 1790 |
1791 int argc = 0; | |
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1792 if (!is_critical_native) { |
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1793 out_sig_bt[argc++] = T_ADDRESS; |
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1794 if (method->is_static()) { |
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1795 out_sig_bt[argc++] = T_OBJECT; |
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1796 } |
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1797 |
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1798 for (int i = 0; i < total_in_args ; i++ ) { |
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1799 out_sig_bt[argc++] = in_sig_bt[i]; |
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1800 } |
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1801 } else { |
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1802 Thread* THREAD = Thread::current(); |
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1803 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1804 SignatureStream ss(method->signature()); |
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1805 for (int i = 0; i < total_in_args ; i++ ) { |
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1806 if (in_sig_bt[i] == T_ARRAY) { |
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1807 // Arrays are passed as int, elem* pair |
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1808 out_sig_bt[argc++] = T_INT; |
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1809 out_sig_bt[argc++] = T_ADDRESS; |
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1810 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1811 const char* at = atype->as_C_string(); |
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1812 if (strlen(at) == 2) { |
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1813 assert(at[0] == '[', "must be"); |
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1814 switch (at[1]) { |
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1815 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1816 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1817 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1818 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1819 case 'I': in_elem_bt[i] = T_INT; break; |
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1820 case 'J': in_elem_bt[i] = T_LONG; break; |
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1821 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1822 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1823 default: ShouldNotReachHere(); |
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1824 } |
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1825 } |
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1826 } else { |
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1827 out_sig_bt[argc++] = in_sig_bt[i]; |
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1828 in_elem_bt[i] = T_VOID; |
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1829 } |
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1830 if (in_sig_bt[i] != T_VOID) { |
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1831 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1832 ss.next(); |
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1833 } |
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1834 } |
0 | 1835 } |
1836 | |
1837 // Now figure out where the args must be stored and how much stack space | |
1838 // they require. | |
1839 int out_arg_slots; | |
1840 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
1841 | |
1842 // Compute framesize for the wrapper. We need to handlize all oops in | |
1843 // incoming registers | |
1844 | |
1845 // Calculate the total number of stack slots we will need. | |
1846 | |
1847 // First count the abi requirement plus all of the outgoing args | |
1848 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1849 | |
1850 // Now the space for the inbound oop handle area | |
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1851 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1852 if (is_critical_native) { |
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1853 // Critical natives may have to call out so they need a save area |
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1854 // for register arguments. |
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1855 int double_slots = 0; |
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1856 int single_slots = 0; |
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1857 for ( int i = 0; i < total_in_args; i++) { |
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1858 if (in_regs[i].first()->is_Register()) { |
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1859 const Register reg = in_regs[i].first()->as_Register(); |
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1860 switch (in_sig_bt[i]) { |
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1861 case T_BOOLEAN: |
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1862 case T_BYTE: |
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1863 case T_SHORT: |
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1864 case T_CHAR: |
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1865 case T_INT: single_slots++; break; |
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1866 case T_ARRAY: // specific to LP64 (7145024) |
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1867 case T_LONG: double_slots++; break; |
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1868 default: ShouldNotReachHere(); |
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1869 } |
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1870 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1871 switch (in_sig_bt[i]) { |
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1872 case T_FLOAT: single_slots++; break; |
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1873 case T_DOUBLE: double_slots++; break; |
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1874 default: ShouldNotReachHere(); |
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1875 } |
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1876 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1877 ShouldNotReachHere(); |
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1878 } |
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1879 } |
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1880 total_save_slots = double_slots * 2 + single_slots; |
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1881 // align the save area |
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1882 if (double_slots != 0) { |
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1883 stack_slots = round_to(stack_slots, 2); |
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1884 } |
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1885 } |
0 | 1886 |
1887 int oop_handle_offset = stack_slots; | |
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1888 stack_slots += total_save_slots; |
0 | 1889 |
1890 // Now any space we need for handlizing a klass if static method | |
1891 | |
1892 int klass_slot_offset = 0; | |
1893 int klass_offset = -1; | |
1894 int lock_slot_offset = 0; | |
1895 bool is_static = false; | |
1896 | |
1897 if (method->is_static()) { | |
1898 klass_slot_offset = stack_slots; | |
1899 stack_slots += VMRegImpl::slots_per_word; | |
1900 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1901 is_static = true; | |
1902 } | |
1903 | |
1904 // Plus a lock if needed | |
1905 | |
1906 if (method->is_synchronized()) { | |
1907 lock_slot_offset = stack_slots; | |
1908 stack_slots += VMRegImpl::slots_per_word; | |
1909 } | |
1910 | |
1911 // Now a place (+2) to save return values or temp during shuffling | |
1912 // + 4 for return address (which we own) and saved rbp | |
1913 stack_slots += 6; | |
1914 | |
1915 // Ok The space we have allocated will look like: | |
1916 // | |
1917 // | |
1918 // FP-> | | | |
1919 // |---------------------| | |
1920 // | 2 slots for moves | | |
1921 // |---------------------| | |
1922 // | lock box (if sync) | | |
1923 // |---------------------| <- lock_slot_offset | |
1924 // | klass (if static) | | |
1925 // |---------------------| <- klass_slot_offset | |
1926 // | oopHandle area | | |
1927 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
1928 // | outbound memory | | |
1929 // | based arguments | | |
1930 // | | | |
1931 // |---------------------| | |
1932 // | | | |
1933 // SP-> | out_preserved_slots | | |
1934 // | |
1935 // | |
1936 | |
1937 | |
1938 // Now compute actual number of stack words we need rounding to make | |
1939 // stack properly aligned. | |
524
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1940 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1941 |
1942 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1943 | |
1944 // First thing make an ic check to see if we should even be here | |
1945 | |
1946 // We are free to use all registers as temps without saving them and | |
1947 // restoring them except rbp. rbp is the only callee save register | |
1948 // as far as the interpreter and the compiler(s) are concerned. | |
1949 | |
1950 | |
1951 const Register ic_reg = rax; | |
1952 const Register receiver = j_rarg0; | |
1953 | |
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1954 Label hit; |
0 | 1955 Label exception_pending; |
1956 | |
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1957 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 1958 __ verify_oop(receiver); |
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1959 __ load_klass(rscratch1, receiver); |
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1960 __ cmpq(ic_reg, rscratch1); |
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1961 __ jcc(Assembler::equal, hit); |
0 | 1962 |
1963 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1964 | |
1965 // Verified entry point must be aligned | |
1966 __ align(8); | |
1967 | |
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1968 __ bind(hit); |
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1969 |
0 | 1970 int vep_offset = ((intptr_t)__ pc()) - start; |
1971 | |
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1972 #ifdef GRAAL |
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1973 if (InlineObjectHash && (method->intrinsic_id() == vmIntrinsics::_hashCode || method->intrinsic_id() == vmIntrinsics::_identityHashCode)) { |
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1974 // Object.hashCode can pull the hashCode from the header word |
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1975 // instead of doing a full VM transition once it's been computed. |
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1976 // Since hashCode is usually polymorphic at call sites we can't do |
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1977 // this optimization at the call site without a lot of work. |
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1978 Label slowCase; |
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1979 Label nullCase; |
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1980 Register result = rax; |
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1981 |
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1982 if (method->intrinsic_id() == vmIntrinsics::_identityHashCode) { |
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1983 __ cmpptr(receiver, 0); |
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1984 __ jcc(Assembler::equal, nullCase); |
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1985 } |
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1986 |
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1987 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); |
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1988 |
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1989 // check if locked |
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1990 __ testptr(result, markOopDesc::unlocked_value); |
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1991 __ jcc (Assembler::zero, slowCase); |
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1992 |
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1993 if (UseBiasedLocking) { |
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1994 // Check if biased and fall through to runtime if so |
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1995 __ testptr(result, markOopDesc::biased_lock_bit_in_place); |
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1996 __ jcc (Assembler::notZero, slowCase); |
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1997 } |
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1998 |
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1999 // get hash |
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2000 __ shrptr(result, markOopDesc::hash_shift); |
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2001 __ andptr(result, markOopDesc::hash_mask); |
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2002 // test if hashCode exists |
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2003 __ jcc (Assembler::zero, slowCase); |
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2004 __ ret(0); |
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2005 |
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2006 if (method->intrinsic_id() == vmIntrinsics::_identityHashCode) { |
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2007 __ bind(nullCase); |
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2008 __ movl(result, 0); |
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2009 __ ret(0); |
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2010 } |
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2011 |
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2012 __ bind (slowCase); |
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2013 } |
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2014 #endif // GRAAL |
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2015 |
0 | 2016 // The instruction at the verified entry point must be 5 bytes or longer |
2017 // because it can be patched on the fly by make_non_entrant. The stack bang | |
2018 // instruction fits that requirement. | |
2019 | |
2020 // Generate stack overflow check | |
2021 | |
2022 if (UseStackBanging) { | |
2023 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
2024 } else { | |
2025 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
2026 __ fat_nop(); | |
2027 } | |
2028 | |
2029 // Generate a new frame for the wrapper. | |
2030 __ enter(); | |
2031 // -2 because return address is already present and so is saved rbp | |
304 | 2032 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 2033 |
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2034 // Frame is now completed as far as size and linkage. |
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2035 int frame_complete = ((intptr_t)__ pc()) - start; |
0 | 2036 |
2037 #ifdef ASSERT | |
2038 { | |
2039 Label L; | |
304 | 2040 __ mov(rax, rsp); |
605 | 2041 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 2042 __ cmpptr(rax, rsp); |
0 | 2043 __ jcc(Assembler::equal, L); |
2044 __ stop("improperly aligned stack"); | |
2045 __ bind(L); | |
2046 } | |
2047 #endif /* ASSERT */ | |
2048 | |
2049 | |
2050 // We use r14 as the oop handle for the receiver/klass | |
2051 // It is callee save so it survives the call to native | |
2052 | |
2053 const Register oop_handle_reg = r14; | |
2054 | |
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2055 if (is_critical_native) { |
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2056 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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2057 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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2058 } |
0 | 2059 |
2060 // | |
2061 // We immediately shuffle the arguments so that any vm call we have to | |
2062 // make from here on out (sync slow path, jvmti, etc.) we will have | |
2063 // captured the oops from our caller and have a valid oopMap for | |
2064 // them. | |
2065 | |
2066 // ----------------- | |
2067 // The Grand Shuffle | |
2068 | |
2069 // The Java calling convention is either equal (linux) or denser (win64) than the | |
2070 // c calling convention. However the because of the jni_env argument the c calling | |
2071 // convention always has at least one more (and two for static) arguments than Java. | |
2072 // Therefore if we move the args from java -> c backwards then we will never have | |
2073 // a register->register conflict and we don't have to build a dependency graph | |
2074 // and figure out how to break any cycles. | |
2075 // | |
2076 | |
2077 // Record esp-based slot for receiver on stack for non-static methods | |
2078 int receiver_offset = -1; | |
2079 | |
2080 // This is a trick. We double the stack slots so we can claim | |
2081 // the oops in the caller's frame. Since we are sure to have | |
2082 // more args than the caller doubling is enough to make | |
2083 // sure we can capture all the incoming oop args from the | |
2084 // caller. | |
2085 // | |
2086 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
2087 | |
2088 // Mark location of rbp (someday) | |
2089 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
2090 | |
2091 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
2092 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
2093 | |
2094 | |
2095 #ifdef ASSERT | |
2096 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
2097 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
2098 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
2099 reg_destroyed[r] = false; | |
2100 } | |
2101 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
2102 freg_destroyed[f] = false; | |
2103 } | |
2104 | |
2105 #endif /* ASSERT */ | |
2106 | |
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2107 // This may iterate in two different directions depending on the |
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2108 // kind of native it is. The reason is that for regular JNI natives |
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2109 // the incoming and outgoing registers are offset upwards and for |
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2110 // critical natives they are offset down. |
5905 | 2111 GrowableArray<int> arg_order(2 * total_in_args); |
2112 VMRegPair tmp_vmreg; | |
2113 tmp_vmreg.set1(rbx->as_VMReg()); | |
2114 | |
2115 if (!is_critical_native) { | |
2116 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
2117 arg_order.push(i); | |
2118 arg_order.push(c_arg); | |
2119 } | |
2120 } else { | |
2121 // Compute a valid move order, using tmp_vmreg to break any cycles | |
2122 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
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2123 } |
5905 | 2124 |
2125 int temploc = -1; | |
2126 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
2127 int i = arg_order.at(ai); | |
2128 int c_arg = arg_order.at(ai + 1); | |
2129 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
2130 if (c_arg == -1) { | |
2131 assert(is_critical_native, "should only be required for critical natives"); | |
2132 // This arg needs to be moved to a temporary | |
2133 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
2134 in_regs[i] = tmp_vmreg; | |
2135 temploc = i; | |
2136 continue; | |
2137 } else if (i == -1) { | |
2138 assert(is_critical_native, "should only be required for critical natives"); | |
2139 // Read from the temporary location | |
2140 assert(temploc != -1, "must be valid"); | |
2141 i = temploc; | |
2142 temploc = -1; | |
2143 } | |
0 | 2144 #ifdef ASSERT |
2145 if (in_regs[i].first()->is_Register()) { | |
2146 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
2147 } else if (in_regs[i].first()->is_XMMRegister()) { | |
2148 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
2149 } | |
2150 if (out_regs[c_arg].first()->is_Register()) { | |
2151 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
2152 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
2153 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
2154 } | |
2155 #endif /* ASSERT */ | |
2156 switch (in_sig_bt[i]) { | |
2157 case T_ARRAY: | |
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2158 if (is_critical_native) { |
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2159 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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2160 c_arg++; |
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2161 #ifdef ASSERT |
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2162 if (out_regs[c_arg].first()->is_Register()) { |
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2163 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2164 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2165 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2166 } |
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2167 #endif |
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2168 break; |
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2169 } |
0 | 2170 case T_OBJECT: |
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2171 assert(!is_critical_native, "no oop arguments"); |
0 | 2172 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
2173 ((i == 0) && (!is_static)), | |
2174 &receiver_offset); | |
2175 break; | |
2176 case T_VOID: | |
2177 break; | |
2178 | |
2179 case T_FLOAT: | |
2180 float_move(masm, in_regs[i], out_regs[c_arg]); | |
2181 break; | |
2182 | |
2183 case T_DOUBLE: | |
2184 assert( i + 1 < total_in_args && | |
2185 in_sig_bt[i + 1] == T_VOID && | |
2186 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
2187 double_move(masm, in_regs[i], out_regs[c_arg]); | |
2188 break; | |
2189 | |
2190 case T_LONG : | |
2191 long_move(masm, in_regs[i], out_regs[c_arg]); | |
2192 break; | |
2193 | |
2194 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
2195 | |
2196 default: | |
2197 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
2198 } | |
2199 } | |
2200 | |
2201 // point c_arg at the first arg that is already loaded in case we | |
2202 // need to spill before we call out | |
5905 | 2203 int c_arg = total_c_args - total_in_args; |
0 | 2204 |
2205 // Pre-load a static method's oop into r14. Used both by locking code and | |
2206 // the normal JNI call code. | |
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2207 if (method->is_static() && !is_critical_native) { |
0 | 2208 |
2209 // load oop into a register | |
2210 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); | |
2211 | |
2212 // Now handlize the static class mirror it's known not-null. | |
304 | 2213 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
0 | 2214 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
2215 | |
2216 // Now get the handle | |
304 | 2217 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
0 | 2218 // store the klass handle as second argument |
304 | 2219 __ movptr(c_rarg1, oop_handle_reg); |
0 | 2220 // and protect the arg if we must spill |
2221 c_arg--; | |
2222 } | |
2223 | |
2224 // Change state to native (we save the return address in the thread, since it might not | |
2225 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
2226 // points into the right code segment. It does not have to be the correct return pc. | |
2227 // We use the same pc/oopMap repeatedly when we call out | |
2228 | |
2229 intptr_t the_pc = (intptr_t) __ pc(); | |
2230 oop_maps->add_gc_map(the_pc - start, map); | |
2231 | |
2232 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
2233 | |
2234 | |
2235 // We have all of the arguments setup at this point. We must not touch any register | |
2236 // argument registers at this point (what if we save/restore them there are no oop? | |
2237 | |
2238 { | |
2239 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2240 // protect the args we've loaded | |
2241 save_args(masm, total_c_args, c_arg, out_regs); | |
2242 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
2243 __ call_VM_leaf( | |
2244 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
2245 r15_thread, c_rarg1); | |
2246 restore_args(masm, total_c_args, c_arg, out_regs); | |
2247 } | |
2248 | |
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2249 // RedefineClasses() tracing support for obsolete method entry |
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2250 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2251 // protect the args we've loaded |
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2252 save_args(masm, total_c_args, c_arg, out_regs); |
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2253 __ movoop(c_rarg1, JNIHandles::make_local(method())); |
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2254 __ call_VM_leaf( |
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2255 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2256 r15_thread, c_rarg1); |
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2257 restore_args(masm, total_c_args, c_arg, out_regs); |
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2258 } |
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2259 |
0 | 2260 // Lock a synchronized method |
2261 | |
2262 // Register definitions used by locking and unlocking | |
2263 | |
2264 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
2265 const Register obj_reg = rbx; // Will contain the oop | |
2266 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
2267 const Register old_hdr = r13; // value of old header at unlock time | |
2268 | |
2269 Label slow_path_lock; | |
2270 Label lock_done; | |
2271 | |
2272 if (method->is_synchronized()) { | |
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2273 assert(!is_critical_native, "unhandled"); |
0 | 2274 |
2275 | |
2276 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
2277 | |
2278 // Get the handle (the 2nd argument) | |
304 | 2279 __ mov(oop_handle_reg, c_rarg1); |
0 | 2280 |
2281 // Get address of the box | |
2282 | |
304 | 2283 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2284 |
2285 // Load the oop from the handle | |
304 | 2286 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2287 |
2288 if (UseBiasedLocking) { | |
2289 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
2290 } | |
2291 | |
2292 // Load immediate 1 into swap_reg %rax | |
2293 __ movl(swap_reg, 1); | |
2294 | |
2295 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 2296 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 2297 |
2298 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 2299 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2300 |
2301 if (os::is_MP()) { | |
2302 __ lock(); | |
2303 } | |
2304 | |
2305 // src -> dest iff dest == rax else rax <- dest | |
304 | 2306 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 2307 __ jcc(Assembler::equal, lock_done); |
2308 | |
2309 // Hmm should this move to the slow path code area??? | |
2310 | |
2311 // Test if the oopMark is an obvious stack pointer, i.e., | |
2312 // 1) (mark & 3) == 0, and | |
2313 // 2) rsp <= mark < mark + os::pagesize() | |
2314 // These 3 tests can be done by evaluating the following | |
2315 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
2316 // assuming both stack pointer and pagesize have their | |
2317 // least significant 2 bits clear. | |
2318 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
2319 | |
304 | 2320 __ subptr(swap_reg, rsp); |
2321 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 2322 |
2323 // Save the test result, for recursive case, the result is zero | |
304 | 2324 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2325 __ jcc(Assembler::notEqual, slow_path_lock); |
2326 | |
2327 // Slow path will re-enter here | |
2328 | |
2329 __ bind(lock_done); | |
2330 } | |
2331 | |
2332 | |
2333 // Finally just about ready to make the JNI call | |
2334 | |
2335 | |
2336 // get JNIEnv* which is first argument to native | |
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2337 if (!is_critical_native) { |
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2338 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2339 } |
0 | 2340 |
2341 // Now set thread in native | |
304 | 2342 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 2343 |
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2344 __ call(RuntimeAddress(native_func)); |
0 | 2345 |
2346 // Either restore the MXCSR register after returning from the JNI Call | |
2347 // or verify that it wasn't changed. | |
2348 if (RestoreMXCSROnJNICalls) { | |
304 | 2349 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std())); |
0 | 2350 |
2351 } | |
2352 else if (CheckJNICalls ) { | |
304 | 2353 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry()))); |
0 | 2354 } |
2355 | |
2356 | |
2357 // Unpack native results. | |
2358 switch (ret_type) { | |
2359 case T_BOOLEAN: __ c2bool(rax); break; | |
2360 case T_CHAR : __ movzwl(rax, rax); break; | |
2361 case T_BYTE : __ sign_extend_byte (rax); break; | |
2362 case T_SHORT : __ sign_extend_short(rax); break; | |
2363 case T_INT : /* nothing to do */ break; | |
2364 case T_DOUBLE : | |
2365 case T_FLOAT : | |
2366 // Result is in xmm0 we'll save as needed | |
2367 break; | |
2368 case T_ARRAY: // Really a handle | |
2369 case T_OBJECT: // Really a handle | |
2370 break; // can't de-handlize until after safepoint check | |
2371 case T_VOID: break; | |
2372 case T_LONG: break; | |
2373 default : ShouldNotReachHere(); | |
2374 } | |
2375 | |
2376 // Switch thread to "native transition" state before reading the synchronization state. | |
2377 // This additional state is necessary because reading and testing the synchronization | |
2378 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2379 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2380 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2381 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2382 // didn't see any synchronization is progress, and escapes. | |
304 | 2383 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 2384 |
2385 if(os::is_MP()) { | |
2386 if (UseMembar) { | |
2387 // Force this write out before the read below | |
2388 __ membar(Assembler::Membar_mask_bits( | |
2389 Assembler::LoadLoad | Assembler::LoadStore | | |
2390 Assembler::StoreLoad | Assembler::StoreStore)); | |
2391 } else { | |
2392 // Write serialization page so VM thread can do a pseudo remote membar. | |
2393 // We use the current thread pointer to calculate a thread specific | |
2394 // offset to write to within the page. This minimizes bus traffic | |
2395 // due to cache line collision. | |
2396 __ serialize_memory(r15_thread, rcx); | |
2397 } | |
2398 } | |
2399 | |
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2400 Label after_transition; |
0 | 2401 |
2402 // check for safepoint operation in progress and/or pending suspend requests | |
2403 { | |
2404 Label Continue; | |
2405 | |
2406 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
2407 SafepointSynchronize::_not_synchronized); | |
2408 | |
2409 Label L; | |
2410 __ jcc(Assembler::notEqual, L); | |
2411 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
2412 __ jcc(Assembler::equal, Continue); | |
2413 __ bind(L); | |
2414 | |
2415 // Don't use call_VM as it will see a possible pending exception and forward it | |
2416 // and never return here preventing us from clearing _last_native_pc down below. | |
2417 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2418 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2419 // by hand. | |
2420 // | |
2421 save_native_result(masm, ret_type, stack_slots); | |
304 | 2422 __ mov(c_rarg0, r15_thread); |
2423 __ mov(r12, rsp); // remember sp | |
2424 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2425 __ andptr(rsp, -16); // align stack as required by ABI | |
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2426 if (!is_critical_native) { |
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2427 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2428 } else { |
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2429 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2430 } |
304 | 2431 __ mov(rsp, r12); // restore sp |
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2432 __ reinit_heapbase(); |
0 | 2433 // Restore any method result value |
2434 restore_native_result(masm, ret_type, stack_slots); | |
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2435 |
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2436 if (is_critical_native) { |
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2437 // The call above performed the transition to thread_in_Java so |
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2438 // skip the transition logic below. |
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2439 __ jmpb(after_transition); |
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2440 } |
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2441 |
0 | 2442 __ bind(Continue); |
2443 } | |
2444 | |
2445 // change thread state | |
2446 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2447 __ bind(after_transition); |
0 | 2448 |
2449 Label reguard; | |
2450 Label reguard_done; | |
2451 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2452 __ jcc(Assembler::equal, reguard); | |
2453 __ bind(reguard_done); | |
2454 | |
2455 // native result if any is live | |
2456 | |
2457 // Unlock | |
2458 Label unlock_done; | |
2459 Label slow_path_unlock; | |
2460 if (method->is_synchronized()) { | |
2461 | |
2462 // Get locked oop from the handle we passed to jni | |
304 | 2463 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2464 |
2465 Label done; | |
2466 | |
2467 if (UseBiasedLocking) { | |
2468 __ biased_locking_exit(obj_reg, old_hdr, done); | |
2469 } | |
2470 | |
2471 // Simple recursive lock? | |
2472 | |
304 | 2473 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 2474 __ jcc(Assembler::equal, done); |
2475 | |
2476 // Must save rax if if it is live now because cmpxchg must use it | |
2477 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2478 save_native_result(masm, ret_type, stack_slots); | |
2479 } | |
2480 | |
2481 | |
2482 // get address of the stack lock | |
304 | 2483 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2484 // get old displaced header |
304 | 2485 __ movptr(old_hdr, Address(rax, 0)); |
0 | 2486 |
2487 // Atomic swap old header if oop still contains the stack lock | |
2488 if (os::is_MP()) { | |
2489 __ lock(); | |
2490 } | |
304 | 2491 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 2492 __ jcc(Assembler::notEqual, slow_path_unlock); |
2493 | |
2494 // slow path re-enters here | |
2495 __ bind(unlock_done); | |
2496 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2497 restore_native_result(masm, ret_type, stack_slots); | |
2498 } | |
2499 | |
2500 __ bind(done); | |
2501 | |
2502 } | |
2503 { | |
2504 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2505 save_native_result(masm, ret_type, stack_slots); | |
2506 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
2507 __ call_VM_leaf( | |
2508 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2509 r15_thread, c_rarg1); | |
2510 restore_native_result(masm, ret_type, stack_slots); | |
2511 } | |
2512 | |
2513 __ reset_last_Java_frame(false, true); | |
2514 | |
2515 // Unpack oop result | |
2516 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2517 Label L; | |
304 | 2518 __ testptr(rax, rax); |
0 | 2519 __ jcc(Assembler::zero, L); |
304 | 2520 __ movptr(rax, Address(rax, 0)); |
0 | 2521 __ bind(L); |
2522 __ verify_oop(rax); | |
2523 } | |
2524 | |
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2525 if (!is_critical_native) { |
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2526 // reset handle block |
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2527 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2528 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2529 } |
0 | 2530 |
2531 // pop our frame | |
2532 | |
2533 __ leave(); | |
2534 | |
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2535 if (!is_critical_native) { |
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2536 // Any exception pending? |
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2537 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2538 __ jcc(Assembler::notEqual, exception_pending); |
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2539 } |
0 | 2540 |
2541 // Return | |
2542 | |
2543 __ ret(0); | |
2544 | |
2545 // Unexpected paths are out of line and go here | |
2546 | |
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2547 if (!is_critical_native) { |
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2548 // forward the exception |
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2549 __ bind(exception_pending); |
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2550 |
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2551 // and forward the exception |
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2552 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2553 } |
0 | 2554 |
2555 // Slow path locking & unlocking | |
2556 if (method->is_synchronized()) { | |
2557 | |
2558 // BEGIN Slow path lock | |
2559 __ bind(slow_path_lock); | |
2560 | |
2561 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2562 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
2563 | |
2564 // protect the args we've loaded | |
2565 save_args(masm, total_c_args, c_arg, out_regs); | |
2566 | |
304 | 2567 __ mov(c_rarg0, obj_reg); |
2568 __ mov(c_rarg1, lock_reg); | |
2569 __ mov(c_rarg2, r15_thread); | |
0 | 2570 |
2571 // Not a leaf but we have last_Java_frame setup as we want | |
2572 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
2573 restore_args(masm, total_c_args, c_arg, out_regs); | |
2574 | |
2575 #ifdef ASSERT | |
2576 { Label L; | |
304 | 2577 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2578 __ jcc(Assembler::equal, L); |
2579 __ stop("no pending exception allowed on exit from monitorenter"); | |
2580 __ bind(L); | |
2581 } | |
2582 #endif | |
2583 __ jmp(lock_done); | |
2584 | |
2585 // END Slow path lock | |
2586 | |
2587 // BEGIN Slow path unlock | |
2588 __ bind(slow_path_unlock); | |
2589 | |
2590 // If we haven't already saved the native result we must save it now as xmm registers | |
2591 // are still exposed. | |
2592 | |
2593 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2594 save_native_result(masm, ret_type, stack_slots); | |
2595 } | |
2596 | |
304 | 2597 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
2598 | |
2599 __ mov(c_rarg0, obj_reg); | |
2600 __ mov(r12, rsp); // remember sp | |
2601 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2602 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2603 |
2604 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2605 // NOTE that obj_reg == rbx currently | |
304 | 2606 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
2607 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 2608 |
2609 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 2610 __ mov(rsp, r12); // restore sp |
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2611 __ reinit_heapbase(); |
0 | 2612 #ifdef ASSERT |
2613 { | |
2614 Label L; | |
304 | 2615 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2616 __ jcc(Assembler::equal, L); |
2617 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2618 __ bind(L); | |
2619 } | |
2620 #endif /* ASSERT */ | |
2621 | |
304 | 2622 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 2623 |
2624 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2625 restore_native_result(masm, ret_type, stack_slots); | |
2626 } | |
2627 __ jmp(unlock_done); | |
2628 | |
2629 // END Slow path unlock | |
2630 | |
2631 } // synchronized | |
2632 | |
2633 // SLOW PATH Reguard the stack if needed | |
2634 | |
2635 __ bind(reguard); | |
2636 save_native_result(masm, ret_type, stack_slots); | |
304 | 2637 __ mov(r12, rsp); // remember sp |
2638 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2639 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2640 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 2641 __ mov(rsp, r12); // restore sp |
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2642 __ reinit_heapbase(); |
0 | 2643 restore_native_result(masm, ret_type, stack_slots); |
2644 // and continue | |
2645 __ jmp(reguard_done); | |
2646 | |
2647 | |
2648 | |
2649 __ flush(); | |
2650 | |
2651 nmethod *nm = nmethod::new_native_nmethod(method, | |
2405
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2652 compile_id, |
0 | 2653 masm->code(), |
2654 vep_offset, | |
2655 frame_complete, | |
2656 stack_slots / VMRegImpl::slots_per_word, | |
2657 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2658 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2659 oop_maps); | |
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2660 |
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2661 if (is_critical_native) { |
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2662 nm->set_lazy_critical_native(true); |
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2663 } |
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2664 |
0 | 2665 return nm; |
2666 | |
2667 } | |
2668 | |
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2669 #ifdef HAVE_DTRACE_H |
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2670 // --------------------------------------------------------------------------- |
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2671 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2672 // in the Java compiled code convention, marshals them to the native |
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2673 // abi and then leaves nops at the position you would expect to call a native |
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2674 // function. When the probe is enabled the nops are replaced with a trap |
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2675 // instruction that dtrace inserts and the trace will cause a notification |
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2676 // to dtrace. |
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2677 // |
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2678 // The probes are only able to take primitive types and java/lang/String as |
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2679 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2680 // strings so that from dtrace point of view java strings are converted to C |
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2681 // strings. There is an arbitrary fixed limit on the total space that a method |
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2682 // can use for converting the strings. (256 chars per string in the signature). |
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2683 // So any java string larger then this is truncated. |
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2684 |
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2685 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2686 static bool offsets_initialized = false; |
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2687 |
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2688 |
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2689 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2690 methodHandle method) { |
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2691 |
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2692 |
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2693 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2694 // be single threaded in this method. |
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2695 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2696 |
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2697 if (!offsets_initialized) { |
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2698 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2699 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2700 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2701 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2702 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2703 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2704 |
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2705 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2706 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2707 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2708 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2709 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2710 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2711 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2712 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2713 |
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2714 offsets_initialized = true; |
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2715 } |
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2716 // Fill in the signature array, for the calling-convention call. |
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2717 int total_args_passed = method->size_of_parameters(); |
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2718 |
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2719 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2720 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2721 |
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2722 // The signature we are going to use for the trap that dtrace will see |
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2723 // java/lang/String is converted. We drop "this" and any other object |
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2724 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2725 // is converted to a two-slot long, which is why we double the allocation). |
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2726 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2727 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2728 |
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2729 int i=0; |
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2730 int total_strings = 0; |
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2731 int first_arg_to_pass = 0; |
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2732 int total_c_args = 0; |
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2733 |
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2734 // Skip the receiver as dtrace doesn't want to see it |
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2735 if( !method->is_static() ) { |
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2736 in_sig_bt[i++] = T_OBJECT; |
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2737 first_arg_to_pass = 1; |
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2738 } |
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2739 |
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2740 // We need to convert the java args to where a native (non-jni) function |
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2741 // would expect them. To figure out where they go we convert the java |
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2742 // signature to a C signature. |
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2743 |
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2744 SignatureStream ss(method->signature()); |
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2745 for ( ; !ss.at_return_type(); ss.next()) { |
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2746 BasicType bt = ss.type(); |
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2747 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2748 out_sig_bt[total_c_args++] = bt; |
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2749 if( bt == T_OBJECT) { |
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2750 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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2751 if (s == vmSymbols::java_lang_String()) { |
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2752 total_strings++; |
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2753 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2754 } else if (s == vmSymbols::java_lang_Boolean() || |
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2755 s == vmSymbols::java_lang_Character() || |
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2756 s == vmSymbols::java_lang_Byte() || |
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2757 s == vmSymbols::java_lang_Short() || |
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2758 s == vmSymbols::java_lang_Integer() || |
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2759 s == vmSymbols::java_lang_Float()) { |
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2760 out_sig_bt[total_c_args-1] = T_INT; |
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2761 } else if (s == vmSymbols::java_lang_Long() || |
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2762 s == vmSymbols::java_lang_Double()) { |
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2763 out_sig_bt[total_c_args-1] = T_LONG; |
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2764 out_sig_bt[total_c_args++] = T_VOID; |
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2765 } |
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2766 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2767 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2768 // We convert double to long |
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2769 out_sig_bt[total_c_args-1] = T_LONG; |
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2770 out_sig_bt[total_c_args++] = T_VOID; |
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2771 } else if ( bt == T_FLOAT) { |
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2772 // We convert float to int |
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2773 out_sig_bt[total_c_args-1] = T_INT; |
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2774 } |
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2775 } |
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2776 |
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2777 assert(i==total_args_passed, "validly parsed signature"); |
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2778 |
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2779 // Now get the compiled-Java layout as input arguments |
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2780 int comp_args_on_stack; |
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2781 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2782 in_sig_bt, in_regs, total_args_passed, false); |
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2783 |
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2784 // Now figure out where the args must be stored and how much stack space |
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2785 // they require (neglecting out_preserve_stack_slots but space for storing |
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2786 // the 1st six register arguments). It's weird see int_stk_helper. |
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2787 |
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2788 int out_arg_slots; |
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2789 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2790 |
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2791 // Calculate the total number of stack slots we will need. |
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2792 |
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2793 // First count the abi requirement plus all of the outgoing args |
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2794 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2795 |
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2796 // Now space for the string(s) we must convert |
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2797 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2798 for (i = 0; i < total_strings ; i++) { |
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2799 string_locs[i] = stack_slots; |
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2800 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2801 } |
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2802 |
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2803 // Plus the temps we might need to juggle register args |
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2804 // regs take two slots each |
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2805 stack_slots += (Argument::n_int_register_parameters_c + |
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2806 Argument::n_float_register_parameters_c) * 2; |
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2807 |
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2808 |
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2809 // + 4 for return address (which we own) and saved rbp, |
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2810 |
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2811 stack_slots += 4; |
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2812 |
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2813 // Ok The space we have allocated will look like: |
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2814 // |
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2815 // |
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2816 // FP-> | | |
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2817 // |---------------------| |
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2818 // | string[n] | |
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2819 // |---------------------| <- string_locs[n] |
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2820 // | string[n-1] | |
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2821 // |---------------------| <- string_locs[n-1] |
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2822 // | ... | |
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2823 // | ... | |
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2824 // |---------------------| <- string_locs[1] |
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2825 // | string[0] | |
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2826 // |---------------------| <- string_locs[0] |
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2827 // | outbound memory | |
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2828 // | based arguments | |
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2829 // | | |
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2830 // |---------------------| |
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2831 // | | |
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2832 // SP-> | out_preserved_slots | |
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2833 // |
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2834 // |
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2835 |
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2836 // Now compute actual number of stack words we need rounding to make |
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2837 // stack properly aligned. |
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2838 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2839 |
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2840 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2841 |
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2842 intptr_t start = (intptr_t)__ pc(); |
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2843 |
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2844 // First thing make an ic check to see if we should even be here |
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2845 |
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2846 // We are free to use all registers as temps without saving them and |
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2847 // restoring them except rbp. rbp, is the only callee save register |
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2848 // as far as the interpreter and the compiler(s) are concerned. |
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2849 |
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2850 const Register ic_reg = rax; |
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2851 const Register receiver = rcx; |
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2852 Label hit; |
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2853 Label exception_pending; |
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2854 |
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2855 |
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2856 __ verify_oop(receiver); |
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2857 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2858 __ jcc(Assembler::equal, hit); |
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2859 |
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2860 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2861 |
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2862 // verified entry must be aligned for code patching. |
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2863 // and the first 5 bytes must be in the same cache line |
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2864 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2865 __ align(8); |
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2866 |
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2867 __ bind(hit); |
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2868 |
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2869 int vep_offset = ((intptr_t)__ pc()) - start; |
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2870 |
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2871 |
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2872 // The instruction at the verified entry point must be 5 bytes or longer |
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2873 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2874 // instruction fits that requirement. |
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2875 |
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2876 // Generate stack overflow check |
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2877 |
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2878 if (UseStackBanging) { |
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2879 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2880 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2881 } else { |
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2882 __ movl(rax, stack_size); |
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2883 __ bang_stack_size(rax, rbx); |
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2884 } |
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2885 } else { |
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2886 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2887 __ fat_nop(); |
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2888 } |
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2889 |
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2890 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2891 "valid size for make_non_entrant"); |
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2892 |
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2893 // Generate a new frame for the wrapper. |
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2894 __ enter(); |
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2895 |
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2896 // -4 because return address is already present and so is saved rbp, |
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2897 if (stack_size - 2*wordSize != 0) { |
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2898 __ subq(rsp, stack_size - 2*wordSize); |
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2899 } |
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2900 |
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2901 // Frame is now completed as far a size and linkage. |
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2902 |
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2903 int frame_complete = ((intptr_t)__ pc()) - start; |
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2904 |
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2905 int c_arg, j_arg; |
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2906 |
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2907 // State of input register args |
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2908 |
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2909 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2910 |
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2911 live[j_rarg0->as_VMReg()->value()] = false; |
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2912 live[j_rarg1->as_VMReg()->value()] = false; |
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2913 live[j_rarg2->as_VMReg()->value()] = false; |
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2914 live[j_rarg3->as_VMReg()->value()] = false; |
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2915 live[j_rarg4->as_VMReg()->value()] = false; |
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2916 live[j_rarg5->as_VMReg()->value()] = false; |
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2917 |
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2918 live[j_farg0->as_VMReg()->value()] = false; |
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2919 live[j_farg1->as_VMReg()->value()] = false; |
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2920 live[j_farg2->as_VMReg()->value()] = false; |
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2921 live[j_farg3->as_VMReg()->value()] = false; |
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2922 live[j_farg4->as_VMReg()->value()] = false; |
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2923 live[j_farg5->as_VMReg()->value()] = false; |
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2924 live[j_farg6->as_VMReg()->value()] = false; |
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2925 live[j_farg7->as_VMReg()->value()] = false; |
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2926 |
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2927 |
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2928 bool rax_is_zero = false; |
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2929 |
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2930 // All args (except strings) destined for the stack are moved first |
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2931 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2932 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2933 VMRegPair src = in_regs[j_arg]; |
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2934 VMRegPair dst = out_regs[c_arg]; |
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2935 |
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2936 // Get the real reg value or a dummy (rsp) |
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2937 |
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2938 int src_reg = src.first()->is_reg() ? |
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2939 src.first()->value() : |
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2940 rsp->as_VMReg()->value(); |
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2941 |
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2942 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2943 (in_sig_bt[j_arg] == T_OBJECT && |
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2944 out_sig_bt[c_arg] != T_INT && |
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2945 out_sig_bt[c_arg] != T_ADDRESS && |
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2946 out_sig_bt[c_arg] != T_LONG); |
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2947 |
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2948 live[src_reg] = !useless; |
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2949 |
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2950 if (dst.first()->is_stack()) { |
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2951 |
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2952 // Even though a string arg in a register is still live after this loop |
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2953 // after the string conversion loop (next) it will be dead so we take |
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2954 // advantage of that now for simpler code to manage live. |
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2955 |
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2956 live[src_reg] = false; |
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2957 switch (in_sig_bt[j_arg]) { |
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2958 |
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2959 case T_ARRAY: |
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2960 case T_OBJECT: |
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2961 { |
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2962 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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2963 |
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2964 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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|
2965 // need to unbox a one-word value |
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2966 Register in_reg = rax; |
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2967 if ( src.first()->is_reg() ) { |
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|
2968 in_reg = src.first()->as_Register(); |
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|
2969 } else { |
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|
2970 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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2971 rax_is_zero = false; |
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|
2972 } |
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diff
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|
2973 Label skipUnbox; |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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|
2974 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
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2975 (int32_t)NULL_WORD); |
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|
2976 __ testq(in_reg, in_reg); |
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2977 __ jcc(Assembler::zero, skipUnbox); |
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|
2978 |
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
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diff
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|
2979 BasicType bt = out_sig_bt[c_arg]; |
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
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|
2980 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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|
2981 Address src1(in_reg, box_offset); |
165
437d03ea40b1
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|
2982 if ( bt == T_LONG ) { |
116
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|
2983 __ movq(in_reg, src1); |
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|
2984 __ movq(stack_dst, in_reg); |
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2985 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2986 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
2987 } else { |
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|
2988 __ movl(in_reg, src1); |
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diff
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|
2989 __ movl(stack_dst, in_reg); |
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113
diff
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|
2990 } |
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113
diff
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|
2991 |
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|
2992 __ bind(skipUnbox); |
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|
2993 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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|
2994 // Convert the arg to NULL |
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|
2995 if (!rax_is_zero) { |
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|
2996 __ xorq(rax, rax); |
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|
2997 rax_is_zero = true; |
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113
diff
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|
2998 } |
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113
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|
2999 __ movq(stack_dst, rax); |
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113
diff
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|
3000 } |
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113
diff
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|
3001 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3002 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3003 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3004 case T_VOID: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3005 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3006 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3007 case T_FLOAT: |
018d5b58dd4f
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kamg
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113
diff
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|
3008 // This does the right thing since we know it is destined for the |
018d5b58dd4f
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113
diff
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|
3009 // stack |
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113
diff
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|
3010 float_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3011 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3012 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3013 case T_DOUBLE: |
018d5b58dd4f
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kamg
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|
3014 // This does the right thing since we know it is destined for the |
018d5b58dd4f
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kamg
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113
diff
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|
3015 // stack |
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diff
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|
3016 double_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3017 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3018 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3019 case T_LONG : |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3020 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3021 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3022 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3023 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3024 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3025 default: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3026 move32_64(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3027 } |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3028 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3029 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3030 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3031 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3032 // If we have any strings we must store any register based arg to the stack |
018d5b58dd4f
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kamg
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113
diff
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|
3033 // This includes any still live xmm registers too. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3034 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3035 int sid = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3036 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3037 if (total_strings > 0 ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3038 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3039 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3040 VMRegPair src = in_regs[j_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3041 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3042 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3043 if (src.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3044 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3045 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3046 // string oops were left untouched by the previous loop even if the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3047 // eventual (converted) arg is destined for the stack so park them |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3048 // away now (except for first) |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3049 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3050 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3051 Address utf8_addr = Address( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3052 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3053 if (sid != 1) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3054 // The first string arg won't be killed until after the utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3055 // conversion |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3056 __ movq(utf8_addr, src.first()->as_Register()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3057 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3058 } else if (dst.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3059 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3060 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3061 // Convert the xmm register to an int and store it in the reserved |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3062 // location for the eventual c register arg |
018d5b58dd4f
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kamg
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113
diff
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|
3063 XMMRegister f = src.first()->as_XMMRegister(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3064 if (in_sig_bt[j_arg] == T_FLOAT) { |
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113
diff
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|
3065 __ movflt(src_tmp, f); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3066 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3067 __ movdbl(src_tmp, f); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3068 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3069 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3070 // If the arg is an oop type we don't support don't bother to store |
018d5b58dd4f
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kamg
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113
diff
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|
3071 // it remember string was handled above. |
018d5b58dd4f
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113
diff
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|
3072 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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kamg
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113
diff
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|
3073 (in_sig_bt[j_arg] == T_OBJECT && |
018d5b58dd4f
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113
diff
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|
3074 out_sig_bt[c_arg] != T_INT && |
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113
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|
3075 out_sig_bt[c_arg] != T_LONG); |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3076 |
018d5b58dd4f
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kamg
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113
diff
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|
3077 if (!useless) { |
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113
diff
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|
3078 __ movq(src_tmp, src.first()->as_Register()); |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3079 } |
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3080 } |
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3081 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3082 } |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3083 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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113
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|
3084 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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|
3085 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3086 } |
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|
3087 } |
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|
3088 |
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3089 // Now that the volatile registers are safe, convert all the strings |
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3090 sid = 0; |
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3091 |
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3092 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3093 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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3094 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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3095 // It's a string |
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3096 Address utf8_addr = Address( |
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3097 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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3098 // The first string we find might still be in the original java arg |
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3099 // register |
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3100 |
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3101 VMReg src = in_regs[j_arg].first(); |
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3102 |
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3103 // We will need to eventually save the final argument to the trap |
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3104 // in the von-volatile location dedicated to src. This is the offset |
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3105 // from fp we will use. |
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3106 int src_off = src->is_reg() ? |
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3107 fp_offset[src->value()] : reg2offset_in(src); |
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3108 |
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3109 // This is where the argument will eventually reside |
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3110 VMRegPair dst = out_regs[c_arg]; |
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3111 |
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3112 if (src->is_reg()) { |
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3113 if (sid == 1) { |
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3114 __ movq(c_rarg0, src->as_Register()); |
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3115 } else { |
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3116 __ movq(c_rarg0, utf8_addr); |
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3117 } |
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|
3118 } else { |
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3119 // arg is still in the original location |
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3120 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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3121 } |
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|
3122 Label done, convert; |
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|
3123 |
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3124 // see if the oop is NULL |
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3125 __ testq(c_rarg0, c_rarg0); |
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3126 __ jcc(Assembler::notEqual, convert); |
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3127 |
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3128 if (dst.first()->is_reg()) { |
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3129 // Save the ptr to utf string in the origina src loc or the tmp |
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3130 // dedicated to it |
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3131 __ movq(Address(rbp, src_off), c_rarg0); |
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|
3132 } else { |
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|
3133 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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|
3134 } |
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|
3135 __ jmp(done); |
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|
3136 |
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|
3137 __ bind(convert); |
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|
3138 |
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|
3139 __ lea(c_rarg1, utf8_addr); |
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3140 if (dst.first()->is_reg()) { |
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3141 __ movq(Address(rbp, src_off), c_rarg1); |
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|
3142 } else { |
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|
3143 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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|
3144 } |
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|
3145 // And do the conversion |
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|
3146 __ call(RuntimeAddress( |
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|
3147 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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|
3148 |
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|
3149 __ bind(done); |
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diff
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|
3150 } |
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|
3151 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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|
3152 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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|
3153 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
3154 } |
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113
diff
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|
3155 } |
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|
3156 // The get_utf call killed all the c_arg registers |
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|
3157 live[c_rarg0->as_VMReg()->value()] = false; |
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|
3158 live[c_rarg1->as_VMReg()->value()] = false; |
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|
3159 live[c_rarg2->as_VMReg()->value()] = false; |
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|
3160 live[c_rarg3->as_VMReg()->value()] = false; |
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|
3161 live[c_rarg4->as_VMReg()->value()] = false; |
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|
3162 live[c_rarg5->as_VMReg()->value()] = false; |
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|
3163 |
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|
3164 live[c_farg0->as_VMReg()->value()] = false; |
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|
3165 live[c_farg1->as_VMReg()->value()] = false; |
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|
3166 live[c_farg2->as_VMReg()->value()] = false; |
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|
3167 live[c_farg3->as_VMReg()->value()] = false; |
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|
3168 live[c_farg4->as_VMReg()->value()] = false; |
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|
3169 live[c_farg5->as_VMReg()->value()] = false; |
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3170 live[c_farg6->as_VMReg()->value()] = false; |
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|
3171 live[c_farg7->as_VMReg()->value()] = false; |
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|
3172 } |
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|
3173 |
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|
3174 // Now we can finally move the register args to their desired locations |
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|
3175 |
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|
3176 rax_is_zero = false; |
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|
3177 |
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|
3178 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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|
3179 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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|
3180 |
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|
3181 VMRegPair src = in_regs[j_arg]; |
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3182 VMRegPair dst = out_regs[c_arg]; |
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|
3183 |
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|
3184 // Only need to look for args destined for the interger registers (since we |
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|
3185 // convert float/double args to look like int/long outbound) |
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3186 if (dst.first()->is_reg()) { |
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3187 Register r = dst.first()->as_Register(); |
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|
3188 |
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|
3189 // Check if the java arg is unsupported and thereofre useless |
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3190 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3191 (in_sig_bt[j_arg] == T_OBJECT && |
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3192 out_sig_bt[c_arg] != T_INT && |
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3193 out_sig_bt[c_arg] != T_ADDRESS && |
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3194 out_sig_bt[c_arg] != T_LONG); |
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|
3195 |
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|
3196 |
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|
3197 // If we're going to kill an existing arg save it first |
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3198 if (live[dst.first()->value()]) { |
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3199 // you can't kill yourself |
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3200 if (src.first() != dst.first()) { |
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3201 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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3202 } |
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3203 } |
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3204 if (src.first()->is_reg()) { |
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3205 if (live[src.first()->value()] ) { |
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3206 if (in_sig_bt[j_arg] == T_FLOAT) { |
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3207 __ movdl(r, src.first()->as_XMMRegister()); |
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3208 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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3209 __ movdq(r, src.first()->as_XMMRegister()); |
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3210 } else if (r != src.first()->as_Register()) { |
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3211 if (!useless) { |
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3212 __ movq(r, src.first()->as_Register()); |
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3213 } |
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3214 } |
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3215 } else { |
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3216 // If the arg is an oop type we don't support don't bother to store |
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3217 // it |
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3218 if (!useless) { |
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3219 if (in_sig_bt[j_arg] == T_DOUBLE || |
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3220 in_sig_bt[j_arg] == T_LONG || |
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3221 in_sig_bt[j_arg] == T_OBJECT ) { |
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3222 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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3223 } else { |
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3224 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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3225 } |
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3226 } |
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3227 } |
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3228 live[src.first()->value()] = false; |
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3229 } else if (!useless) { |
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3230 // full sized move even for int should be ok |
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3231 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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3232 } |
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3233 |
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3234 // At this point r has the original java arg in the final location |
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3235 // (assuming it wasn't useless). If the java arg was an oop |
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3236 // we have a bit more to do |
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3237 |
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3238 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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3239 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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3240 // need to unbox a one-word value |
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3241 Label skip; |
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3242 __ testq(r, r); |
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3243 __ jcc(Assembler::equal, skip); |
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3244 BasicType bt = out_sig_bt[c_arg]; |
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3245 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
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3246 Address src1(r, box_offset); |
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3247 if ( bt == T_LONG ) { |
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3248 __ movq(r, src1); |
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3249 } else { |
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3250 __ movl(r, src1); |
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3251 } |
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3252 __ bind(skip); |
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3253 |
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3254 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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3255 // Convert the arg to NULL |
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3256 __ xorq(r, r); |
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3257 } |
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3258 } |
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3259 |
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3260 // dst can longer be holding an input value |
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3261 live[dst.first()->value()] = false; |
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3262 } |
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3263 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3264 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3265 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3266 } |
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3267 } |
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3268 |
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3269 |
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3270 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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3271 // patch in the trap |
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3272 int patch_offset = ((intptr_t)__ pc()) - start; |
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3273 |
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3274 __ nop(); |
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3275 |
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3276 |
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3277 // Return |
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3278 |
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3279 __ leave(); |
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3280 __ ret(0); |
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3281 |
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3282 __ flush(); |
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3283 |
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3284 nmethod *nm = nmethod::new_dtrace_nmethod( |
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3285 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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3286 stack_slots / VMRegImpl::slots_per_word); |
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3287 return nm; |
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3288 |
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3289 } |
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3290 |
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3291 #endif // HAVE_DTRACE_H |
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3292 |
0 | 3293 // this function returns the adjust size (in number of words) to a c2i adapter |
3294 // activation for use during deoptimization | |
3295 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 3296 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 3297 } |
3298 | |
3299 | |
3300 uint SharedRuntime::out_preserve_stack_slots() { | |
3301 return 0; | |
3302 } | |
3303 | |
3304 | |
3305 //------------------------------generate_deopt_blob---------------------------- | |
3306 void SharedRuntime::generate_deopt_blob() { | |
3307 // Allocate space for the code | |
3308 ResourceMark rm; | |
3309 // Setup code generation tools | |
3310 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
3311 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3312 int frame_size_in_words; | |
3313 OopMap* map = NULL; | |
3314 OopMapSet *oop_maps = new OopMapSet(); | |
3315 | |
3316 // ------------- | |
3317 // This code enters when returning to a de-optimized nmethod. A return | |
3318 // address has been pushed on the the stack, and return values are in | |
3319 // registers. | |
3320 // If we are doing a normal deopt then we were called from the patched | |
3321 // nmethod from the point we returned to the nmethod. So the return | |
3322 // address on the stack is wrong by NativeCall::instruction_size | |
3323 // We will adjust the value so it looks like we have the original return | |
3324 // address on the stack (like when we eagerly deoptimized). | |
3325 // In the case of an exception pending when deoptimizing, we enter | |
3326 // with a return address on the stack that points after the call we patched | |
3327 // into the exception handler. We have the following register state from, | |
3328 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
3329 // rax: exception oop | |
3330 // rbx: exception handler | |
3331 // rdx: throwing pc | |
3332 // So in this case we simply jam rdx into the useless return address and | |
3333 // the stack looks just like we want. | |
3334 // | |
3335 // At this point we need to de-opt. We save the argument return | |
3336 // registers. We call the first C routine, fetch_unroll_info(). This | |
3337 // routine captures the return values and returns a structure which | |
3338 // describes the current frame size and the sizes of all replacement frames. | |
3339 // The current frame is compiled code and may contain many inlined | |
3340 // functions, each with their own JVM state. We pop the current frame, then | |
3341 // push all the new frames. Then we call the C routine unpack_frames() to | |
3342 // populate these frames. Finally unpack_frames() returns us the new target | |
3343 // address. Notice that callee-save registers are BLOWN here; they have | |
3344 // already been captured in the vframeArray at the time the return PC was | |
3345 // patched. | |
3346 address start = __ pc(); | |
3347 Label cont; | |
3348 | |
3349 // Prolog for non exception case! | |
3350 | |
3351 // Save everything in sight. | |
3352 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3353 | |
3354 // Normal deoptimization. Save exec mode for unpack_frames. | |
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3355 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 3356 __ jmp(cont); |
304 | 3357 |
3358 int reexecute_offset = __ pc() - start; | |
3359 | |
3360 // Reexecute case | |
3361 // return address is the pc describes what bci to do re-execute at | |
3362 | |
3363 // No need to update map as each call to save_live_registers will produce identical oopmap | |
3364 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3365 | |
3366 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
3367 __ jmp(cont); | |
3368 | |
0 | 3369 int exception_offset = __ pc() - start; |
3370 | |
3371 // Prolog for exception case | |
3372 | |
304 | 3373 // all registers are dead at this entry point, except for rax, and |
3374 // rdx which contain the exception oop and exception pc | |
3375 // respectively. Set them in TLS and fall thru to the | |
3376 // unpack_with_exception_in_tls entry point. | |
3377 | |
3378 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
3379 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
3380 | |
3381 int exception_in_tls_offset = __ pc() - start; | |
3382 | |
3383 // new implementation because exception oop is now passed in JavaThread | |
3384 | |
3385 // Prolog for exception case | |
3386 // All registers must be preserved because they might be used by LinearScan | |
3387 // Exceptiop oop and throwing PC are passed in JavaThread | |
3388 // tos: stack at point of call to method that threw the exception (i.e. only | |
3389 // args are on the stack, no return address) | |
3390 | |
3391 // make room on stack for the return address | |
3392 // It will be patched later with the throwing pc. The correct value is not | |
3393 // available now because loading it from memory would destroy registers. | |
3394 __ push(0); | |
0 | 3395 |
3396 // Save everything in sight. | |
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3397 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
0 | 3398 |
304 | 3399 // Now it is safe to overwrite any register |
3400 | |
0 | 3401 // Deopt during an exception. Save exec mode for unpack_frames. |
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3402 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 3403 |
304 | 3404 // load throwing pc from JavaThread and patch it as the return address |
3405 // of the current frame. Then clear the field in JavaThread | |
3406 | |
3407 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3408 __ movptr(Address(rbp, wordSize), rdx); | |
3409 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3410 | |
3411 #ifdef ASSERT | |
3412 // verify that there is really an exception oop in JavaThread | |
3413 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3414 __ verify_oop(rax); | |
3415 | |
3416 // verify that there is no pending exception | |
3417 Label no_pending_exception; | |
3418 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
3419 __ testptr(rax, rax); | |
3420 __ jcc(Assembler::zero, no_pending_exception); | |
3421 __ stop("must not have pending exception here"); | |
3422 __ bind(no_pending_exception); | |
3423 #endif | |
3424 | |
4984
5c41e7002923
Added missing #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4979
diff
changeset
|
3425 #ifdef GRAAL |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3426 __ jmp(cont); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3427 |
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3428 int implicit_exception_uncommon_trap_offset = __ pc() - start; |
2605
98fa88528319
Deopt on implicit null pointer exception.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2491
diff
changeset
|
3429 __ pushptr(Address(r15_thread, in_bytes(JavaThread::ScratchA_offset()))); |
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3430 __ movptr(rscratch1, Address(r15_thread, in_bytes(JavaThread::ScratchB_offset()))); |
2605
98fa88528319
Deopt on implicit null pointer exception.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2491
diff
changeset
|
3431 |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3432 int uncommon_trap_offset = __ pc() - start; |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3433 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3434 // Save everything in sight. |
4675
c2384f5b2e6e
Small changes to the deopt stub.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4661
diff
changeset
|
3435 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3436 // fetch_unroll_info needs to call last_java_frame() |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3437 __ set_last_Java_frame(noreg, noreg, NULL); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3438 |
2935
9b8f30608e62
deoptimization action (invalidate, reprofile, ...)
Lukas Stadler <lukas.stadler@jku.at>
parents:
2928
diff
changeset
|
3439 assert(r10 == rscratch1, "scratch register should be r10"); |
4675
c2384f5b2e6e
Small changes to the deopt stub.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4661
diff
changeset
|
3440 __ movl(c_rarg1, Address(rsp, RegisterSaver::r10_offset_in_bytes())); |
5109
6766253384bf
more preparations for disabling runtime feedback selectively based on deoptimization history
Christian Haeubl <christian.haeubl@oracle.com>
parents:
4993
diff
changeset
|
3441 |
2928
1e13559b112d
small fix in deopt stub, more branch prediction code
Lukas Stadler <lukas.stadler@jku.at>
parents:
2891
diff
changeset
|
3442 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3443 __ mov(c_rarg0, r15_thread); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3444 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3445 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3446 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3447 __ reset_last_Java_frame(false, false); |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3448 |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3449 Label after_fetch_unroll_info_call; |
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3450 __ jmp(after_fetch_unroll_info_call); |
5109
6766253384bf
more preparations for disabling runtime feedback selectively based on deoptimization history
Christian Haeubl <christian.haeubl@oracle.com>
parents:
4993
diff
changeset
|
3451 #endif // GRAAL |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3452 |
0 | 3453 __ bind(cont); |
3454 | |
3455 // Call C code. Need thread and this frame, but NOT official VM entry | |
3456 // crud. We cannot block on this call, no GC can happen. | |
3457 // | |
3458 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
3459 | |
3460 // fetch_unroll_info needs to call last_java_frame(). | |
3461 | |
3462 __ set_last_Java_frame(noreg, noreg, NULL); | |
3463 #ifdef ASSERT | |
3464 { Label L; | |
304 | 3465 __ cmpptr(Address(r15_thread, |
0 | 3466 JavaThread::last_Java_fp_offset()), |
304 | 3467 (int32_t)0); |
0 | 3468 __ jcc(Assembler::equal, L); |
3469 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
3470 __ bind(L); | |
3471 } | |
3472 #endif // ASSERT | |
304 | 3473 __ mov(c_rarg0, r15_thread); |
0 | 3474 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
3475 | |
3476 // Need to have an oopmap that tells fetch_unroll_info where to | |
3477 // find any register it might need. | |
3478 oop_maps->add_gc_map(__ pc() - start, map); | |
3479 | |
3480 __ reset_last_Java_frame(false, false); | |
3481 | |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3482 #ifdef GRAAL |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3483 __ bind(after_fetch_unroll_info_call); |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3484 #endif |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3485 |
0 | 3486 // Load UnrollBlock* into rdi |
304 | 3487 __ mov(rdi, rax); |
3488 | |
3489 Label noException; | |
682
69aefafe69c1
6824463: deopt blob is testing wrong register on 64-bit x86
never
parents:
628
diff
changeset
|
3490 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 3491 __ jcc(Assembler::notEqual, noException); |
3492 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3493 // QQQ this is useless it was NULL above | |
3494 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3495 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
3496 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3497 | |
3498 __ verify_oop(rax); | |
3499 | |
3500 // Overwrite the result registers with the exception results. | |
3501 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
3502 // I think this is useless | |
3503 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
3504 | |
3505 __ bind(noException); | |
0 | 3506 |
3507 // Only register save data is on the stack. | |
3508 // Now restore the result registers. Everything else is either dead | |
3509 // or captured in the vframeArray. | |
3510 RegisterSaver::restore_result_registers(masm); | |
3511 | |
3512 // All of the register save area has been popped of the stack. Only the | |
3513 // return address remains. | |
3514 | |
3515 // Pop all the frames we must move/replace. | |
3516 // | |
3517 // Frame picture (youngest to oldest) | |
3518 // 1: self-frame (no frame link) | |
3519 // 2: deopting frame (no frame link) | |
3520 // 3: caller of deopting frame (could be compiled/interpreted). | |
3521 // | |
3522 // Note: by leaving the return address of self-frame on the stack | |
3523 // and using the size of frame 2 to adjust the stack | |
3524 // when we are done the return to frame 3 will still be on the stack. | |
3525 | |
3526 // Pop deoptimized frame | |
3527 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3528 __ addptr(rsp, rcx); |
0 | 3529 |
3530 // rsp should be pointing at the return address to the caller (3) | |
3531 | |
3532 // Stack bang to make sure there's enough room for these interpreter frames. | |
3533 if (UseStackBanging) { | |
3534 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3535 __ bang_stack_size(rbx, rcx); | |
3536 } | |
3537 | |
3538 // Load address of array of frame pcs into rcx | |
304 | 3539 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3540 |
3541 // Trash the old pc | |
304 | 3542 __ addptr(rsp, wordSize); |
0 | 3543 |
3544 // Load address of array of frame sizes into rsi | |
304 | 3545 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3546 |
3547 // Load counter into rdx | |
3548 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3549 | |
3550 // Pick up the initial fp we should save | |
3931
5432047c7db7
7087445: Improve platform independence of JSR292 shared code
bdelsart
parents:
3442
diff
changeset
|
3551 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3552 |
3553 // Now adjust the caller's stack to make up for the extra locals | |
3554 // but record the original sp so that we can save it in the skeletal interpreter | |
3555 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3556 // value and not the "real" sp value. | |
3557 | |
3558 const Register sender_sp = r8; | |
3559 | |
304 | 3560 __ mov(sender_sp, rsp); |
0 | 3561 __ movl(rbx, Address(rdi, |
3562 Deoptimization::UnrollBlock:: | |
3563 caller_adjustment_offset_in_bytes())); | |
304 | 3564 __ subptr(rsp, rbx); |
0 | 3565 |
3566 // Push interpreter frames in a loop | |
3567 Label loop; | |
3568 __ bind(loop); | |
304 | 3569 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3570 #ifdef CC_INTERP | |
3571 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
3572 #ifdef ASSERT | |
3573 __ push(0xDEADDEAD); // Make a recognizable pattern | |
3574 __ push(0xDEADDEAD); | |
3575 #else /* ASSERT */ | |
3576 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
3577 #endif /* ASSERT */ | |
3578 #else | |
3579 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
3580 #endif // CC_INTERP | |
3581 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 3582 __ enter(); // Save old & set new ebp |
304 | 3583 __ subptr(rsp, rbx); // Prolog |
3584 #ifdef CC_INTERP | |
3585 __ movptr(Address(rbp, | |
3586 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
3587 sender_sp); // Make it walkable | |
3588 #else /* CC_INTERP */ | |
0 | 3589 // This value is corrected by layout_activation_impl |
304 | 3590 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
3591 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
3592 #endif /* CC_INTERP */ | |
3593 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
3594 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3595 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 3596 __ decrementl(rdx); // Decrement counter |
3597 __ jcc(Assembler::notZero, loop); | |
304 | 3598 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3599 |
3600 // Re-push self-frame | |
3601 __ enter(); // Save old & set new ebp | |
3602 | |
3603 // Allocate a full sized register save area. | |
3604 // Return address and rbp are in place, so we allocate two less words. | |
304 | 3605 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 3606 |
3607 // Restore frame locals after moving the frame | |
3608 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 3609 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 3610 |
3611 // Call C code. Need thread but NOT official VM entry | |
3612 // crud. We cannot block on this call, no GC can happen. Call should | |
3613 // restore return values to their stack-slots with the new SP. | |
3614 // | |
3615 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
3616 | |
3617 // Use rbp because the frames look interpreted now | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3618 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3619 // Don't need the precise return PC here, just precise enough to point into this code blob. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3620 address the_pc = __ pc(); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3621 __ set_last_Java_frame(noreg, rbp, the_pc); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3622 |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3623 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 3624 __ mov(c_rarg0, r15_thread); |
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3625 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 3626 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3627 // Revert SP alignment after call since we're going to do some SP relative addressing below |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3628 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 3629 |
3630 // Set an oopmap for the call site | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3631 // Use the same PC we used for the last java frame |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3632 oop_maps->add_gc_map(the_pc - start, |
0 | 3633 new OopMap( frame_size_in_words, 0 )); |
3634 | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3635 // Clear fp AND pc |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3636 __ reset_last_Java_frame(true, true); |
0 | 3637 |
3638 // Collect return values | |
3639 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 3640 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
3641 // I think this is useless (throwing pc?) | |
3642 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 3643 |
3644 // Pop self-frame. | |
3645 __ leave(); // Epilog | |
3646 | |
3647 // Jump to interpreter | |
3648 __ ret(0); | |
3649 | |
3650 // Make sure all code is generated | |
3651 masm->flush(); | |
3652 | |
304 | 3653 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
3654 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3655 #ifdef GRAAL |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3656 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); |
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3657 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3658 #endif |
0 | 3659 } |
3660 | |
3661 #ifdef COMPILER2 | |
3662 //------------------------------generate_uncommon_trap_blob-------------------- | |
3663 void SharedRuntime::generate_uncommon_trap_blob() { | |
3664 // Allocate space for the code | |
3665 ResourceMark rm; | |
3666 // Setup code generation tools | |
3667 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
3668 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3669 | |
3670 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3671 | |
3672 address start = __ pc(); | |
3673 | |
3674 // Push self-frame. We get here with a return address on the | |
3675 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 3676 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 3677 |
3678 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 3679 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3680 |
3681 // compiler left unloaded_class_index in j_rarg0 move to where the | |
3682 // runtime expects it. | |
3683 __ movl(c_rarg1, j_rarg0); | |
3684 | |
3685 __ set_last_Java_frame(noreg, noreg, NULL); | |
3686 | |
3687 // Call C code. Need thread but NOT official VM entry | |
3688 // crud. We cannot block on this call, no GC can happen. Call should | |
3689 // capture callee-saved registers as well as return values. | |
3690 // Thread is in rdi already. | |
3691 // | |
3692 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
3693 | |
304 | 3694 __ mov(c_rarg0, r15_thread); |
0 | 3695 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
3696 | |
3697 // Set an oopmap for the call site | |
3698 OopMapSet* oop_maps = new OopMapSet(); | |
3699 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
3700 | |
3701 // location of rbp is known implicitly by the frame sender code | |
3702 | |
3703 oop_maps->add_gc_map(__ pc() - start, map); | |
3704 | |
3705 __ reset_last_Java_frame(false, false); | |
3706 | |
3707 // Load UnrollBlock* into rdi | |
304 | 3708 __ mov(rdi, rax); |
0 | 3709 |
3710 // Pop all the frames we must move/replace. | |
3711 // | |
3712 // Frame picture (youngest to oldest) | |
3713 // 1: self-frame (no frame link) | |
3714 // 2: deopting frame (no frame link) | |
3715 // 3: caller of deopting frame (could be compiled/interpreted). | |
3716 | |
3717 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 3718 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 3719 |
3720 // Pop deoptimized frame (int) | |
3721 __ movl(rcx, Address(rdi, | |
3722 Deoptimization::UnrollBlock:: | |
3723 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3724 __ addptr(rsp, rcx); |
0 | 3725 |
3726 // rsp should be pointing at the return address to the caller (3) | |
3727 | |
3728 // Stack bang to make sure there's enough room for these interpreter frames. | |
3729 if (UseStackBanging) { | |
3730 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3731 __ bang_stack_size(rbx, rcx); | |
3732 } | |
3733 | |
3734 // Load address of array of frame pcs into rcx (address*) | |
304 | 3735 __ movptr(rcx, |
3736 Address(rdi, | |
3737 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
0 | 3738 |
3739 // Trash the return pc | |
304 | 3740 __ addptr(rsp, wordSize); |
0 | 3741 |
3742 // Load address of array of frame sizes into rsi (intptr_t*) | |
304 | 3743 __ movptr(rsi, Address(rdi, |
3744 Deoptimization::UnrollBlock:: | |
3745 frame_sizes_offset_in_bytes())); | |
0 | 3746 |
3747 // Counter | |
3748 __ movl(rdx, Address(rdi, | |
3749 Deoptimization::UnrollBlock:: | |
3750 number_of_frames_offset_in_bytes())); // (int) | |
3751 | |
3752 // Pick up the initial fp we should save | |
304 | 3753 __ movptr(rbp, |
3754 Address(rdi, | |
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3755 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3756 |
3757 // Now adjust the caller's stack to make up for the extra locals but | |
3758 // record the original sp so that we can save it in the skeletal | |
3759 // interpreter frame and the stack walking of interpreter_sender | |
3760 // will get the unextended sp value and not the "real" sp value. | |
3761 | |
3762 const Register sender_sp = r8; | |
3763 | |
304 | 3764 __ mov(sender_sp, rsp); |
0 | 3765 __ movl(rbx, Address(rdi, |
3766 Deoptimization::UnrollBlock:: | |
3767 caller_adjustment_offset_in_bytes())); // (int) | |
304 | 3768 __ subptr(rsp, rbx); |
0 | 3769 |
3770 // Push interpreter frames in a loop | |
3771 Label loop; | |
3772 __ bind(loop); | |
304 | 3773 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3774 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3775 __ pushptr(Address(rcx, 0)); // Save return address | |
3776 __ enter(); // Save old & set new rbp | |
3777 __ subptr(rsp, rbx); // Prolog | |
520
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3778 #ifdef CC_INTERP |
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3779 __ movptr(Address(rbp, |
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3780 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
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3781 sender_sp); // Make it walkable |
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3782 #else // CC_INTERP |
304 | 3783 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3784 sender_sp); // Make it walkable | |
0 | 3785 // This value is corrected by layout_activation_impl |
304 | 3786 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
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3787 #endif // CC_INTERP |
304 | 3788 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3789 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3790 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3791 __ decrementl(rdx); // Decrement counter | |
0 | 3792 __ jcc(Assembler::notZero, loop); |
304 | 3793 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3794 |
3795 // Re-push self-frame | |
3796 __ enter(); // Save old & set new rbp | |
304 | 3797 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3798 // Prolog |
3799 | |
3800 // Use rbp because the frames look interpreted now | |
4057
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3801 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3802 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3803 address the_pc = __ pc(); |
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3804 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3805 |
3806 // Call C code. Need thread but NOT official VM entry | |
3807 // crud. We cannot block on this call, no GC can happen. Call should | |
3808 // restore return values to their stack-slots with the new SP. | |
3809 // Thread is in rdi already. | |
3810 // | |
3811 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3812 | |
4057
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3813 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3814 __ mov(c_rarg0, r15_thread); |
0 | 3815 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3816 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3817 | |
3818 // Set an oopmap for the call site | |
4057
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3819 // Use the same PC we used for the last java frame |
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3820 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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3821 |
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3822 // Clear fp AND pc |
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3823 __ reset_last_Java_frame(true, true); |
0 | 3824 |
3825 // Pop self-frame. | |
3826 __ leave(); // Epilog | |
3827 | |
3828 // Jump to interpreter | |
3829 __ ret(0); | |
3830 | |
3831 // Make sure all code is generated | |
3832 masm->flush(); | |
3833 | |
3834 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3835 SimpleRuntimeFrame::framesize >> 1); | |
3836 } | |
3837 #endif // COMPILER2 | |
3838 | |
3839 | |
3840 //------------------------------generate_handler_blob------ | |
3841 // | |
3842 // Generate a special Compile2Runtime blob that saves all registers, | |
3843 // and setup oopmap. | |
3844 // | |
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3845 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
0 | 3846 assert(StubRoutines::forward_exception_entry() != NULL, |
3847 "must be generated before"); | |
3848 | |
3849 ResourceMark rm; | |
3850 OopMapSet *oop_maps = new OopMapSet(); | |
3851 OopMap* map; | |
3852 | |
3853 // Allocate space for the code. Setup code generation tools. | |
3854 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3855 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3856 | |
3857 address start = __ pc(); | |
3858 address call_pc = NULL; | |
3859 int frame_size_in_words; | |
3860 | |
3861 // Make room for return address (or push it again) | |
3862 if (!cause_return) { | |
304 | 3863 __ push(rbx); |
0 | 3864 } |
3865 | |
3866 // Save registers, fpu state, and flags | |
3867 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3868 | |
3869 // The following is basically a call_VM. However, we need the precise | |
3870 // address of the call in order to generate an oopmap. Hence, we do all the | |
3871 // work outselves. | |
3872 | |
3873 __ set_last_Java_frame(noreg, noreg, NULL); | |
3874 | |
3875 // The return address must always be correct so that frame constructor never | |
3876 // sees an invalid pc. | |
3877 | |
3878 if (!cause_return) { | |
3879 // overwrite the dummy value we pushed on entry | |
304 | 3880 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3881 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3882 } |
3883 | |
3884 // Do the call | |
304 | 3885 __ mov(c_rarg0, r15_thread); |
0 | 3886 __ call(RuntimeAddress(call_ptr)); |
3887 | |
3888 // Set an oopmap for the call site. This oopmap will map all | |
3889 // oop-registers and debug-info registers as callee-saved. This | |
3890 // will allow deoptimization at this safepoint to find all possible | |
3891 // debug-info recordings, as well as let GC find all oops. | |
3892 | |
3893 oop_maps->add_gc_map( __ pc() - start, map); | |
3894 | |
3895 Label noException; | |
3896 | |
3897 __ reset_last_Java_frame(false, false); | |
3898 | |
304 | 3899 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3900 __ jcc(Assembler::equal, noException); |
3901 | |
3902 // Exception pending | |
3903 | |
3904 RegisterSaver::restore_live_registers(masm); | |
3905 | |
3906 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3907 | |
3908 // No exception case | |
3909 __ bind(noException); | |
3910 | |
3911 // Normal exit, restore registers and exit. | |
3912 RegisterSaver::restore_live_registers(masm); | |
3913 | |
3914 __ ret(0); | |
3915 | |
3916 // Make sure all code is generated | |
3917 masm->flush(); | |
3918 | |
3919 // Fill-out other meta info | |
3920 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3921 } | |
3922 | |
3923 // | |
3924 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3925 // | |
3926 // Generate a stub that calls into vm to find out the proper destination | |
3927 // of a java call. All the argument registers are live at this point | |
3928 // but since this is generic code we don't know what they are and the caller | |
3929 // must do any gc of the args. | |
3930 // | |
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3931 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3932 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3933 | |
3934 // allocate space for the code | |
3935 ResourceMark rm; | |
3936 | |
3937 CodeBuffer buffer(name, 1000, 512); | |
3938 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3939 | |
3940 int frame_size_in_words; | |
3941 | |
3942 OopMapSet *oop_maps = new OopMapSet(); | |
3943 OopMap* map = NULL; | |
3944 | |
3945 int start = __ offset(); | |
3946 | |
3947 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3948 | |
3949 int frame_complete = __ offset(); | |
3950 | |
3951 __ set_last_Java_frame(noreg, noreg, NULL); | |
3952 | |
304 | 3953 __ mov(c_rarg0, r15_thread); |
0 | 3954 |
3955 __ call(RuntimeAddress(destination)); | |
3956 | |
3957 | |
3958 // Set an oopmap for the call site. | |
3959 // We need this not only for callee-saved registers, but also for volatile | |
3960 // registers that the compiler might be keeping live across a safepoint. | |
3961 | |
3962 oop_maps->add_gc_map( __ offset() - start, map); | |
3963 | |
3964 // rax contains the address we are going to jump to assuming no exception got installed | |
3965 | |
3966 // clear last_Java_sp | |
3967 __ reset_last_Java_frame(false, false); | |
3968 // check for pending exceptions | |
3969 Label pending; | |
304 | 3970 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3971 __ jcc(Assembler::notEqual, pending); |
3972 | |
3973 // get the returned methodOop | |
304 | 3974 __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset())); |
3975 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); | |
3976 | |
3977 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 3978 |
3979 RegisterSaver::restore_live_registers(masm); | |
3980 | |
3981 // We are back the the original state on entry and ready to go. | |
3982 | |
3983 __ jmp(rax); | |
3984 | |
3985 // Pending exception after the safepoint | |
3986 | |
3987 __ bind(pending); | |
3988 | |
3989 RegisterSaver::restore_live_registers(masm); | |
3990 | |
3991 // exception pending => remove activation and forward to exception handler | |
3992 | |
3993 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
3994 | |
304 | 3995 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 3996 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3997 | |
3998 // ------------- | |
3999 // make sure all code is generated | |
4000 masm->flush(); | |
4001 | |
4002 // return the blob | |
4003 // frame_size_words or bytes?? | |
4004 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
4005 } | |
4006 | |
4007 | |
4008 #ifdef COMPILER2 | |
4009 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
4010 // | |
4011 //------------------------------generate_exception_blob--------------------------- | |
4012 // creates exception blob at the end | |
4013 // Using exception blob, this code is jumped from a compiled method. | |
4014 // (see emit_exception_handler in x86_64.ad file) | |
4015 // | |
4016 // Given an exception pc at a call we call into the runtime for the | |
4017 // handler in this method. This handler might merely restore state | |
4018 // (i.e. callee save registers) unwind the frame and jump to the | |
4019 // exception handler for the nmethod if there is no Java level handler | |
4020 // for the nmethod. | |
4021 // | |
4022 // This code is entered with a jmp. | |
4023 // | |
4024 // Arguments: | |
4025 // rax: exception oop | |
4026 // rdx: exception pc | |
4027 // | |
4028 // Results: | |
4029 // rax: exception oop | |
4030 // rdx: exception pc in caller or ??? | |
4031 // destination: exception handler of caller | |
4032 // | |
4033 // Note: the exception pc MUST be at a call (precise debug information) | |
4034 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
4035 // | |
4036 | |
4037 void OptoRuntime::generate_exception_blob() { | |
4038 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
4039 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
4040 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
4041 | |
4042 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
4043 | |
4044 // Allocate space for the code | |
4045 ResourceMark rm; | |
4046 // Setup code generation tools | |
4047 CodeBuffer buffer("exception_blob", 2048, 1024); | |
4048 MacroAssembler* masm = new MacroAssembler(&buffer); | |
4049 | |
4050 | |
4051 address start = __ pc(); | |
4052 | |
4053 // Exception pc is 'return address' for stack walker | |
304 | 4054 __ push(rdx); |
4055 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 4056 |
4057 // Save callee-saved registers. See x86_64.ad. | |
4058 | |
4059 // rbp is an implicitly saved callee saved register (i.e. the calling | |
4060 // convention will save restore it in prolog/epilog) Other than that | |
4061 // there are no callee save registers now that adapter frames are gone. | |
4062 | |
304 | 4063 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 4064 |
4065 // Store exception in Thread object. We cannot pass any arguments to the | |
4066 // handle_exception call, since we do not want to make any assumption | |
4067 // about the size of the frame where the exception happened in. | |
4068 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 4069 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
4070 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 4071 |
4072 // This call does all the hard work. It checks if an exception handler | |
4073 // exists in the method. | |
4074 // If so, it returns the handler address. | |
4075 // If not, it prepares for stack-unwinding, restoring the callee-save | |
4076 // registers of the frame being removed. | |
4077 // | |
4078 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
4079 | |
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4080 // At a method handle call, the stack may not be properly aligned |
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4081 // when returning with an exception. |
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4082 address the_pc = __ pc(); |
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4083 __ set_last_Java_frame(noreg, noreg, the_pc); |
304 | 4084 __ mov(c_rarg0, r15_thread); |
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4085 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
0 | 4086 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
4087 | |
4088 // Set an oopmap for the call site. This oopmap will only be used if we | |
4089 // are unwinding the stack. Hence, all locations will be dead. | |
4090 // Callee-saved registers will be the same as the frame above (i.e., | |
4091 // handle_exception_stub), since they were restored when we got the | |
4092 // exception. | |
4093 | |
4094 OopMapSet* oop_maps = new OopMapSet(); | |
4095 | |
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4096 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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4097 |
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4098 __ reset_last_Java_frame(false, true); |
0 | 4099 |
4100 // Restore callee-saved registers | |
4101 | |
4102 // rbp is an implicitly saved callee saved register (i.e. the calling | |
4103 // convention will save restore it in prolog/epilog) Other than that | |
4104 // there are no callee save registers no that adapter frames are gone. | |
4105 | |
304 | 4106 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
4107 | |
4108 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
4109 __ pop(rdx); // No need for exception pc anymore | |
0 | 4110 |
4111 // rax: exception handler | |
4112 | |
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4113 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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4114 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
1567 | 4115 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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4116 |
0 | 4117 // We have a handler in rax (could be deopt blob). |
304 | 4118 __ mov(r8, rax); |
0 | 4119 |
4120 // Get the exception oop | |
304 | 4121 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 4122 // Get the exception pc in case we are deoptimized |
304 | 4123 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 4124 #ifdef ASSERT |
4125 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
4126 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
4127 #endif | |
4128 // Clear the exception oop so GC no longer processes it as a root. | |
4129 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
4130 | |
4131 // rax: exception oop | |
4132 // r8: exception handler | |
4133 // rdx: exception pc | |
4134 // Jump to handler | |
4135 | |
4136 __ jmp(r8); | |
4137 | |
4138 // Make sure all code is generated | |
4139 masm->flush(); | |
4140 | |
4141 // Set exception blob | |
4142 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
4143 } | |
4144 #endif // COMPILER2 |