Mercurial > hg > graal-compiler
annotate src/share/vm/opto/chaitin.hpp @ 1412:9195b99c841b
Added first VM entry method.
TODO: Check why initialization method of compiler is not called. Register native methods only once.
author | Thomas Wuerthinger <thomas.wuerthinger@gmail.com> |
---|---|
date | Mon, 17 May 2010 16:37:23 +0200 |
parents | a70508bb21c3 |
children | c18cbe5936b8 |
rev | line source |
---|---|
0 | 1 /* |
579 | 2 * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
21 * have any questions. | |
22 * | |
23 */ | |
24 | |
25 class LoopTree; | |
26 class MachCallNode; | |
27 class MachSafePointNode; | |
28 class Matcher; | |
29 class PhaseCFG; | |
30 class PhaseLive; | |
31 class PhaseRegAlloc; | |
32 class PhaseChaitin; | |
33 | |
34 #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001) | |
35 #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25) | |
36 | |
37 //------------------------------LRG-------------------------------------------- | |
38 // Live-RanGe structure. | |
39 class LRG : public ResourceObj { | |
40 public: | |
41 enum { SPILL_REG=29999 }; // Register number of a spilled LRG | |
42 | |
43 double _cost; // 2 for loads/1 for stores times block freq | |
44 double _area; // Sum of all simultaneously live values | |
45 double score() const; // Compute score from cost and area | |
46 double _maxfreq; // Maximum frequency of any def or use | |
47 | |
48 Node *_def; // Check for multi-def live ranges | |
49 #ifndef PRODUCT | |
50 GrowableArray<Node*>* _defs; | |
51 #endif | |
52 | |
53 uint _risk_bias; // Index of LRG which we want to avoid color | |
54 uint _copy_bias; // Index of LRG which we want to share color | |
55 | |
56 uint _next; // Index of next LRG in linked list | |
57 uint _prev; // Index of prev LRG in linked list | |
58 private: | |
59 uint _reg; // Chosen register; undefined if mask is plural | |
60 public: | |
61 // Return chosen register for this LRG. Error if the LRG is not bound to | |
62 // a single register. | |
63 OptoReg::Name reg() const { return OptoReg::Name(_reg); } | |
64 void set_reg( OptoReg::Name r ) { _reg = r; } | |
65 | |
66 private: | |
67 uint _eff_degree; // Effective degree: Sum of neighbors _num_regs | |
68 public: | |
69 int degree() const { assert( _degree_valid, "" ); return _eff_degree; } | |
70 // Degree starts not valid and any change to the IFG neighbor | |
71 // set makes it not valid. | |
72 void set_degree( uint degree ) { _eff_degree = degree; debug_only(_degree_valid = 1;) } | |
73 // Made a change that hammered degree | |
74 void invalid_degree() { debug_only(_degree_valid=0;) } | |
75 // Incrementally modify degree. If it was correct, it should remain correct | |
76 void inc_degree( uint mod ) { _eff_degree += mod; } | |
77 // Compute the degree between 2 live ranges | |
78 int compute_degree( LRG &l ) const; | |
79 | |
80 private: | |
81 RegMask _mask; // Allowed registers for this LRG | |
82 uint _mask_size; // cache of _mask.Size(); | |
83 public: | |
84 int compute_mask_size() const { return _mask.is_AllStack() ? 65535 : _mask.Size(); } | |
85 void set_mask_size( int size ) { | |
86 assert((size == 65535) || (size == (int)_mask.Size()), ""); | |
87 _mask_size = size; | |
88 debug_only(_msize_valid=1;) | |
89 debug_only( if( _num_regs == 2 && !_fat_proj ) _mask.VerifyPairs(); ) | |
90 } | |
91 void compute_set_mask_size() { set_mask_size(compute_mask_size()); } | |
92 int mask_size() const { assert( _msize_valid, "mask size not valid" ); | |
93 return _mask_size; } | |
94 // Get the last mask size computed, even if it does not match the | |
95 // count of bits in the current mask. | |
96 int get_invalid_mask_size() const { return _mask_size; } | |
97 const RegMask &mask() const { return _mask; } | |
98 void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)} | |
99 void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)} | |
100 void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)} | |
101 void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; } | |
102 void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; } | |
103 void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) } | |
104 void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) } | |
105 void ClearToPairs() { _mask.ClearToPairs(); debug_only(_msize_valid=0;) } | |
106 | |
107 // Number of registers this live range uses when it colors | |
108 private: | |
109 uint8 _num_regs; // 2 for Longs and Doubles, 1 for all else | |
110 // except _num_regs is kill count for fat_proj | |
111 public: | |
112 int num_regs() const { return _num_regs; } | |
113 void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; } | |
114 | |
115 private: | |
116 // Number of physical registers this live range uses when it colors | |
117 // Architecture and register-set dependent | |
118 uint8 _reg_pressure; | |
119 public: | |
120 void set_reg_pressure(int i) { _reg_pressure = i; } | |
121 int reg_pressure() const { return _reg_pressure; } | |
122 | |
123 // How much 'wiggle room' does this live range have? | |
124 // How many color choices can it make (scaled by _num_regs)? | |
125 int degrees_of_freedom() const { return mask_size() - _num_regs; } | |
126 // Bound LRGs have ZERO degrees of freedom. We also count | |
127 // must_spill as bound. | |
128 bool is_bound () const { return _is_bound; } | |
129 // Negative degrees-of-freedom; even with no neighbors this | |
130 // live range must spill. | |
131 bool not_free() const { return degrees_of_freedom() < 0; } | |
132 // Is this live range of "low-degree"? Trivially colorable? | |
133 bool lo_degree () const { return degree() <= degrees_of_freedom(); } | |
134 // Is this live range just barely "low-degree"? Trivially colorable? | |
135 bool just_lo_degree () const { return degree() == degrees_of_freedom(); } | |
136 | |
137 uint _is_oop:1, // Live-range holds an oop | |
138 _is_float:1, // True if in float registers | |
139 _was_spilled1:1, // True if prior spilling on def | |
140 _was_spilled2:1, // True if twice prior spilling on def | |
141 _is_bound:1, // live range starts life with no | |
142 // degrees of freedom. | |
143 _direct_conflict:1, // True if def and use registers in conflict | |
144 _must_spill:1, // live range has lost all degrees of freedom | |
145 // If _fat_proj is set, live range does NOT require aligned, adjacent | |
146 // registers and has NO interferences. | |
147 // If _fat_proj is clear, live range requires num_regs() to be a power of | |
148 // 2, and it requires registers to form an aligned, adjacent set. | |
149 _fat_proj:1, // | |
150 _was_lo:1, // Was lo-degree prior to coalesce | |
151 _msize_valid:1, // _mask_size cache valid | |
152 _degree_valid:1, // _degree cache valid | |
153 _has_copy:1, // Adjacent to some copy instruction | |
154 _at_risk:1; // Simplify says this guy is at risk to spill | |
155 | |
156 | |
157 // Alive if non-zero, dead if zero | |
158 bool alive() const { return _def != NULL; } | |
295
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
196
diff
changeset
|
159 bool is_multidef() const { return _def == NodeSentinel; } |
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
196
diff
changeset
|
160 bool is_singledef() const { return _def != NodeSentinel; } |
0 | 161 |
162 #ifndef PRODUCT | |
163 void dump( ) const; | |
164 #endif | |
165 }; | |
166 | |
167 //------------------------------LRG_List--------------------------------------- | |
168 // Map Node indices to Live RanGe indices. | |
169 // Array lookup in the optimized case. | |
170 class LRG_List : public ResourceObj { | |
171 uint _cnt, _max; | |
172 uint* _lidxs; | |
173 ReallocMark _nesting; // assertion check for reallocations | |
174 public: | |
175 LRG_List( uint max ); | |
176 | |
177 uint lookup( uint nidx ) const { | |
178 return _lidxs[nidx]; | |
179 } | |
180 uint operator[] (uint nidx) const { return lookup(nidx); } | |
181 | |
182 void map( uint nidx, uint lidx ) { | |
183 assert( nidx < _cnt, "oob" ); | |
184 _lidxs[nidx] = lidx; | |
185 } | |
186 void extend( uint nidx, uint lidx ); | |
187 | |
188 uint Size() const { return _cnt; } | |
189 }; | |
190 | |
191 //------------------------------IFG-------------------------------------------- | |
192 // InterFerence Graph | |
193 // An undirected graph implementation. Created with a fixed number of | |
194 // vertices. Edges can be added & tested. Vertices can be removed, then | |
195 // added back later with all edges intact. Can add edges between one vertex | |
196 // and a list of other vertices. Can union vertices (and their edges) | |
197 // together. The IFG needs to be really really fast, and also fairly | |
198 // abstract! It needs abstraction so I can fiddle with the implementation to | |
199 // get even more speed. | |
200 class PhaseIFG : public Phase { | |
201 // Current implementation: a triangular adjacency list. | |
202 | |
203 // Array of adjacency-lists, indexed by live-range number | |
204 IndexSet *_adjs; | |
205 | |
206 // Assertion bit for proper use of Squaring | |
207 bool _is_square; | |
208 | |
209 // Live range structure goes here | |
210 LRG *_lrgs; // Array of LRG structures | |
211 | |
212 public: | |
213 // Largest live-range number | |
214 uint _maxlrg; | |
215 | |
216 Arena *_arena; | |
217 | |
218 // Keep track of inserted and deleted Nodes | |
219 VectorSet *_yanked; | |
220 | |
221 PhaseIFG( Arena *arena ); | |
222 void init( uint maxlrg ); | |
223 | |
224 // Add edge between a and b. Returns true if actually addded. | |
225 int add_edge( uint a, uint b ); | |
226 | |
227 // Add edge between a and everything in the vector | |
228 void add_vector( uint a, IndexSet *vec ); | |
229 | |
230 // Test for edge existance | |
231 int test_edge( uint a, uint b ) const; | |
232 | |
233 // Square-up matrix for faster Union | |
234 void SquareUp(); | |
235 | |
236 // Return number of LRG neighbors | |
237 uint neighbor_cnt( uint a ) const { return _adjs[a].count(); } | |
238 // Union edges of b into a on Squared-up matrix | |
239 void Union( uint a, uint b ); | |
240 // Test for edge in Squared-up matrix | |
241 int test_edge_sq( uint a, uint b ) const; | |
242 // Yank a Node and all connected edges from the IFG. Be prepared to | |
243 // re-insert the yanked Node in reverse order of yanking. Return a | |
244 // list of neighbors (edges) yanked. | |
245 IndexSet *remove_node( uint a ); | |
246 // Reinsert a yanked Node | |
247 void re_insert( uint a ); | |
248 // Return set of neighbors | |
249 IndexSet *neighbors( uint a ) const { return &_adjs[a]; } | |
250 | |
251 #ifndef PRODUCT | |
252 // Dump the IFG | |
253 void dump() const; | |
254 void stats() const; | |
255 void verify( const PhaseChaitin * ) const; | |
256 #endif | |
257 | |
258 //--------------- Live Range Accessors | |
259 LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; } | |
260 | |
261 // Compute and set effective degree. Might be folded into SquareUp(). | |
262 void Compute_Effective_Degree(); | |
263 | |
264 // Compute effective degree as the sum of neighbors' _sizes. | |
265 int effective_degree( uint lidx ) const; | |
266 }; | |
267 | |
268 // TEMPORARILY REPLACED WITH COMMAND LINE FLAG | |
269 | |
270 //// !!!!! Magic Constants need to move into ad file | |
271 #ifdef SPARC | |
272 //#define FLOAT_PRESSURE 30 /* SFLT_REG_mask.Size() - 1 */ | |
273 //#define INT_PRESSURE 23 /* NOTEMP_I_REG_mask.Size() - 1 */ | |
274 #define FLOAT_INCREMENT(regs) regs | |
275 #else | |
276 //#define FLOAT_PRESSURE 6 | |
277 //#define INT_PRESSURE 6 | |
278 #define FLOAT_INCREMENT(regs) 1 | |
279 #endif | |
280 | |
281 //------------------------------Chaitin---------------------------------------- | |
282 // Briggs-Chaitin style allocation, mostly. | |
283 class PhaseChaitin : public PhaseRegAlloc { | |
284 | |
285 int _trip_cnt; | |
286 int _alternate; | |
287 | |
288 uint _maxlrg; // Max live range number | |
289 LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); } | |
290 PhaseLive *_live; // Liveness, used in the interference graph | |
291 PhaseIFG *_ifg; // Interference graph (for original chunk) | |
292 Node_List **_lrg_nodes; // Array of node; lists for lrgs which spill | |
293 VectorSet _spilled_once; // Nodes that have been spilled | |
294 VectorSet _spilled_twice; // Nodes that have been spilled twice | |
295 | |
296 LRG_List _names; // Map from Nodes to Live RanGes | |
297 | |
298 // Union-find map. Declared as a short for speed. | |
299 // Indexed by live-range number, it returns the compacted live-range number | |
300 LRG_List _uf_map; | |
301 // Reset the Union-Find map to identity | |
302 void reset_uf_map( uint maxlrg ); | |
303 // Remove the need for the Union-Find mapping | |
304 void compress_uf_map_for_nodes( ); | |
305 | |
306 // Combine the Live Range Indices for these 2 Nodes into a single live | |
307 // range. Future requests for any Node in either live range will | |
308 // return the live range index for the combined live range. | |
309 void Union( const Node *src, const Node *dst ); | |
310 | |
311 void new_lrg( const Node *x, uint lrg ); | |
312 | |
313 // Compact live ranges, removing unused ones. Return new maxlrg. | |
314 void compact(); | |
315 | |
316 uint _lo_degree; // Head of lo-degree LRGs list | |
317 uint _lo_stk_degree; // Head of lo-stk-degree LRGs list | |
318 uint _hi_degree; // Head of hi-degree LRGs list | |
319 uint _simplified; // Linked list head of simplified LRGs | |
320 | |
321 // Helper functions for Split() | |
322 uint split_DEF( Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx ); | |
323 uint split_USE( Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx ); | |
324 int clone_projs( Block *b, uint idx, Node *con, Node *copy, uint &maxlrg ); | |
295
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
196
diff
changeset
|
325 Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits, |
ea18057223c4
6732194: Data corruption dependent on -server/-client/-Xbatch
never
parents:
196
diff
changeset
|
326 int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru); |
0 | 327 // True if lidx is used before any real register is def'd in the block |
328 bool prompt_use( Block *b, uint lidx ); | |
329 Node *get_spillcopy_wide( Node *def, Node *use, uint uidx ); | |
605 | 330 // Insert the spill at chosen location. Skip over any intervening Proj's or |
0 | 331 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block |
332 // instead. Update high-pressure indices. Create a new live range. | |
333 void insert_proj( Block *b, uint i, Node *spill, uint maxlrg ); | |
334 | |
335 bool is_high_pressure( Block *b, LRG *lrg, uint insidx ); | |
336 | |
337 uint _oldphi; // Node index which separates pre-allocation nodes | |
338 | |
339 Block **_blks; // Array of blocks sorted by frequency for coalescing | |
340 | |
673 | 341 float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info |
342 | |
0 | 343 #ifndef PRODUCT |
344 bool _trace_spilling; | |
345 #endif | |
346 | |
347 public: | |
348 PhaseChaitin( uint unique, PhaseCFG &cfg, Matcher &matcher ); | |
349 ~PhaseChaitin() {} | |
350 | |
351 // Convert a Node into a Live Range Index - a lidx | |
352 uint Find( const Node *n ) { | |
353 uint lidx = n2lidx(n); | |
354 uint uf_lidx = _uf_map[lidx]; | |
355 return (uf_lidx == lidx) ? uf_lidx : Find_compress(n); | |
356 } | |
357 uint Find_const( uint lrg ) const; | |
358 uint Find_const( const Node *n ) const; | |
359 | |
360 // Do all the real work of allocate | |
361 void Register_Allocate(); | |
362 | |
363 uint n2lidx( const Node *n ) const { return _names[n->_idx]; } | |
364 | |
673 | 365 float high_frequency_lrg() const { return _high_frequency_lrg; } |
366 | |
0 | 367 #ifndef PRODUCT |
368 bool trace_spilling() const { return _trace_spilling; } | |
369 #endif | |
370 | |
371 private: | |
372 // De-SSA the world. Assign registers to Nodes. Use the same register for | |
373 // all inputs to a PhiNode, effectively coalescing live ranges. Insert | |
374 // copies as needed. | |
375 void de_ssa(); | |
376 uint Find_compress( const Node *n ); | |
377 uint Find( uint lidx ) { | |
378 uint uf_lidx = _uf_map[lidx]; | |
379 return (uf_lidx == lidx) ? uf_lidx : Find_compress(lidx); | |
380 } | |
381 uint Find_compress( uint lidx ); | |
382 | |
383 uint Find_id( const Node *n ) { | |
384 uint retval = n2lidx(n); | |
385 assert(retval == Find(n),"Invalid node to lidx mapping"); | |
386 return retval; | |
387 } | |
388 | |
389 // Add edge between reg and everything in the vector. | |
390 // Same as _ifg->add_vector(reg,live) EXCEPT use the RegMask | |
391 // information to trim the set of interferences. Return the | |
392 // count of edges added. | |
393 void interfere_with_live( uint reg, IndexSet *live ); | |
394 // Count register pressure for asserts | |
395 uint count_int_pressure( IndexSet *liveout ); | |
396 uint count_float_pressure( IndexSet *liveout ); | |
397 | |
398 // Build the interference graph using virtual registers only. | |
399 // Used for aggressive coalescing. | |
400 void build_ifg_virtual( ); | |
401 | |
402 // Build the interference graph using physical registers when available. | |
403 // That is, if 2 live ranges are simultaneously alive but in their | |
404 // acceptable register sets do not overlap, then they do not interfere. | |
405 uint build_ifg_physical( ResourceArea *a ); | |
406 | |
407 // Gather LiveRanGe information, including register masks and base pointer/ | |
408 // derived pointer relationships. | |
409 void gather_lrg_masks( bool mod_cisc_masks ); | |
410 | |
411 // Force the bases of derived pointers to be alive at GC points. | |
412 bool stretch_base_pointer_live_ranges( ResourceArea *a ); | |
413 // Helper to stretch above; recursively discover the base Node for | |
414 // a given derived Node. Easy for AddP-related machine nodes, but | |
415 // needs to be recursive for derived Phis. | |
416 Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg ); | |
417 | |
418 // Set the was-lo-degree bit. Conservative coalescing should not change the | |
419 // colorability of the graph. If any live range was of low-degree before | |
420 // coalescing, it should Simplify. This call sets the was-lo-degree bit. | |
421 void set_was_low(); | |
422 | |
423 // Split live-ranges that must spill due to register conflicts (as opposed | |
424 // to capacity spills). Typically these are things def'd in a register | |
425 // and used on the stack or vice-versa. | |
426 void pre_spill(); | |
427 | |
428 // Init LRG caching of degree, numregs. Init lo_degree list. | |
429 void cache_lrg_info( ); | |
430 | |
431 // Simplify the IFG by removing LRGs of low degree with no copies | |
432 void Pre_Simplify(); | |
433 | |
434 // Simplify the IFG by removing LRGs of low degree | |
435 void Simplify(); | |
436 | |
437 // Select colors by re-inserting edges into the IFG. | |
605 | 438 // Return TRUE if any spills occurred. |
0 | 439 uint Select( ); |
440 // Helper function for select which allows biased coloring | |
441 OptoReg::Name choose_color( LRG &lrg, int chunk ); | |
442 // Helper function which implements biasing heuristic | |
443 OptoReg::Name bias_color( LRG &lrg, int chunk ); | |
444 | |
445 // Split uncolorable live ranges | |
446 // Return new number of live ranges | |
447 uint Split( uint maxlrg ); | |
448 | |
449 // Copy 'was_spilled'-edness from one Node to another. | |
450 void copy_was_spilled( Node *src, Node *dst ); | |
451 // Set the 'spilled_once' or 'spilled_twice' flag on a node. | |
452 void set_was_spilled( Node *n ); | |
453 | |
454 // Convert ideal spill-nodes into machine loads & stores | |
455 // Set C->failing when fixup spills could not complete, node limit exceeded. | |
456 void fixup_spills(); | |
457 | |
458 // Post-Allocation peephole copy removal | |
459 void post_allocate_copy_removal(); | |
460 Node *skip_copies( Node *c ); | |
923 | 461 // Replace the old node with the current live version of that value |
462 // and yank the old value if it's dead. | |
463 int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg, | |
464 Block *current_block, Node_List& value, Node_List& regnd ) { | |
465 Node* v = regnd[nreg]; | |
466 assert(v->outcnt() != 0, "no dead values"); | |
467 old->replace_by(v); | |
468 return yank_if_dead(old, current_block, &value, ®nd); | |
469 } | |
470 | |
0 | 471 int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ); |
472 int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ); | |
473 int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ); | |
474 bool may_be_copy_of_callee( Node *def ) const; | |
475 | |
476 // If nreg already contains the same constant as val then eliminate it | |
70
b683f557224b
6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
never
parents:
0
diff
changeset
|
477 bool eliminate_copy_of_constant(Node* val, Node* n, |
b683f557224b
6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
never
parents:
0
diff
changeset
|
478 Block *current_block, Node_List& value, Node_List ®nd, |
0 | 479 OptoReg::Name nreg, OptoReg::Name nreg2); |
480 // Extend the node to LRG mapping | |
481 void add_reference( const Node *node, const Node *old_node); | |
482 | |
483 private: | |
484 | |
485 static int _final_loads, _final_stores, _final_copies, _final_memoves; | |
486 static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost; | |
487 static int _conserv_coalesce, _conserv_coalesce_pair; | |
488 static int _conserv_coalesce_trie, _conserv_coalesce_quad; | |
489 static int _post_alloc; | |
490 static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce; | |
491 static int _used_cisc_instructions, _unused_cisc_instructions; | |
492 static int _allocator_attempts, _allocator_successes; | |
493 | |
494 #ifndef PRODUCT | |
495 static uint _high_pressure, _low_pressure; | |
496 | |
497 void dump() const; | |
498 void dump( const Node *n ) const; | |
499 void dump( const Block * b ) const; | |
500 void dump_degree_lists() const; | |
501 void dump_simplified() const; | |
502 void dump_lrg( uint lidx ) const; | |
503 void dump_bb( uint pre_order ) const; | |
504 | |
505 // Verify that base pointers and derived pointers are still sane | |
506 void verify_base_ptrs( ResourceArea *a ) const; | |
507 | |
566
91263420e1c6
6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
kvn
parents:
295
diff
changeset
|
508 void verify( ResourceArea *a, bool verify_ifg = false ) const; |
91263420e1c6
6791852: assert(b->_nodes[insidx] == n,"got insidx set incorrectly")
kvn
parents:
295
diff
changeset
|
509 |
0 | 510 void dump_for_spill_split_recycle() const; |
511 | |
512 public: | |
513 void dump_frame() const; | |
514 char *dump_register( const Node *n, char *buf ) const; | |
515 private: | |
516 static void print_chaitin_statistics(); | |
517 #endif | |
518 friend class PhaseCoalesce; | |
519 friend class PhaseAggressiveCoalesce; | |
520 friend class PhaseConservativeCoalesce; | |
521 }; |