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annotate graal/GraalCompiler/src/com/sun/c1x/package-info.java @ 2838:adc4b3ec0a8c

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Deleted LIR critical edge splitter and replaced with GraalIR edge splitter using Anchor nodes (=> simpler).
author Thomas Wuerthinger <thomas@wuerthinger.net>
date Tue, 31 May 2011 15:17:55 +0200
parents 16b9a8b5ad39
children
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2507
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1 /*
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2 * Copyright (c) 2010, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23
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24 /**
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25 * The top-level package in C1X containing options, metrics, timers and the main compiler class
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26 * {@link com.sun.c1x.C1XCompiler}.
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27 *
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28 * <H2>{@code C1XCompiler} Overview</H2>
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29 *
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30 * C1X is intended to be used with multiple JVM's so makes no use of or reference to classes for a specific JVM, for
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31 * example Maxine.
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32 *
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33 * The compiler is represented by the class {@code C1XCompiler}. {@code C1XCompiler} binds a specific target
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34 * architecture and JVM interface to produce a usable compiler object. There are
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35 * two variants of {@code compileMethod}, one of which is used when doing <i>on stack replacement</i> (OSR), discussed
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36 * later. The main variant takes {@link com.sun.cri.ri.RiMethod} and {@link com.sun.cri.xir.RiXirGenerator} arguments.
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37 * {@code RiMethod} is C1X's representation of a Java method and {@code RiXirGenerator} represents the interface through
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38 * which the compiler requests the XIR for a given bytecode from the runtime system.
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39 *
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40 * <H3>The C1X Compilation Process</H3>
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41 *
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42 * {@link com.sun.c1x.C1XCompiler#compileMethod} creates a {@link C1XCompilation} instance and then returns the result of calling its
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43 * {@link com.sun.c1x.C1XCompilation#compile} method. The {@code C1XCompilation} instance records whether {@code compileMethod} was invoked with
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44 * the OSR variant, which is used later in the IR generation.
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45 * <p>
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46 * While there is only one {@code C1XCompiler} instance, there may be several compilations proceeding concurrently, each of
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47 * which is represented by a unique {@code C1XCompilation} instance. The static method {@link com.sun.c1x.C1XCompilation#current}} returns the
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48 * {@code C1XCompilation} instance associated with the current thread, and is managed using a {@link java.lang.ThreadLocal} variable. It
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49 * is used when assigning the unique id that is used for tracing output to an HIR node. Each {@code C1XCompilation} instance
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50 * has an associated {@link com.sun.cri.ci.CiStatistics} object that accumulates information about the compilation process, but is also
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51 * used as a generator of, for example, basic block identifiers.
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52 * <p>
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53 * The compilation begins by calling {@link com.sun.c1x.C1XCompilation#emitHIR}, which creates the high-level intermediate representation (HIR) from the
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54 * bytecodes of the method. The HIR is managed by the {@link com.sun.c1x.graph.IR} class, an instance of which is created by
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55 * {@code emitHR}, which then calls the {{@link com.sun.c1x.graph.IR#build}} method and returns the result. The {@code C1XCompilation} and {@code IR}
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56 * instances are are bi-directionally linked.
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57 *
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58 * <H3>Supported backends</H3>
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59 *
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60 * <ul>
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61 * <li>AMD64/x64 with SSE2</li>
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62 * </ul>
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63 *
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64 * <H2>Notes and Todos</H2> This is a collection of notes about the C1X compiler, including future directions,
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65 * refactorings, missing features, broken features, etc.
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66 *
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67 *
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68 * <h3>Anticipated Refactorings</h3>
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69 *
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70 * <ul>
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71 * <li>
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72 * The HIR nodes {@link com.sun.c1x.ir.UnsafePrefetch}, {@link com.sun.c1x.ir.UnsafePutObject}, etc should be replaced by uses of the newer
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73 * {@link com.sun.c1x.ir.LoadPointer} and {@link com.sun.c1x.ir.StorePointer} nodes. Currently, the unsafe nodes are only generated by
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74 * the creation of an OSR entry. Benefit: reduce the number of different IR nodes.</li>
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75 *
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76 * <li>
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77 * Add a field to optionally store an {@link com.sun.c1x.ir.Info} object for each HIR node, and remove the
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78 * {@link com.sun.c1x.ir.Instruction#exceptionHandlers} field, the {@link com.sun.c1x.ir.Instruction#bci} field, and any fields to store the Java
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79 * frame state in subclasses. Benefit: saves space if most HIR nodes do not have exception handlers, a bci or Java frame
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80 * state. Removes virtual dispatch on accessing debug information for nodes. Allows any node, regardless of its type, to
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81 * have info attached.</li>
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82 *
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83 * <li>
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84 * Migrate all HIR nodes to use the immutable {@link com.sun.c1x.value.FrameStateInfo} for debugging information. The {@link com.sun.c1x.value.FrameState}
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85 * class is mutable and used throughout graph building. Benefit: {@code FrameStateInfo} would save both total space in
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86 * the IR graph prevent many bugs due to the mutability of {@code FrameState}.</li>
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87 *
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88 * <li>
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89 * Move the {@code FrameState} class to an inner class, or combine entirely, with the {@link com.sun.c1x.graph.GraphBuilder} class. After
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90 * the introduction of the {@code FrameStateInfo} into HIR nodes, the mutable value stack should only need to be
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91 * accessed from the graph builder.</li>
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92 *
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93 * </ul>
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94 *
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95 * <h3>Missing or incomplete features</h3>
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96 *
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97 * There are some features of C1 that were not ported forward or finished given the time constraints for the C1X port. A
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98 * list appears below.
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99 *
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100 * <ul>
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101 * <li>
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102 * Deoptimization metadata. The locations of all local variables and stack values are not communicated back to the
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103 * runtime system through the {@link com.sun.cri.ci.CiDebugInfo} class yet. Such values are known to the register allocator, and there
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104 * vestigial logic to compute them still there in the
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105 * {@link com.sun.c1x.alloc.LinearScan#computeDebugInfo} method. To complete this metadata, the
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106 * {@link com.sun.c1x.alloc.LinearScan} class must implement the {@link ValueLocator} interface and pass it to the
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107 * {@link com.sun.c1x.lir.LIRDebugInfo#createFrame} method after register allocation. The
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108 * resulting debug info will be fed back to the runtime system by the existing logic that calls
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109 * {@link com.sun.cri.ci.CiTargetMethod#recordCall(int, Object, CiDebugInfo, boolean)} and other methods. Obviously the runtime
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110 * system will need to encode this metadata in a dense format, because it is huge.</li>
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111 *
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112 *
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113 * <li>
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114 * Tiered compilation support. C1 supported the ability to add instrumentation to branches, invocations, and checkcasts
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115 * in order to feed profile information to the C2 compiler in a tiered compilation setup. It relied on adding some
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116 * information to the HIR nodes that represent these operations ({@link Invoke}, {@link CheckCast}, etc). All of this
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117 * logic was removed to simplify both the front end and back end in anticipation of designing a future instrumentation
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118 * API. XIR should be general enough to allow instrumentation code to be added to invocation and checkcast sites, but
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119 * currently has no support for adding code at branches.
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120 *
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121 * </li>
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122 *
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123 * <li>
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124 * SPARC and other architecture support. There pretty well-delineated separation between the architecture-independent
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125 * part of LIR backend and the architecture-dependent, but the only implementation that current exists is the X86
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126 * backend ({@link com.sun.c1x.target.amd64.AMD64Backend}, {@link com.sun.c1x.target.amd64.AMD64LIRGenerator}, {@link com.sun.c1x.target.amd64.AMD64LIRAssembler}, etc).</li>
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127 *
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128 * <li>
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129 * XIR for safepoints. The C1X backend should use XIR to get the code for safepoints, but currently it still uses the
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130 * handwritten logic (currently only compatible with Maxine).</li>
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131 *
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132 * </ul>
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133 *
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134 * <h3>Untested features</h3>
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135 *
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136 * <ul>
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137 *
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138 * <li>
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139 * Reference map for outgoing overflow arguments. If a C1X method calls another method that has overflow arguments, it
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140 * is not clear if the outgoing overflow argument area, which may contain references, has the appropriate bits set in
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141 * the reference map for the C1X method's frame. Such arguments may be live in the called method.</li>
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142 *
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143 * <li>
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144 * Although it should work, inlining synchronized methods or methods with exception handlers hasn't been tested.</li>
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145 * <li>
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146 * On-stack replacement. C1X retains all of the special logic for performing an OSR compilation. This is basically a
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147 * compilation with a second entrypoint for entry from the interpreter. However, the generation of a runtime-specific
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148 * entry sequence was never tested.</li>
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149 *
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150 * <li>
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151 * {@link com.sun.c1x.C1XIntrinsic Intrinsification} is the mechanism by which the compiler recognizes calls to special JDK or
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152 * runtime methods and replaces them with custom code. It is enabled by the {@link com.sun.c1x.C1XOptions#OptIntrinsify} compiler
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153 * option. The C1X backend has never been tested with intrinsified arithmetic or floating point operations. For best
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154 * performance, it should generate specialized machine code for arithmetic and floating point, perhaps using global
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155 * stubs for complex floating point operations. <br>
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156 * <i>Note</i>: Folding of special intrinsified methods is supported, tested, and working. The runtime system may
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157 * register methods to be folded by using the
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158 * {@link com.sun.c1x.C1XIntrinsic#registerFoldableMethod(RiMethod, java.lang.reflect.Method)} call. When the compiler encounters a
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159 * call to such a registered method where the parameters are all constants, it invokes the supplied method with
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160 * reflection. If the reflective call produces a value and does not throw an exception, C1X replaces the call to the
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161 * method with the result.</li>
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162 * </ul>
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163 *
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164 * <h3>Broken features</h3>
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165 *
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166 * <ul>
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167 * <li>
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168 * {@link com.sun.c1x.opt.LoopPeeler Loop peeling} was written by Marcelo Cintra near the end of his internship. It was never completed
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169 * and should be considered broken. It only remains as a sketch of how loop peeling would be implemented in C1X, or in
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170 * case he would finish the implementation and test it.</li>
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171 *
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172 * <li>
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173 * Calls to global stubs should allocate space on the caller's stack. On AMD64 currently, calls to global stubs poke the
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174 * arguments onto the stack below the RSP (i.e. in the callee's stack). While normally this code sequence is
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175 * uninterruptible and works fine in the VM, signal handlers triggered when debugging or inspecting this code sequence
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176 * may destroy these values when the OS calls the signal handler. This requires knowing which global stubs are called
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177 * before finalizing the frame size; currently only the calls to
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178 * {@link com.sun.c1x.target.amd64.AMD64MacroAssembler#callRuntimeCalleeSaved}
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179 * do not fit this pattern. This needs to be fixed so that all global stubs that are called by the assembled code are
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180 * known before beginning assembling. The {@link com.sun.c1x.target.amd64.AMD64GlobalStubEmitter} controls how the global stubs accept their
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181 * parameters. See {@link com.sun.c1x.target.amd64.AMD64GlobalStubEmitter#callerFrameContainsArguments} and its usages.
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182 *
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183 * </li>
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184 * </ul>
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185 */
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186 package com.sun.c1x;