annotate src/share/vm/opto/c2_globals.hpp @ 3992:d1bdeef3e3e2

7098282: G1: assert(interval >= 0) failed: Sanity check, referencePolicy.cpp: 76 Summary: There is a race between one thread successfully forwarding and copying the klass mirror for the SoftReference class (including the static master clock) and another thread attempting to use the master clock while attempting to discover a soft reference object. Maintain a shadow copy of the soft reference master clock and use the shadow during reference discovery and reference processing. Reviewed-by: tonyp, brutisso, ysr
author johnc
date Wed, 12 Oct 2011 10:25:51 -0700
parents f08d439fab8c
children 5bda8dae4e14
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1 /*
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2 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef SHARE_VM_OPTO_C2_GLOBALS_HPP
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26 #define SHARE_VM_OPTO_C2_GLOBALS_HPP
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27
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28 #include "runtime/globals.hpp"
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29 #ifdef TARGET_ARCH_x86
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30 # include "c2_globals_x86.hpp"
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31 #endif
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32 #ifdef TARGET_ARCH_sparc
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33 # include "c2_globals_sparc.hpp"
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34 #endif
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35 #ifdef TARGET_ARCH_arm
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36 # include "c2_globals_arm.hpp"
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37 #endif
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38 #ifdef TARGET_OS_FAMILY_linux
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39 # include "c2_globals_linux.hpp"
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40 #endif
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41 #ifdef TARGET_OS_FAMILY_solaris
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42 # include "c2_globals_solaris.hpp"
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43 #endif
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44 #ifdef TARGET_OS_FAMILY_windows
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45 # include "c2_globals_windows.hpp"
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46 #endif
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47 #ifdef TARGET_OS_FAMILY_bsd
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48 # include "c2_globals_bsd.hpp"
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49 #endif
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50
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51 //
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52 // Defines all globals flags used by the server compiler.
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53 //
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54
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55 #define C2_FLAGS(develop, develop_pd, product, product_pd, diagnostic, experimental, notproduct) \
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56 \
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57 notproduct(intx, CompileZapFirst, 0, \
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58 "If +ZapDeadCompiledLocals, " \
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59 "skip this many before compiling in zap calls") \
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60 \
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61 notproduct(intx, CompileZapLast, -1, \
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62 "If +ZapDeadCompiledLocals, " \
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63 "compile this many after skipping (incl. skip count, -1 = all)") \
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64 \
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65 notproduct(intx, ZapDeadCompiledLocalsFirst, 0, \
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66 "If +ZapDeadCompiledLocals, " \
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67 "skip this many before really doing it") \
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68 \
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69 notproduct(intx, ZapDeadCompiledLocalsLast, -1, \
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70 "If +ZapDeadCompiledLocals, " \
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71 "do this many after skipping (incl. skip count, -1 = all)") \
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72 \
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73 develop(intx, OptoPrologueNops, 0, \
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74 "Insert this many extra nop instructions " \
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75 "in the prologue of every nmethod") \
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76 \
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77 product_pd(intx, InteriorEntryAlignment, \
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78 "Code alignment for interior entry points " \
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79 "in generated code (in bytes)") \
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80 \
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81 product(intx, MaxLoopPad, (OptoLoopAlignment-1), \
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82 "Align a loop if padding size in bytes is less or equal to this value") \
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83 \
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84 product(intx, NumberOfLoopInstrToAlign, 4, \
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85 "Number of first instructions in a loop to align") \
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86 \
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87 notproduct(intx, IndexSetWatch, 0, \
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88 "Trace all operations on this IndexSet (-1 means all, 0 none)") \
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89 \
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90 develop(intx, OptoNodeListSize, 4, \
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91 "Starting allocation size of Node_List data structures") \
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92 \
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93 develop(intx, OptoBlockListSize, 8, \
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94 "Starting allocation size of Block_List data structures") \
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95 \
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96 develop(intx, OptoPeepholeAt, -1, \
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97 "Apply peephole optimizations to this peephole rule") \
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98 \
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99 notproduct(bool, PrintIdeal, false, \
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100 "Print ideal graph before code generation") \
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101 \
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102 notproduct(bool, PrintOpto, false, \
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103 "Print compiler2 attempts") \
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104 \
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105 notproduct(bool, PrintOptoInlining, false, \
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106 "Print compiler2 inlining decisions") \
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107 \
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108 notproduct(bool, VerifyOpto, false, \
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109 "Apply more time consuming verification during compilation") \
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110 \
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111 notproduct(bool, VerifyOptoOopOffsets, false, \
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112 "Check types of base addresses in field references") \
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113 \
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114 develop(bool, IdealizedNumerics, false, \
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115 "Check performance difference allowing FP " \
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116 "associativity and commutativity...") \
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117 \
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118 develop(bool, OptoBreakpoint, false, \
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119 "insert breakpoint at method entry") \
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120 \
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121 notproduct(bool, OptoBreakpointOSR, false, \
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122 "insert breakpoint at osr method entry") \
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123 \
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124 notproduct(intx, BreakAtNode, 0, \
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125 "Break at construction of this Node (either _idx or _debug_idx)") \
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126 \
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127 notproduct(bool, OptoBreakpointC2R, false, \
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128 "insert breakpoint at runtime stub entry") \
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129 \
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130 notproduct(bool, OptoNoExecute, false, \
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131 "Attempt to parse and compile but do not execute generated code") \
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132 \
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133 notproduct(bool, PrintOptoStatistics, false, \
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134 "Print New compiler statistics") \
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135 \
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136 notproduct(bool, PrintOptoAssembly, false, \
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137 "Print New compiler assembly output") \
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138 \
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139 develop_pd(bool, OptoPeephole, \
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140 "Apply peephole optimizations after register allocation") \
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141 \
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142 develop(bool, OptoRemoveUseless, true, \
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143 "Remove useless nodes after parsing") \
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144 \
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145 notproduct(bool, PrintFrameConverterAssembly, false, \
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146 "Print New compiler assembly output for frame converters") \
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147 \
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148 notproduct(bool, PrintParseStatistics, false, \
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149 "Print nodes, transforms and new values made per bytecode parsed")\
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150 \
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151 notproduct(bool, PrintOptoPeephole, false, \
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152 "Print New compiler peephole replacements") \
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153 \
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154 develop(bool, PrintCFGBlockFreq, false, \
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155 "Print CFG block freqencies") \
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156 \
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157 develop(bool, TraceOptoParse, false, \
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158 "Trace bytecode parse and control-flow merge") \
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159 \
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160 product_pd(intx, LoopUnrollLimit, \
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161 "Unroll loop bodies with node count less than this") \
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162 \
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163 product(intx, LoopUnrollMin, 4, \
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164 "Minimum number of unroll loop bodies before checking progress" \
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165 "of rounds of unroll,optimize,..") \
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166 \
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167 develop(intx, UnrollLimitForProfileCheck, 1, \
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168 "Don't use profile_trip_cnt() to restrict unrolling until " \
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169 "unrolling would push the number of unrolled iterations above " \
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170 "UnrollLimitForProfileCheck. A higher value allows more " \
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171 "unrolling. Zero acts as a very large value." ) \
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172 \
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173 product(intx, MultiArrayExpandLimit, 6, \
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174 "Maximum number of individual allocations in an inline-expanded " \
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175 "multianewarray instruction") \
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176 \
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177 notproduct(bool, TraceProfileTripCount, false, \
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178 "Trace profile loop trip count information") \
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179 \
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180 product(bool, UseLoopPredicate, true, \
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181 "Generate a predicate to select fast/slow loop versions") \
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182 \
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183 develop(bool, TraceLoopPredicate, false, \
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184 "Trace generation of loop predicates") \
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185 \
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186 develop(bool, TraceLoopOpts, false, \
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187 "Trace executed loop optimizations") \
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188 \
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189 diagnostic(bool, LoopLimitCheck, true, \
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190 "Generate a loop limits check for overflow") \
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191 \
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192 develop(bool, TraceLoopLimitCheck, false, \
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193 "Trace generation of loop limits checks") \
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194 \
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195 diagnostic(bool, RangeLimitCheck, true, \
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196 "Additional overflow checks during range check elimination") \
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197 \
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198 develop(bool, TraceRangeLimitCheck, false, \
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199 "Trace additional overflow checks in RCE") \
bad7ecd0b6ed 5091921: Sign flip issues in loop optimizer
kvn
parents: 2426
diff changeset
200 \
bad7ecd0b6ed 5091921: Sign flip issues in loop optimizer
kvn
parents: 2426
diff changeset
201 diagnostic(bool, UnrollLimitCheck, true, \
bad7ecd0b6ed 5091921: Sign flip issues in loop optimizer
kvn
parents: 2426
diff changeset
202 "Additional overflow checks during loop unroll") \
bad7ecd0b6ed 5091921: Sign flip issues in loop optimizer
kvn
parents: 2426
diff changeset
203 \
1763
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1730
diff changeset
204 product(bool, OptimizeFill, false, \
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1730
diff changeset
205 "convert fill/copy loops into intrinsic") \
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1730
diff changeset
206 \
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1730
diff changeset
207 develop(bool, TraceOptimizeFill, false, \
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1730
diff changeset
208 "print detailed information about fill conversion") \
d6f45b55c972 4809552: Optimize Arrays.fill(...)
never
parents: 1730
diff changeset
209 \
0
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210 develop(bool, OptoCoalesce, true, \
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211 "Use Conservative Copy Coalescing in the Register Allocator") \
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212 \
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213 develop(bool, UseUniqueSubclasses, true, \
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214 "Narrow an abstract reference to the unique concrete subclass") \
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215 \
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216 develop(bool, UseExactTypes, true, \
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217 "Use exact types to eliminate array store checks and v-calls") \
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218 \
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219 product(intx, TrackedInitializationLimit, 50, \
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220 "When initializing fields, track up to this many words") \
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221 \
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222 product(bool, ReduceFieldZeroing, true, \
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223 "When initializing fields, try to avoid needless zeroing") \
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224 \
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225 product(bool, ReduceInitialCardMarks, true, \
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parents:
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226 "When initializing fields, try to avoid needless card marks") \
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227 \
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228 product(bool, ReduceBulkZeroing, true, \
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229 "When bulk-initializing, try to avoid needless zeroing") \
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230 \
1730
f55c4f82ab9d 6978249: spill between cpu and fpu registers when those moves are fast
never
parents: 1685
diff changeset
231 product(bool, UseFPUForSpilling, false, \
f55c4f82ab9d 6978249: spill between cpu and fpu registers when those moves are fast
never
parents: 1685
diff changeset
232 "Spill integer registers to FPU instead of stack when possible") \
f55c4f82ab9d 6978249: spill between cpu and fpu registers when those moves are fast
never
parents: 1685
diff changeset
233 \
0
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234 develop_pd(intx, RegisterCostAreaRatio, \
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235 "Spill selection in reg allocator: scale area by (X/64K) before " \
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parents:
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236 "adding cost") \
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237 \
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238 develop_pd(bool, UseCISCSpill, \
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parents:
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239 "Use ADLC supplied cisc instructions during allocation") \
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240 \
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241 notproduct(bool, VerifyGraphEdges , false, \
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parents:
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242 "Verify Bi-directional Edges") \
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243 \
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244 notproduct(bool, VerifyDUIterators, true, \
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245 "Verify the safety of all iterations of Bi-directional Edges") \
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246 \
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247 notproduct(bool, VerifyHashTableKeys, true, \
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248 "Verify the immutability of keys in the VN hash tables") \
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249 \
550
96964ebdb154 6782232: assert("CreateEx must be first instruction in block" )
kvn
parents: 434
diff changeset
250 notproduct(bool, VerifyRegisterAllocator , false, \
96964ebdb154 6782232: assert("CreateEx must be first instruction in block" )
kvn
parents: 434
diff changeset
251 "Verify Register Allocator") \
96964ebdb154 6782232: assert("CreateEx must be first instruction in block" )
kvn
parents: 434
diff changeset
252 \
0
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253 develop_pd(intx, FLOATPRESSURE, \
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254 "Number of float LRG's that constitute high register pressure") \
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255 \
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256 develop_pd(intx, INTPRESSURE, \
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parents:
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257 "Number of integer LRG's that constitute high register pressure") \
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258 \
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259 notproduct(bool, TraceOptoPipelining, false, \
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parents:
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260 "Trace pipelining information") \
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261 \
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262 notproduct(bool, TraceOptoOutput, false, \
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parents:
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263 "Trace pipelining information") \
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264 \
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265 product_pd(bool, OptoScheduling, \
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parents:
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266 "Instruction Scheduling after register allocation") \
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267 \
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268 product(bool, PartialPeelLoop, true, \
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269 "Partial peel (rotate) loops") \
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270 \
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271 product(intx, PartialPeelNewPhiDelta, 0, \
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272 "Additional phis that can be created by partial peeling") \
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273 \
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274 notproduct(bool, TracePartialPeeling, false, \
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275 "Trace partial peeling (loop rotation) information") \
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276 \
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277 product(bool, PartialPeelAtUnsignedTests, true, \
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278 "Partial peel at unsigned tests if no signed test exists") \
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279 \
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280 product(bool, ReassociateInvariants, true, \
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281 "Enable reassociation of expressions with loop invariants.") \
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282 \
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283 product(bool, LoopUnswitching, true, \
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284 "Enable loop unswitching (a form of invariant test hoisting)") \
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285 \
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286 notproduct(bool, TraceLoopUnswitching, false, \
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287 "Trace loop unswitching") \
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288 \
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289 product(bool, UseSuperWord, true, \
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290 "Transform scalar operations into superword operations") \
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291 \
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292 develop(bool, SuperWordRTDepCheck, false, \
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293 "Enable runtime dependency checks.") \
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294 \
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295 product(bool, TraceSuperWord, false, \
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parents:
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296 "Trace superword transforms") \
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297 \
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298 product_pd(bool, OptoBundling, \
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299 "Generate nops to fill i-cache lines") \
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300 \
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301 product_pd(intx, ConditionalMoveLimit, \
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302 "Limit of ops to make speculative when using CMOVE") \
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303 \
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parents:
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304 /* Set BranchOnRegister == false. See 4965987. */ \
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305 product(bool, BranchOnRegister, false, \
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306 "Use Sparc V9 branch-on-register opcodes") \
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parents:
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307 \
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parents:
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308 develop(bool, SparcV9RegsHiBitsZero, true, \
a61af66fc99e Initial load
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parents:
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309 "Assume Sparc V9 I&L registers on V8+ systems are zero-extended") \
a61af66fc99e Initial load
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parents:
diff changeset
310 \
2008
2f644f85485d 6961690: load oops from constant table on SPARC
twisti
parents: 1972
diff changeset
311 product(bool, UseRDPCForConstantTableBase, false, \
2f644f85485d 6961690: load oops from constant table on SPARC
twisti
parents: 1972
diff changeset
312 "Use Sparc RDPC instruction for the constant table base.") \
2f644f85485d 6961690: load oops from constant table on SPARC
twisti
parents: 1972
diff changeset
313 \
0
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parents:
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314 develop(intx, PrintIdealGraphLevel, 0, \
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parents:
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315 "Print ideal graph to XML file / network interface. " \
a61af66fc99e Initial load
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316 "By default attempts to connect to the visualizer on a socket.") \
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317 \
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parents:
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318 develop(intx, PrintIdealGraphPort, 4444, \
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parents:
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319 "Ideal graph printer to network port") \
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parents:
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320 \
434
de78b80cedec 6772413: code cleanup
kvn
parents: 420
diff changeset
321 notproduct(ccstr, PrintIdealGraphAddress, "127.0.0.1", \
0
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322 "IP address to connect to visualizer") \
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323 \
434
de78b80cedec 6772413: code cleanup
kvn
parents: 420
diff changeset
324 notproduct(ccstr, PrintIdealGraphFile, NULL, \
0
a61af66fc99e Initial load
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325 "File to dump ideal graph to. If set overrides the " \
a61af66fc99e Initial load
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parents:
diff changeset
326 "use of the network") \
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327 \
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328 product(bool, UseOldInlining, true, \
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diff changeset
329 "Enable the 1.3 inlining strategy") \
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330 \
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331 product(bool, UseBimorphicInlining, true, \
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332 "Profiling based inlining for two receivers") \
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parents:
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333 \
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334 product(bool, UseOnlyInlinedBimorphic, true, \
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parents:
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335 "Don't use BimorphicInlining if can't inline a second method") \
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336 \
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337 product(bool, InsertMemBarAfterArraycopy, true, \
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parents:
diff changeset
338 "Insert memory barrier after arraycopy call") \
a61af66fc99e Initial load
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parents:
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339 \
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
340 develop(bool, SubsumeLoads, true, \
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
341 "Attempt to compile while subsuming loads into machine instructions.") \
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
342 \
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
343 develop(bool, StressRecompilation, false, \
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
344 "Recompile each compiled method without subsuming loads or escape analysis.") \
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
345 \
0
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parents:
diff changeset
346 /* controls for tier 1 compilations */ \
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347 \
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348 develop(bool, Tier1CountInvocations, true, \
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349 "Generate code, during tier 1, to update invocation counter") \
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parents:
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350 \
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351 product(intx, Tier1Inline, false, \
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parents:
diff changeset
352 "enable inlining during tier 1") \
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parents:
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353 \
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parents:
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354 product(intx, Tier1MaxInlineSize, 8, \
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parents:
diff changeset
355 "maximum bytecode size of a method to be inlined, during tier 1") \
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parents:
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356 \
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parents:
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357 product(intx, Tier1FreqInlineSize, 35, \
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parents:
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358 "max bytecode size of a frequent method to be inlined, tier 1") \
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parents:
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359 \
a61af66fc99e Initial load
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parents:
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360 develop(intx, ImplicitNullCheckThreshold, 3, \
a61af66fc99e Initial load
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parents:
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361 "Don't do implicit null checks if NPE's in a method exceeds limit") \
a61af66fc99e Initial load
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parents:
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362 \
a61af66fc99e Initial load
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parents:
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363 /* controls for loop optimization */ \
a61af66fc99e Initial load
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parents:
diff changeset
364 product(intx, Tier1LoopOptsCount, 0, \
a61af66fc99e Initial load
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parents:
diff changeset
365 "Set level of loop optimization for tier 1 compiles") \
a61af66fc99e Initial load
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parents:
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366 \
a61af66fc99e Initial load
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parents:
diff changeset
367 product(intx, LoopOptsCount, 43, \
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parents:
diff changeset
368 "Set level of loop optimization for tier 1 compiles") \
a61af66fc99e Initial load
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parents:
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369 \
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parents:
diff changeset
370 /* controls for heat-based inlining */ \
a61af66fc99e Initial load
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parents:
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371 \
a61af66fc99e Initial load
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parents:
diff changeset
372 develop(intx, NodeCountInliningCutoff, 18000, \
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parents:
diff changeset
373 "If parser node generation exceeds limit stop inlining") \
a61af66fc99e Initial load
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parents:
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374 \
a61af66fc99e Initial load
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parents:
diff changeset
375 develop(intx, NodeCountInliningStep, 1000, \
a61af66fc99e Initial load
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parents:
diff changeset
376 "Target size of warm calls inlined between optimization passes") \
a61af66fc99e Initial load
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parents:
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377 \
a61af66fc99e Initial load
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parents:
diff changeset
378 develop(bool, InlineWarmCalls, false, \
a61af66fc99e Initial load
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parents:
diff changeset
379 "Use a heat-based priority queue to govern inlining") \
a61af66fc99e Initial load
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parents:
diff changeset
380 \
a61af66fc99e Initial load
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diff changeset
381 develop(intx, HotCallCountThreshold, 999999, \
a61af66fc99e Initial load
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parents:
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382 "large numbers of calls (per method invocation) force hotness") \
a61af66fc99e Initial load
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parents:
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383 \
a61af66fc99e Initial load
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parents:
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384 develop(intx, HotCallProfitThreshold, 999999, \
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parents:
diff changeset
385 "highly profitable inlining opportunities force hotness") \
a61af66fc99e Initial load
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parents:
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386 \
a61af66fc99e Initial load
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diff changeset
387 develop(intx, HotCallTrivialWork, -1, \
a61af66fc99e Initial load
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parents:
diff changeset
388 "trivial execution time (no larger than this) forces hotness") \
a61af66fc99e Initial load
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parents:
diff changeset
389 \
a61af66fc99e Initial load
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parents:
diff changeset
390 develop(intx, HotCallTrivialSize, -1, \
a61af66fc99e Initial load
duke
parents:
diff changeset
391 "trivial methods (no larger than this) force calls to be hot") \
a61af66fc99e Initial load
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parents:
diff changeset
392 \
a61af66fc99e Initial load
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parents:
diff changeset
393 develop(intx, WarmCallMinCount, -1, \
a61af66fc99e Initial load
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parents:
diff changeset
394 "number of calls (per method invocation) to enable inlining") \
a61af66fc99e Initial load
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parents:
diff changeset
395 \
a61af66fc99e Initial load
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parents:
diff changeset
396 develop(intx, WarmCallMinProfit, -1, \
a61af66fc99e Initial load
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parents:
diff changeset
397 "number of calls (per method invocation) to enable inlining") \
a61af66fc99e Initial load
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parents:
diff changeset
398 \
a61af66fc99e Initial load
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parents:
diff changeset
399 develop(intx, WarmCallMaxWork, 999999, \
a61af66fc99e Initial load
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parents:
diff changeset
400 "execution time of the largest inlinable method") \
a61af66fc99e Initial load
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parents:
diff changeset
401 \
a61af66fc99e Initial load
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parents:
diff changeset
402 develop(intx, WarmCallMaxSize, 999999, \
a61af66fc99e Initial load
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parents:
diff changeset
403 "size of the largest inlinable method") \
a61af66fc99e Initial load
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parents:
diff changeset
404 \
a61af66fc99e Initial load
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parents:
diff changeset
405 product(intx, MaxNodeLimit, 65000, \
a61af66fc99e Initial load
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parents:
diff changeset
406 "Maximum number of nodes") \
a61af66fc99e Initial load
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parents:
diff changeset
407 \
a61af66fc99e Initial load
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parents:
diff changeset
408 product(intx, NodeLimitFudgeFactor, 1000, \
a61af66fc99e Initial load
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parents:
diff changeset
409 "Fudge Factor for certain optimizations") \
a61af66fc99e Initial load
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parents:
diff changeset
410 \
a61af66fc99e Initial load
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parents:
diff changeset
411 product(bool, UseJumpTables, true, \
a61af66fc99e Initial load
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parents:
diff changeset
412 "Use JumpTables instead of a binary search tree for switches") \
a61af66fc99e Initial load
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parents:
diff changeset
413 \
a61af66fc99e Initial load
duke
parents:
diff changeset
414 product(bool, UseDivMod, true, \
a61af66fc99e Initial load
duke
parents:
diff changeset
415 "Use combined DivMod instruction if available") \
a61af66fc99e Initial load
duke
parents:
diff changeset
416 \
a61af66fc99e Initial load
duke
parents:
diff changeset
417 product(intx, MinJumpTableSize, 18, \
a61af66fc99e Initial load
duke
parents:
diff changeset
418 "Minimum number of targets in a generated jump table") \
a61af66fc99e Initial load
duke
parents:
diff changeset
419 \
a61af66fc99e Initial load
duke
parents:
diff changeset
420 product(intx, MaxJumpTableSize, 65000, \
a61af66fc99e Initial load
duke
parents:
diff changeset
421 "Maximum number of targets in a generated jump table") \
a61af66fc99e Initial load
duke
parents:
diff changeset
422 \
a61af66fc99e Initial load
duke
parents:
diff changeset
423 product(intx, MaxJumpTableSparseness, 5, \
a61af66fc99e Initial load
duke
parents:
diff changeset
424 "Maximum sparseness for jumptables") \
a61af66fc99e Initial load
duke
parents:
diff changeset
425 \
a61af66fc99e Initial load
duke
parents:
diff changeset
426 product(bool, EliminateLocks, true, \
a61af66fc99e Initial load
duke
parents:
diff changeset
427 "Coarsen locks when possible") \
a61af66fc99e Initial load
duke
parents:
diff changeset
428 \
a61af66fc99e Initial load
duke
parents:
diff changeset
429 notproduct(bool, PrintLockStatistics, false, \
a61af66fc99e Initial load
duke
parents:
diff changeset
430 "Print precise statistics on the dynamic lock usage") \
a61af66fc99e Initial load
duke
parents:
diff changeset
431 \
a61af66fc99e Initial load
duke
parents:
diff changeset
432 diagnostic(bool, PrintPreciseBiasedLockingStatistics, false, \
a61af66fc99e Initial load
duke
parents:
diff changeset
433 "Print per-lock-site statistics of biased locking in JVM") \
a61af66fc99e Initial load
duke
parents:
diff changeset
434 \
a61af66fc99e Initial load
duke
parents:
diff changeset
435 notproduct(bool, PrintEliminateLocks, false, \
a61af66fc99e Initial load
duke
parents:
diff changeset
436 "Print out when locks are eliminated") \
a61af66fc99e Initial load
duke
parents:
diff changeset
437 \
17
ff5961f4c095 6395208: Elide autoboxing for calls to HashMap.get(int) and HashMap.get(long)
never
parents: 0
diff changeset
438 diagnostic(bool, EliminateAutoBox, false, \
ff5961f4c095 6395208: Elide autoboxing for calls to HashMap.get(int) and HashMap.get(long)
never
parents: 0
diff changeset
439 "Private flag to control optimizations for autobox elimination") \
ff5961f4c095 6395208: Elide autoboxing for calls to HashMap.get(int) and HashMap.get(long)
never
parents: 0
diff changeset
440 \
ff5961f4c095 6395208: Elide autoboxing for calls to HashMap.get(int) and HashMap.get(long)
never
parents: 0
diff changeset
441 product(intx, AutoBoxCacheMax, 128, \
ff5961f4c095 6395208: Elide autoboxing for calls to HashMap.get(int) and HashMap.get(long)
never
parents: 0
diff changeset
442 "Sets max value cached by the java.lang.Integer autobox cache") \
ff5961f4c095 6395208: Elide autoboxing for calls to HashMap.get(int) and HashMap.get(long)
never
parents: 0
diff changeset
443 \
930
357d4e2eb4dd 6873799: enable escape analysis by default
kvn
parents: 673
diff changeset
444 product(bool, DoEscapeAnalysis, true, \
0
a61af66fc99e Initial load
duke
parents:
diff changeset
445 "Perform escape analysis") \
a61af66fc99e Initial load
duke
parents:
diff changeset
446 \
a61af66fc99e Initial load
duke
parents:
diff changeset
447 notproduct(bool, PrintEscapeAnalysis, false, \
a61af66fc99e Initial load
duke
parents:
diff changeset
448 "Print the results of escape analysis") \
a61af66fc99e Initial load
duke
parents:
diff changeset
449 \
a61af66fc99e Initial load
duke
parents:
diff changeset
450 product(bool, EliminateAllocations, true, \
a61af66fc99e Initial load
duke
parents:
diff changeset
451 "Use escape analysis to eliminate allocations") \
a61af66fc99e Initial load
duke
parents:
diff changeset
452 \
65
99269dbf4ba8 6674588: (Escape Analysis) Improve Escape Analysis code
kvn
parents: 17
diff changeset
453 notproduct(bool, PrintEliminateAllocations, false, \
99269dbf4ba8 6674588: (Escape Analysis) Improve Escape Analysis code
kvn
parents: 17
diff changeset
454 "Print out when allocations are eliminated") \
99269dbf4ba8 6674588: (Escape Analysis) Improve Escape Analysis code
kvn
parents: 17
diff changeset
455 \
99269dbf4ba8 6674588: (Escape Analysis) Improve Escape Analysis code
kvn
parents: 17
diff changeset
456 product(intx, EliminateAllocationArraySizeLimit, 64, \
99269dbf4ba8 6674588: (Escape Analysis) Improve Escape Analysis code
kvn
parents: 17
diff changeset
457 "Array size (number of elements) limit for scalar replacement") \
99269dbf4ba8 6674588: (Escape Analysis) Improve Escape Analysis code
kvn
parents: 17
diff changeset
458 \
673
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 579
diff changeset
459 product(bool, UseOptoBiasInlining, true, \
420
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 418
diff changeset
460 "Generate biased locking code in C2 ideal graph") \
a1980da045cc 6462850: generate biased locking code in C2 ideal graph
kvn
parents: 418
diff changeset
461 \
1081
bd12fff78df5 6904191: OptimizeStringConcat should be product instead of experimental
cfang
parents: 1080
diff changeset
462 product(bool, OptimizeStringConcat, false, \
1080
7c57aead6d3e 6892658: C2 should optimize some stringbuilder patterns
never
parents: 930
diff changeset
463 "Optimize the construction of Strings by StringBuilder") \
7c57aead6d3e 6892658: C2 should optimize some stringbuilder patterns
never
parents: 930
diff changeset
464 \
7c57aead6d3e 6892658: C2 should optimize some stringbuilder patterns
never
parents: 930
diff changeset
465 notproduct(bool, PrintOptimizeStringConcat, false, \
7c57aead6d3e 6892658: C2 should optimize some stringbuilder patterns
never
parents: 930
diff changeset
466 "Print information about transformations performed on Strings") \
7c57aead6d3e 6892658: C2 should optimize some stringbuilder patterns
never
parents: 930
diff changeset
467 \
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 245
diff changeset
468 product(intx, ValueSearchLimit, 1000, \
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 245
diff changeset
469 "Recursion limit in PhaseMacroExpand::value_from_mem_phi") \
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 245
diff changeset
470 \
0
a61af66fc99e Initial load
duke
parents:
diff changeset
471 product(intx, MaxLabelRootDepth, 1100, \
a61af66fc99e Initial load
duke
parents:
diff changeset
472 "Maximum times call Label_Root to prevent stack overflow") \
155
723be81c1212 6701887: JDK7 server VM in endless loop in Node::dominates
kvn
parents: 65
diff changeset
473 \
723be81c1212 6701887: JDK7 server VM in endless loop in Node::dominates
kvn
parents: 65
diff changeset
474 diagnostic(intx, DominatorSearchLimit, 1000, \
723be81c1212 6701887: JDK7 server VM in endless loop in Node::dominates
kvn
parents: 65
diff changeset
475 "Iterations limit in Node::dominates") \
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
476 \
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
477 product(bool, BlockLayoutByFrequency, true, \
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
478 "Use edge frequencies to drive block ordering") \
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
479 \
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
480 product(intx, BlockLayoutMinDiamondPercentage, 20, \
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
481 "Miniumum %% of a successor (predecessor) for which block layout "\
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
482 "a will allow a fork (join) in a single chain") \
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
483 \
673
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 579
diff changeset
484 product(bool, BlockLayoutRotateLoops, true, \
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 257
diff changeset
485 "Allow back branches to be fall throughs in the block layour") \
0
a61af66fc99e Initial load
duke
parents:
diff changeset
486
1080
7c57aead6d3e 6892658: C2 should optimize some stringbuilder patterns
never
parents: 930
diff changeset
487 C2_FLAGS(DECLARE_DEVELOPER_FLAG, DECLARE_PD_DEVELOPER_FLAG, DECLARE_PRODUCT_FLAG, DECLARE_PD_PRODUCT_FLAG, DECLARE_DIAGNOSTIC_FLAG, DECLARE_EXPERIMENTAL_FLAG, DECLARE_NOTPRODUCT_FLAG)
1972
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1763
diff changeset
488
f95d63e2154a 6989984: Use standard include model for Hospot
stefank
parents: 1763
diff changeset
489 #endif // SHARE_VM_OPTO_C2_GLOBALS_HPP