Mercurial > hg > graal-compiler
annotate src/share/vm/opto/machnode.hpp @ 3992:d1bdeef3e3e2
7098282: G1: assert(interval >= 0) failed: Sanity check, referencePolicy.cpp: 76
Summary: There is a race between one thread successfully forwarding and copying the klass mirror for the SoftReference class (including the static master clock) and another thread attempting to use the master clock while attempting to discover a soft reference object. Maintain a shadow copy of the soft reference master clock and use the shadow during reference discovery and reference processing.
Reviewed-by: tonyp, brutisso, ysr
author | johnc |
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date | Wed, 12 Oct 2011 10:25:51 -0700 |
parents | 11211f7cb5a0 |
children | f03a3c8bd5e5 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP |
26 #define SHARE_VM_OPTO_MACHNODE_HPP | |
27 | |
28 #include "opto/callnode.hpp" | |
29 #include "opto/matcher.hpp" | |
30 #include "opto/multnode.hpp" | |
31 #include "opto/node.hpp" | |
32 #include "opto/regmask.hpp" | |
33 | |
0 | 34 class BufferBlob; |
35 class CodeBuffer; | |
36 class JVMState; | |
37 class MachCallDynamicJavaNode; | |
38 class MachCallJavaNode; | |
39 class MachCallLeafNode; | |
40 class MachCallNode; | |
41 class MachCallRuntimeNode; | |
42 class MachCallStaticJavaNode; | |
43 class MachEpilogNode; | |
44 class MachIfNode; | |
45 class MachNullCheckNode; | |
46 class MachOper; | |
47 class MachProjNode; | |
48 class MachPrologNode; | |
49 class MachReturnNode; | |
50 class MachSafePointNode; | |
51 class MachSpillCopyNode; | |
52 class Matcher; | |
53 class PhaseRegAlloc; | |
54 class RegMask; | |
55 class State; | |
56 | |
57 //---------------------------MachOper------------------------------------------ | |
58 class MachOper : public ResourceObj { | |
59 public: | |
60 // Allocate right next to the MachNodes in the same arena | |
61 void *operator new( size_t x, Compile* C ) { return C->node_arena()->Amalloc_D(x); } | |
62 | |
63 // Opcode | |
64 virtual uint opcode() const = 0; | |
65 | |
66 // Number of input edges. | |
67 // Generally at least 1 | |
68 virtual uint num_edges() const { return 1; } | |
69 // Array of Register masks | |
70 virtual const RegMask *in_RegMask(int index) const; | |
71 | |
72 // Methods to output the encoding of the operand | |
73 | |
74 // Negate conditional branches. Error for non-branch Nodes | |
75 virtual void negate(); | |
76 | |
77 // Return the value requested | |
78 // result register lookup, corresponding to int_format | |
79 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; | |
80 // input register lookup, corresponding to ext_format | |
81 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
82 | |
83 // helpers for MacroAssembler generation from ADLC | |
84 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { | |
85 return ::as_Register(reg(ra_, node)); | |
86 } | |
87 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
88 return ::as_Register(reg(ra_, node, idx)); | |
89 } | |
90 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
91 return ::as_FloatRegister(reg(ra_, node)); | |
92 } | |
93 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
94 return ::as_FloatRegister(reg(ra_, node, idx)); | |
95 } | |
96 | |
97 #if defined(IA32) || defined(AMD64) | |
98 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
99 return ::as_XMMRegister(reg(ra_, node)); | |
100 } | |
101 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
102 return ::as_XMMRegister(reg(ra_, node, idx)); | |
103 } | |
104 #endif | |
105 | |
106 virtual intptr_t constant() const; | |
107 virtual bool constant_is_oop() const; | |
108 virtual jdouble constantD() const; | |
109 virtual jfloat constantF() const; | |
110 virtual jlong constantL() const; | |
111 virtual TypeOopPtr *oop() const; | |
112 virtual int ccode() const; | |
113 // A zero, default, indicates this value is not needed. | |
114 // May need to lookup the base register, as done in int_ and ext_format | |
115 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
116 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
117 virtual int scale() const; | |
118 // Parameters needed to support MEMORY_INTERFACE access to stackSlot | |
119 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
120 // Check for PC-Relative displacement | |
121 virtual bool disp_is_oop() const; | |
122 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot | |
123 virtual int base_position() const; // base edge position, or -1 | |
124 virtual int index_position() const; // index edge position, or -1 | |
125 | |
126 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP | |
127 // Only returns non-null value for i486.ad's indOffset32X | |
128 virtual const TypePtr *disp_as_type() const { return NULL; } | |
129 | |
130 // Return the label | |
131 virtual Label *label() const; | |
132 | |
133 // Return the method's address | |
134 virtual intptr_t method() const; | |
135 | |
136 // Hash and compare over operands are currently identical | |
137 virtual uint hash() const; | |
138 virtual uint cmp( const MachOper &oper ) const; | |
139 | |
140 // Virtual clone, since I do not know how big the MachOper is. | |
141 virtual MachOper *clone(Compile* C) const = 0; | |
142 | |
143 // Return ideal Type from simple operands. Fail for complex operands. | |
144 virtual const Type *type() const; | |
145 | |
146 // Set an integer offset if we have one, or error otherwise | |
147 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } | |
148 | |
149 #ifndef PRODUCT | |
150 // Return name of operand | |
151 virtual const char *Name() const { return "???";} | |
152 | |
153 // Methods to output the text version of the operand | |
154 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; | |
155 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; | |
156 | |
157 virtual void dump_spec(outputStream *st) const; // Print per-operand info | |
158 #endif | |
159 }; | |
160 | |
161 //------------------------------MachNode--------------------------------------- | |
162 // Base type for all machine specific nodes. All node classes generated by the | |
163 // ADLC inherit from this class. | |
164 class MachNode : public Node { | |
165 public: | |
166 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { | |
167 init_class_id(Class_Mach); | |
168 } | |
169 // Required boilerplate | |
170 virtual uint size_of() const { return sizeof(MachNode); } | |
171 virtual int Opcode() const; // Always equal to MachNode | |
172 virtual uint rule() const = 0; // Machine-specific opcode | |
173 // Number of inputs which come before the first operand. | |
174 // Generally at least 1, to skip the Control input | |
175 virtual uint oper_input_base() const { return 1; } | |
176 | |
177 // Copy inputs and operands to new node of instruction. | |
178 // Called from cisc_version() and short_branch_version(). | |
179 // !!!! The method's body is defined in ad_<arch>.cpp file. | |
180 void fill_new_machnode(MachNode *n, Compile* C) const; | |
181 | |
182 // Return an equivalent instruction using memory for cisc_operand position | |
183 virtual MachNode *cisc_version(int offset, Compile* C); | |
184 // Modify this instruction's register mask to use stack version for cisc_operand | |
185 virtual void use_cisc_RegMask(); | |
186 | |
187 // Support for short branches | |
188 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } | |
189 | |
3851 | 190 // Avoid back to back some instructions on some CPUs. |
191 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; } | |
192 | |
0 | 193 // First index in _in[] corresponding to operand, or -1 if there is none |
194 int operand_index(uint operand) const; | |
195 | |
196 // Register class input is expected in | |
197 virtual const RegMask &in_RegMask(uint) const; | |
198 | |
199 // cisc-spillable instructions redefine for use by in_RegMask | |
200 virtual const RegMask *cisc_RegMask() const { return NULL; } | |
201 | |
202 // If this instruction is a 2-address instruction, then return the | |
203 // index of the input which must match the output. Not nessecary | |
204 // for instructions which bind the input and output register to the | |
205 // same singleton regiser (e.g., Intel IDIV which binds AX to be | |
206 // both an input and an output). It is nessecary when the input and | |
207 // output have choices - but they must use the same choice. | |
208 virtual uint two_adr( ) const { return 0; } | |
209 | |
210 // Array of complex operand pointers. Each corresponds to zero or | |
211 // more leafs. Must be set by MachNode constructor to point to an | |
212 // internal array of MachOpers. The MachOper array is sized by | |
213 // specific MachNodes described in the ADL. | |
214 uint _num_opnds; | |
215 MachOper **_opnds; | |
216 uint num_opnds() const { return _num_opnds; } | |
217 | |
218 // Emit bytes into cbuf | |
219 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
220 // Size of instruction in bytes | |
221 virtual uint size(PhaseRegAlloc *ra_) const; | |
222 // Helper function that computes size by emitting code | |
223 virtual uint emit_size(PhaseRegAlloc *ra_) const; | |
224 | |
225 // Return the alignment required (in units of relocInfo::addr_unit()) | |
226 // for this instruction (must be a power of 2) | |
227 virtual int alignment_required() const { return 1; } | |
228 | |
229 // Return the padding (in bytes) to be emitted before this | |
230 // instruction to properly align it. | |
231 virtual int compute_padding(int current_offset) const { return 0; } | |
232 | |
233 // Return number of relocatable values contained in this instruction | |
234 virtual int reloc() const { return 0; } | |
235 | |
236 // Hash and compare over operands. Used to do GVN on machine Nodes. | |
237 virtual uint hash() const; | |
238 virtual uint cmp( const Node &n ) const; | |
239 | |
240 // Expand method for MachNode, replaces nodes representing pseudo | |
241 // instructions with a set of nodes which represent real machine | |
242 // instructions and compute the same value. | |
1203 | 243 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } |
0 | 244 |
245 // Bottom_type call; value comes from operand0 | |
246 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } | |
247 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : Matcher::base2reg[t->base()]; } | |
248 | |
249 // If this is a memory op, return the base pointer and fixed offset. | |
250 // If there are no such, return NULL. If there are multiple addresses | |
251 // or the address is indeterminate (rare cases) then return (Node*)-1, | |
252 // which serves as node bottom. | |
253 // If the offset is not statically determined, set it to Type::OffsetBot. | |
254 // This method is free to ignore stack slots if that helps. | |
255 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) | |
256 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible | |
257 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; | |
258 | |
259 // Helper for get_base_and_disp: find the base and index input nodes. | |
260 // Returns the MachOper as determined by memory_operand(), for use, if | |
261 // needed by the caller. If (MachOper *)-1 is returned, base and index | |
262 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and | |
263 // index are set to NULL. | |
264 const MachOper* memory_inputs(Node* &base, Node* &index) const; | |
265 | |
266 // Helper for memory_inputs: Which operand carries the necessary info? | |
267 // By default, returns NULL, which means there is no such operand. | |
268 // If it returns (MachOper*)-1, this means there are multiple memories. | |
269 virtual const MachOper* memory_operand() const { return NULL; } | |
270 | |
271 // Call "get_base_and_disp" to decide which category of memory is used here. | |
272 virtual const class TypePtr *adr_type() const; | |
273 | |
274 // Apply peephole rule(s) to this instruction | |
275 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ); | |
276 | |
277 // Top-level ideal Opcode matched | |
278 virtual int ideal_Opcode() const { return Op_Node; } | |
279 | |
280 // Adds the label for the case | |
281 virtual void add_case_label( int switch_val, Label* blockLabel); | |
282 | |
283 // Set the absolute address for methods | |
284 virtual void method_set( intptr_t addr ); | |
285 | |
286 // Should we clone rather than spill this instruction? | |
287 bool rematerialize() const; | |
288 | |
289 // Get the pipeline info | |
290 static const Pipeline *pipeline_class(); | |
291 virtual const Pipeline *pipeline() const; | |
292 | |
293 #ifndef PRODUCT | |
294 virtual const char *Name() const = 0; // Machine-specific name | |
295 virtual void dump_spec(outputStream *st) const; // Print per-node info | |
296 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual | |
297 #endif | |
298 }; | |
299 | |
300 //------------------------------MachIdealNode---------------------------- | |
301 // Machine specific versions of nodes that must be defined by user. | |
302 // These are not converted by matcher from ideal nodes to machine nodes | |
303 // but are inserted into the code by the compiler. | |
304 class MachIdealNode : public MachNode { | |
305 public: | |
306 MachIdealNode( ) {} | |
307 | |
308 // Define the following defaults for non-matched machine nodes | |
309 virtual uint oper_input_base() const { return 0; } | |
310 virtual uint rule() const { return 9999999; } | |
311 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } | |
312 }; | |
313 | |
314 //------------------------------MachTypeNode---------------------------- | |
315 // Machine Nodes that need to retain a known Type. | |
316 class MachTypeNode : public MachNode { | |
317 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
318 public: | |
319 const Type *_bottom_type; | |
320 | |
321 virtual const class Type *bottom_type() const { return _bottom_type; } | |
322 #ifndef PRODUCT | |
323 virtual void dump_spec(outputStream *st) const; | |
324 #endif | |
325 }; | |
326 | |
327 //------------------------------MachBreakpointNode---------------------------- | |
328 // Machine breakpoint or interrupt Node | |
329 class MachBreakpointNode : public MachIdealNode { | |
330 public: | |
331 MachBreakpointNode( ) {} | |
332 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
333 virtual uint size(PhaseRegAlloc *ra_) const; | |
334 | |
335 #ifndef PRODUCT | |
336 virtual const char *Name() const { return "Breakpoint"; } | |
337 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
338 #endif | |
339 }; | |
340 | |
2008 | 341 //------------------------------MachConstantBaseNode-------------------------- |
342 // Machine node that represents the base address of the constant table. | |
343 class MachConstantBaseNode : public MachIdealNode { | |
344 public: | |
345 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). | |
346 | |
347 public: | |
348 MachConstantBaseNode() : MachIdealNode() { | |
349 init_class_id(Class_MachConstantBase); | |
350 } | |
351 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } | |
352 virtual uint ideal_reg() const { return Op_RegP; } | |
353 virtual uint oper_input_base() const { return 1; } | |
354 | |
355 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; | |
356 virtual uint size(PhaseRegAlloc* ra_) const; | |
357 virtual bool pinned() const { return UseRDPCForConstantTableBase; } | |
358 | |
359 static const RegMask& static_out_RegMask() { return _out_RegMask; } | |
360 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } | |
361 | |
362 #ifndef PRODUCT | |
363 virtual const char* Name() const { return "MachConstantBaseNode"; } | |
364 virtual void format(PhaseRegAlloc*, outputStream* st) const; | |
365 #endif | |
366 }; | |
367 | |
368 //------------------------------MachConstantNode------------------------------- | |
369 // Machine node that holds a constant which is stored in the constant table. | |
370 class MachConstantNode : public MachNode { | |
371 protected: | |
372 Compile::Constant _constant; // This node's constant. | |
373 | |
374 public: | |
375 MachConstantNode() : MachNode() { | |
376 init_class_id(Class_MachConstant); | |
377 } | |
378 | |
379 virtual void eval_constant(Compile* C) { | |
380 #ifdef ASSERT | |
381 tty->print("missing MachConstantNode eval_constant function: "); | |
382 dump(); | |
383 #endif | |
384 ShouldNotCallThis(); | |
385 } | |
386 | |
387 virtual const RegMask &in_RegMask(uint idx) const { | |
388 if (idx == mach_constant_base_node_input()) | |
389 return MachConstantBaseNode::static_out_RegMask(); | |
390 return MachNode::in_RegMask(idx); | |
391 } | |
392 | |
393 // Input edge of MachConstantBaseNode. | |
394 uint mach_constant_base_node_input() const { return req() - 1; } | |
395 | |
396 int constant_offset(); | |
397 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } | |
398 }; | |
399 | |
0 | 400 //------------------------------MachUEPNode----------------------------------- |
401 // Machine Unvalidated Entry Point Node | |
402 class MachUEPNode : public MachIdealNode { | |
403 public: | |
404 MachUEPNode( ) {} | |
405 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
406 virtual uint size(PhaseRegAlloc *ra_) const; | |
407 | |
408 #ifndef PRODUCT | |
409 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } | |
410 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
411 #endif | |
412 }; | |
413 | |
414 //------------------------------MachPrologNode-------------------------------- | |
415 // Machine function Prolog Node | |
416 class MachPrologNode : public MachIdealNode { | |
417 public: | |
418 MachPrologNode( ) {} | |
419 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
420 virtual uint size(PhaseRegAlloc *ra_) const; | |
421 virtual int reloc() const; | |
422 | |
423 #ifndef PRODUCT | |
424 virtual const char *Name() const { return "Prolog"; } | |
425 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
426 #endif | |
427 }; | |
428 | |
429 //------------------------------MachEpilogNode-------------------------------- | |
430 // Machine function Epilog Node | |
431 class MachEpilogNode : public MachIdealNode { | |
432 public: | |
433 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} | |
434 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
435 virtual uint size(PhaseRegAlloc *ra_) const; | |
436 virtual int reloc() const; | |
437 virtual const Pipeline *pipeline() const; | |
438 | |
439 private: | |
440 bool _do_polling; | |
441 | |
442 public: | |
443 bool do_polling() const { return _do_polling; } | |
444 | |
445 // Offset of safepoint from the beginning of the node | |
446 int safepoint_offset() const; | |
447 | |
448 #ifndef PRODUCT | |
449 virtual const char *Name() const { return "Epilog"; } | |
450 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
451 #endif | |
452 }; | |
453 | |
454 //------------------------------MachNopNode----------------------------------- | |
455 // Machine function Nop Node | |
456 class MachNopNode : public MachIdealNode { | |
457 private: | |
458 int _count; | |
459 public: | |
460 MachNopNode( ) : _count(1) {} | |
461 MachNopNode( int count ) : _count(count) {} | |
462 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
463 virtual uint size(PhaseRegAlloc *ra_) const; | |
464 | |
465 virtual const class Type *bottom_type() const { return Type::CONTROL; } | |
466 | |
467 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp | |
468 virtual const Pipeline *pipeline() const; | |
469 #ifndef PRODUCT | |
470 virtual const char *Name() const { return "Nop"; } | |
471 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
472 virtual void dump_spec(outputStream *st) const { } // No per-operand info | |
473 #endif | |
474 }; | |
475 | |
476 //------------------------------MachSpillCopyNode------------------------------ | |
477 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any | |
478 // location (stack or register). | |
479 class MachSpillCopyNode : public MachIdealNode { | |
480 const RegMask *_in; // RegMask for input | |
481 const RegMask *_out; // RegMask for output | |
482 const Type *_type; | |
483 public: | |
484 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) : | |
485 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) { | |
486 init_class_id(Class_MachSpillCopy); | |
487 init_flags(Flag_is_Copy); | |
488 add_req(NULL); | |
489 add_req(n); | |
490 } | |
491 virtual uint size_of() const { return sizeof(*this); } | |
492 void set_out_RegMask(const RegMask &out) { _out = &out; } | |
493 void set_in_RegMask(const RegMask &in) { _in = ∈ } | |
494 virtual const RegMask &out_RegMask() const { return *_out; } | |
495 virtual const RegMask &in_RegMask(uint) const { return *_in; } | |
496 virtual const class Type *bottom_type() const { return _type; } | |
497 virtual uint ideal_reg() const { return Matcher::base2reg[_type->base()]; } | |
498 virtual uint oper_input_base() const { return 1; } | |
499 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; | |
500 | |
501 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
502 virtual uint size(PhaseRegAlloc *ra_) const; | |
503 | |
504 #ifndef PRODUCT | |
505 virtual const char *Name() const { return "MachSpillCopy"; } | |
506 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
507 #endif | |
508 }; | |
509 | |
3853
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510 //------------------------------MachBranchNode-------------------------------- |
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511 // Abstract machine branch Node |
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512 class MachBranchNode : public MachIdealNode { |
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513 public: |
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514 MachBranchNode() : MachIdealNode() { |
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515 init_class_id(Class_MachBranch); |
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516 } |
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517 virtual void label_set(Label* label, uint block_num) = 0; |
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518 virtual void save_label(Label** label, uint* block_num) = 0; |
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519 |
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520 // Support for short branches |
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521 virtual MachNode *short_branch_version(Compile* C) { return NULL; } |
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522 |
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523 virtual bool pinned() const { return true; }; |
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524 }; |
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525 |
0 | 526 //------------------------------MachNullChkNode-------------------------------- |
527 // Machine-dependent null-pointer-check Node. Points a real MachNode that is | |
528 // also some kind of memory op. Turns the indicated MachNode into a | |
529 // conditional branch with good latency on the ptr-not-null path and awful | |
530 // latency on the pointer-is-null path. | |
531 | |
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532 class MachNullCheckNode : public MachBranchNode { |
0 | 533 public: |
534 const uint _vidx; // Index of memop being tested | |
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535 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { |
0 | 536 init_class_id(Class_MachNullCheck); |
537 add_req(ctrl); | |
538 add_req(memop); | |
539 } | |
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540 virtual uint size_of() const { return sizeof(*this); } |
0 | 541 |
542 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
3839 | 543 virtual void label_set(Label* label, uint block_num); |
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544 virtual void save_label(Label** label, uint* block_num); |
0 | 545 virtual void negate() { } |
546 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } | |
547 virtual uint ideal_reg() const { return NotAMachineReg; } | |
548 virtual const RegMask &in_RegMask(uint) const; | |
549 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } | |
550 #ifndef PRODUCT | |
551 virtual const char *Name() const { return "NullCheck"; } | |
552 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
553 #endif | |
554 }; | |
555 | |
556 //------------------------------MachProjNode---------------------------------- | |
557 // Machine-dependent Ideal projections (how is that for an oxymoron). Really | |
558 // just MachNodes made by the Ideal world that replicate simple projections | |
559 // but with machine-dependent input & output register masks. Generally | |
560 // produced as part of calling conventions. Normally I make MachNodes as part | |
561 // of the Matcher process, but the Matcher is ill suited to issues involving | |
562 // frame handling, so frame handling is all done in the Ideal world with | |
563 // occasional callbacks to the machine model for important info. | |
564 class MachProjNode : public ProjNode { | |
565 public: | |
3842 | 566 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { |
567 init_class_id(Class_MachProj); | |
568 } | |
0 | 569 RegMask _rout; |
570 const uint _ideal_reg; | |
571 enum projType { | |
572 unmatched_proj = 0, // Projs for Control, I/O, memory not matched | |
573 fat_proj = 999 // Projs killing many regs, defined by _rout | |
574 }; | |
575 virtual int Opcode() const; | |
576 virtual const Type *bottom_type() const; | |
577 virtual const TypePtr *adr_type() const; | |
578 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } | |
579 virtual const RegMask &out_RegMask() const { return _rout; } | |
580 virtual uint ideal_reg() const { return _ideal_reg; } | |
581 // Need size_of() for virtual ProjNode::clone() | |
582 virtual uint size_of() const { return sizeof(MachProjNode); } | |
583 #ifndef PRODUCT | |
584 virtual void dump_spec(outputStream *st) const; | |
585 #endif | |
586 }; | |
587 | |
588 //------------------------------MachIfNode------------------------------------- | |
589 // Machine-specific versions of IfNodes | |
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590 class MachIfNode : public MachBranchNode { |
0 | 591 virtual uint size_of() const { return sizeof(*this); } // Size is bigger |
592 public: | |
593 float _prob; // Probability branch goes either way | |
594 float _fcnt; // Frequency counter | |
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595 MachIfNode() : MachBranchNode() { |
0 | 596 init_class_id(Class_MachIf); |
597 } | |
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598 // Negate conditional branches. |
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599 virtual void negate() = 0; |
0 | 600 #ifndef PRODUCT |
601 virtual void dump_spec(outputStream *st) const; | |
602 #endif | |
603 }; | |
604 | |
3842 | 605 //------------------------------MachGotoNode----------------------------------- |
606 // Machine-specific versions of GotoNodes | |
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607 class MachGotoNode : public MachBranchNode { |
3842 | 608 public: |
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609 MachGotoNode() : MachBranchNode() { |
3842 | 610 init_class_id(Class_MachGoto); |
611 } | |
612 }; | |
613 | |
0 | 614 //------------------------------MachFastLockNode------------------------------------- |
615 // Machine-specific versions of FastLockNodes | |
616 class MachFastLockNode : public MachNode { | |
617 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
618 public: | |
619 BiasedLockingCounters* _counters; | |
620 | |
621 MachFastLockNode() : MachNode() {} | |
622 }; | |
623 | |
624 //------------------------------MachReturnNode-------------------------------- | |
625 // Machine-specific versions of subroutine returns | |
626 class MachReturnNode : public MachNode { | |
627 virtual uint size_of() const; // Size is bigger | |
628 public: | |
629 RegMask *_in_rms; // Input register masks, set during allocation | |
630 ReallocMark _nesting; // assertion check for reallocations | |
631 const TypePtr* _adr_type; // memory effects of call or return | |
632 MachReturnNode() : MachNode() { | |
633 init_class_id(Class_MachReturn); | |
634 _adr_type = TypePtr::BOTTOM; // the default: all of memory | |
635 } | |
636 | |
637 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } | |
638 | |
639 virtual const RegMask &in_RegMask(uint) const; | |
640 virtual bool pinned() const { return true; }; | |
641 virtual const TypePtr *adr_type() const; | |
642 }; | |
643 | |
644 //------------------------------MachSafePointNode----------------------------- | |
645 // Machine-specific versions of safepoints | |
646 class MachSafePointNode : public MachReturnNode { | |
647 public: | |
648 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC | |
649 JVMState* _jvms; // Pointer to list of JVM State Objects | |
650 uint _jvmadj; // Extra delta to jvms indexes (mach. args) | |
651 OopMap* oop_map() const { return _oop_map; } | |
652 void set_oop_map(OopMap* om) { _oop_map = om; } | |
653 | |
654 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { | |
655 init_class_id(Class_MachSafePoint); | |
656 } | |
657 | |
658 virtual JVMState* jvms() const { return _jvms; } | |
659 void set_jvms(JVMState* s) { | |
660 _jvms = s; | |
661 } | |
662 virtual const Type *bottom_type() const; | |
663 | |
664 virtual const RegMask &in_RegMask(uint) const; | |
665 | |
666 // Functionality from old debug nodes | |
667 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } | |
668 Node *frameptr () const { return in(TypeFunc::FramePtr); } | |
669 | |
670 Node *local(const JVMState* jvms, uint idx) const { | |
671 assert(verify_jvms(jvms), "jvms must match"); | |
672 return in(_jvmadj + jvms->locoff() + idx); | |
673 } | |
674 Node *stack(const JVMState* jvms, uint idx) const { | |
675 assert(verify_jvms(jvms), "jvms must match"); | |
676 return in(_jvmadj + jvms->stkoff() + idx); | |
677 } | |
678 Node *monitor_obj(const JVMState* jvms, uint idx) const { | |
679 assert(verify_jvms(jvms), "jvms must match"); | |
680 return in(_jvmadj + jvms->monitor_obj_offset(idx)); | |
681 } | |
682 Node *monitor_box(const JVMState* jvms, uint idx) const { | |
683 assert(verify_jvms(jvms), "jvms must match"); | |
684 return in(_jvmadj + jvms->monitor_box_offset(idx)); | |
685 } | |
686 void set_local(const JVMState* jvms, uint idx, Node *c) { | |
687 assert(verify_jvms(jvms), "jvms must match"); | |
688 set_req(_jvmadj + jvms->locoff() + idx, c); | |
689 } | |
690 void set_stack(const JVMState* jvms, uint idx, Node *c) { | |
691 assert(verify_jvms(jvms), "jvms must match"); | |
692 set_req(_jvmadj + jvms->stkoff() + idx, c); | |
693 } | |
694 void set_monitor(const JVMState* jvms, uint idx, Node *c) { | |
695 assert(verify_jvms(jvms), "jvms must match"); | |
696 set_req(_jvmadj + jvms->monoff() + idx, c); | |
697 } | |
698 }; | |
699 | |
700 //------------------------------MachCallNode---------------------------------- | |
701 // Machine-specific versions of subroutine calls | |
702 class MachCallNode : public MachSafePointNode { | |
703 protected: | |
704 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash | |
705 virtual uint cmp( const Node &n ) const; | |
706 virtual uint size_of() const = 0; // Size is bigger | |
707 public: | |
708 const TypeFunc *_tf; // Function type | |
709 address _entry_point; // Address of the method being called | |
710 float _cnt; // Estimate of number of times called | |
711 uint _argsize; // Size of argument block on stack | |
712 | |
713 const TypeFunc* tf() const { return _tf; } | |
714 const address entry_point() const { return _entry_point; } | |
715 const float cnt() const { return _cnt; } | |
716 uint argsize() const { return _argsize; } | |
717 | |
718 void set_tf(const TypeFunc* tf) { _tf = tf; } | |
719 void set_entry_point(address p) { _entry_point = p; } | |
720 void set_cnt(float c) { _cnt = c; } | |
721 void set_argsize(int s) { _argsize = s; } | |
722 | |
723 MachCallNode() : MachSafePointNode() { | |
724 init_class_id(Class_MachCall); | |
725 } | |
726 | |
727 virtual const Type *bottom_type() const; | |
728 virtual bool pinned() const { return false; } | |
729 virtual const Type *Value( PhaseTransform *phase ) const; | |
730 virtual const RegMask &in_RegMask(uint) const; | |
731 virtual int ret_addr_offset() { return 0; } | |
732 | |
733 bool returns_long() const { return tf()->return_type() == T_LONG; } | |
734 bool return_value_is_used() const; | |
735 #ifndef PRODUCT | |
736 virtual void dump_spec(outputStream *st) const; | |
737 #endif | |
738 }; | |
739 | |
740 //------------------------------MachCallJavaNode------------------------------ | |
741 // "Base" class for machine-specific versions of subroutine calls | |
742 class MachCallJavaNode : public MachCallNode { | |
743 protected: | |
744 virtual uint cmp( const Node &n ) const; | |
745 virtual uint size_of() const; // Size is bigger | |
746 public: | |
747 ciMethod* _method; // Method being direct called | |
748 int _bci; // Byte Code index of call byte code | |
749 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual | |
1137 | 750 bool _method_handle_invoke; // Tells if the call has to preserve SP |
0 | 751 MachCallJavaNode() : MachCallNode() { |
752 init_class_id(Class_MachCallJava); | |
753 } | |
1137 | 754 |
755 virtual const RegMask &in_RegMask(uint) const; | |
756 | |
0 | 757 #ifndef PRODUCT |
758 virtual void dump_spec(outputStream *st) const; | |
759 #endif | |
760 }; | |
761 | |
762 //------------------------------MachCallStaticJavaNode------------------------ | |
763 // Machine-specific versions of monomorphic subroutine calls | |
764 class MachCallStaticJavaNode : public MachCallJavaNode { | |
765 virtual uint cmp( const Node &n ) const; | |
766 virtual uint size_of() const; // Size is bigger | |
767 public: | |
768 const char *_name; // Runtime wrapper name | |
769 MachCallStaticJavaNode() : MachCallJavaNode() { | |
770 init_class_id(Class_MachCallStaticJava); | |
771 } | |
772 | |
773 // If this is an uncommon trap, return the request code, else zero. | |
774 int uncommon_trap_request() const; | |
775 | |
776 virtual int ret_addr_offset(); | |
777 #ifndef PRODUCT | |
778 virtual void dump_spec(outputStream *st) const; | |
779 void dump_trap_args(outputStream *st) const; | |
780 #endif | |
781 }; | |
782 | |
783 //------------------------------MachCallDynamicJavaNode------------------------ | |
784 // Machine-specific versions of possibly megamorphic subroutine calls | |
785 class MachCallDynamicJavaNode : public MachCallJavaNode { | |
786 public: | |
787 int _vtable_index; | |
788 MachCallDynamicJavaNode() : MachCallJavaNode() { | |
789 init_class_id(Class_MachCallDynamicJava); | |
790 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized | |
791 } | |
792 virtual int ret_addr_offset(); | |
793 #ifndef PRODUCT | |
794 virtual void dump_spec(outputStream *st) const; | |
795 #endif | |
796 }; | |
797 | |
798 //------------------------------MachCallRuntimeNode---------------------------- | |
799 // Machine-specific versions of subroutine calls | |
800 class MachCallRuntimeNode : public MachCallNode { | |
801 virtual uint cmp( const Node &n ) const; | |
802 virtual uint size_of() const; // Size is bigger | |
803 public: | |
804 const char *_name; // Printable name, if _method is NULL | |
805 MachCallRuntimeNode() : MachCallNode() { | |
806 init_class_id(Class_MachCallRuntime); | |
807 } | |
808 virtual int ret_addr_offset(); | |
809 #ifndef PRODUCT | |
810 virtual void dump_spec(outputStream *st) const; | |
811 #endif | |
812 }; | |
813 | |
814 class MachCallLeafNode: public MachCallRuntimeNode { | |
815 public: | |
816 MachCallLeafNode() : MachCallRuntimeNode() { | |
817 init_class_id(Class_MachCallLeaf); | |
818 } | |
819 }; | |
820 | |
821 //------------------------------MachHaltNode----------------------------------- | |
822 // Machine-specific versions of halt nodes | |
823 class MachHaltNode : public MachReturnNode { | |
824 public: | |
825 virtual JVMState* jvms() const; | |
826 }; | |
827 | |
828 | |
829 //------------------------------MachTempNode----------------------------------- | |
830 // Node used by the adlc to construct inputs to represent temporary registers | |
831 class MachTempNode : public MachNode { | |
832 private: | |
833 MachOper *_opnd_array[1]; | |
834 | |
835 public: | |
836 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } | |
837 virtual uint rule() const { return 9999999; } | |
838 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} | |
839 | |
840 MachTempNode(MachOper* oper) { | |
841 init_class_id(Class_MachTemp); | |
842 _num_opnds = 1; | |
843 _opnds = _opnd_array; | |
844 add_req(NULL); | |
845 _opnds[0] = oper; | |
846 } | |
847 virtual uint size_of() const { return sizeof(MachTempNode); } | |
848 | |
849 #ifndef PRODUCT | |
850 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} | |
851 virtual const char *Name() const { return "MachTemp";} | |
852 #endif | |
853 }; | |
854 | |
855 | |
856 | |
857 //------------------------------labelOper-------------------------------------- | |
858 // Machine-independent version of label operand | |
859 class labelOper : public MachOper { | |
860 private: | |
861 virtual uint num_edges() const { return 0; } | |
862 public: | |
863 // Supported for fixed size branches | |
864 Label* _label; // Label for branch(es) | |
865 | |
866 uint _block_num; | |
867 | |
868 labelOper() : _block_num(0), _label(0) {} | |
869 | |
870 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} | |
871 | |
872 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} | |
873 | |
874 virtual MachOper *clone(Compile* C) const; | |
875 | |
3839 | 876 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } |
0 | 877 |
878 virtual uint opcode() const; | |
879 | |
880 virtual uint hash() const; | |
881 virtual uint cmp( const MachOper &oper ) const; | |
882 #ifndef PRODUCT | |
883 virtual const char *Name() const { return "Label";} | |
884 | |
885 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
886 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
887 #endif | |
888 }; | |
889 | |
890 | |
891 //------------------------------methodOper-------------------------------------- | |
892 // Machine-independent version of method operand | |
893 class methodOper : public MachOper { | |
894 private: | |
895 virtual uint num_edges() const { return 0; } | |
896 public: | |
897 intptr_t _method; // Address of method | |
898 methodOper() : _method(0) {} | |
899 methodOper(intptr_t method) : _method(method) {} | |
900 | |
901 virtual MachOper *clone(Compile* C) const; | |
902 | |
903 virtual intptr_t method() const { return _method; } | |
904 | |
905 virtual uint opcode() const; | |
906 | |
907 virtual uint hash() const; | |
908 virtual uint cmp( const MachOper &oper ) const; | |
909 #ifndef PRODUCT | |
910 virtual const char *Name() const { return "Method";} | |
911 | |
912 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
913 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
914 #endif | |
915 }; | |
1972 | 916 |
917 #endif // SHARE_VM_OPTO_MACHNODE_HPP |