annotate src/share/vm/opto/lcm.cpp @ 14412:e2722a66aba7

Merge
author kvn
date Thu, 05 Sep 2013 11:04:39 -0700
parents d2907f74462e adb9a7d94cb5
children 2b8e28fdf503
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1 /*
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2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "memory/allocation.inline.hpp"
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27 #include "opto/block.hpp"
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28 #include "opto/c2compiler.hpp"
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29 #include "opto/callnode.hpp"
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30 #include "opto/cfgnode.hpp"
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31 #include "opto/machnode.hpp"
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32 #include "opto/runtime.hpp"
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33 #ifdef TARGET_ARCH_MODEL_x86_32
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34 # include "adfiles/ad_x86_32.hpp"
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35 #endif
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36 #ifdef TARGET_ARCH_MODEL_x86_64
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37 # include "adfiles/ad_x86_64.hpp"
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38 #endif
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39 #ifdef TARGET_ARCH_MODEL_sparc
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40 # include "adfiles/ad_sparc.hpp"
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41 #endif
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42 #ifdef TARGET_ARCH_MODEL_zero
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43 # include "adfiles/ad_zero.hpp"
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44 #endif
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45 #ifdef TARGET_ARCH_MODEL_arm
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46 # include "adfiles/ad_arm.hpp"
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47 #endif
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48 #ifdef TARGET_ARCH_MODEL_ppc_32
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49 # include "adfiles/ad_ppc_32.hpp"
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50 #endif
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51 #ifdef TARGET_ARCH_MODEL_ppc_64
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52 # include "adfiles/ad_ppc_64.hpp"
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53 #endif
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54
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55 // Optimization - Graph Style
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56
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57 //------------------------------implicit_null_check----------------------------
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58 // Detect implicit-null-check opportunities. Basically, find NULL checks
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59 // with suitable memory ops nearby. Use the memory op to do the NULL check.
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60 // I can generate a memory op if there is not one nearby.
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61 // The proj is the control projection for the not-null case.
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62 // The val is the pointer being checked for nullness or
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63 // decodeHeapOop_not_null node if it did not fold into address.
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64 void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowed_reasons) {
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65 // Assume if null check need for 0 offset then always needed
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66 // Intel solaris doesn't support any null checks yet and no
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67 // mechanism exists (yet) to set the switches at an os_cpu level
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68 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
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69
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70 // Make sure the ptr-is-null path appears to be uncommon!
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71 float f = end()->as_MachIf()->_prob;
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72 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
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73 if( f > PROB_UNLIKELY_MAG(4) ) return;
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74
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75 uint bidx = 0; // Capture index of value into memop
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76 bool was_store; // Memory op is a store op
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77
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78 // Get the successor block for if the test ptr is non-null
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79 Block* not_null_block; // this one goes with the proj
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80 Block* null_block;
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81 if (_nodes[_nodes.size()-1] == proj) {
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82 null_block = _succs[0];
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83 not_null_block = _succs[1];
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84 } else {
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85 assert(_nodes[_nodes.size()-2] == proj, "proj is one or the other");
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86 not_null_block = _succs[0];
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87 null_block = _succs[1];
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88 }
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89 while (null_block->is_Empty() == Block::empty_with_goto) {
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90 null_block = null_block->_succs[0];
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91 }
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93 // Search the exception block for an uncommon trap.
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94 // (See Parse::do_if and Parse::do_ifnull for the reason
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95 // we need an uncommon trap. Briefly, we need a way to
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96 // detect failure of this optimization, as in 6366351.)
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97 {
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98 bool found_trap = false;
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99 for (uint i1 = 0; i1 < null_block->_nodes.size(); i1++) {
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100 Node* nn = null_block->_nodes[i1];
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101 if (nn->is_MachCall() &&
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102 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
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103 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
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104 if (trtype->isa_int() && trtype->is_int()->is_con()) {
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105 jint tr_con = trtype->is_int()->get_con();
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106 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
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107 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
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108 assert((int)reason < (int)BitsPerInt, "recode bit map");
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109 if (is_set_nth_bit(allowed_reasons, (int) reason)
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110 && action != Deoptimization::Action_none) {
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111 // This uncommon trap is sure to recompile, eventually.
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112 // When that happens, C->too_many_traps will prevent
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113 // this transformation from happening again.
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114 found_trap = true;
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115 }
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116 }
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117 break;
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118 }
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119 }
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120 if (!found_trap) {
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121 // We did not find an uncommon trap.
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122 return;
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123 }
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124 }
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125
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126 // Check for decodeHeapOop_not_null node which did not fold into address
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127 bool is_decoden = ((intptr_t)val) & 1;
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128 val = (Node*)(((intptr_t)val) & ~1);
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129
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130 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
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131 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
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132
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133 // Search the successor block for a load or store who's base value is also
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134 // the tested value. There may be several.
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135 Node_List *out = new Node_List(Thread::current()->resource_area());
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136 MachNode *best = NULL; // Best found so far
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137 for (DUIterator i = val->outs(); val->has_out(i); i++) {
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138 Node *m = val->out(i);
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139 if( !m->is_Mach() ) continue;
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140 MachNode *mach = m->as_Mach();
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141 was_store = false;
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142 int iop = mach->ideal_Opcode();
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143 switch( iop ) {
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144 case Op_LoadB:
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145 case Op_LoadUB:
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146 case Op_LoadUS:
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147 case Op_LoadD:
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148 case Op_LoadF:
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149 case Op_LoadI:
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150 case Op_LoadL:
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151 case Op_LoadP:
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152 case Op_LoadN:
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153 case Op_LoadS:
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154 case Op_LoadKlass:
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155 case Op_LoadNKlass:
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156 case Op_LoadRange:
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157 case Op_LoadD_unaligned:
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158 case Op_LoadL_unaligned:
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159 assert(mach->in(2) == val, "should be address");
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160 break;
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161 case Op_StoreB:
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162 case Op_StoreC:
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163 case Op_StoreCM:
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164 case Op_StoreD:
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165 case Op_StoreF:
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166 case Op_StoreI:
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167 case Op_StoreL:
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168 case Op_StoreP:
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169 case Op_StoreN:
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170 case Op_StoreNKlass:
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171 was_store = true; // Memory op is a store op
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172 // Stores will have their address in slot 2 (memory in slot 1).
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173 // If the value being nul-checked is in another slot, it means we
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174 // are storing the checked value, which does NOT check the value!
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175 if( mach->in(2) != val ) continue;
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176 break; // Found a memory op?
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177 case Op_StrComp:
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178 case Op_StrEquals:
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179 case Op_StrIndexOf:
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180 case Op_AryEq:
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181 case Op_EncodeISOArray:
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182 // Not a legit memory op for implicit null check regardless of
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183 // embedded loads
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184 continue;
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185 default: // Also check for embedded loads
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186 if( !mach->needs_anti_dependence_check() )
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187 continue; // Not an memory op; skip it
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6c9cc03d8726 6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
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parents: 1685
diff changeset
188 if( must_clone[iop] ) {
6c9cc03d8726 6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
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parents: 1685
diff changeset
189 // Do not move nodes which produce flags because
6c9cc03d8726 6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
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parents: 1685
diff changeset
190 // RA will try to clone it to place near branch and
6c9cc03d8726 6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents: 1685
diff changeset
191 // it will cause recompilation, see clone_node().
6c9cc03d8726 6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents: 1685
diff changeset
192 continue;
6c9cc03d8726 6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents: 1685
diff changeset
193 }
1151
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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diff changeset
194 {
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195 // Check that value is used in memory address in
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196 // instructions with embedded load (CmpP val1,(val2+off)).
1151
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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diff changeset
197 Node* base;
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diff changeset
198 Node* index;
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199 const MachOper* oper = mach->memory_inputs(base, index);
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200 if (oper == NULL || oper == (MachOper*)-1) {
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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diff changeset
201 continue; // Not an memory op; skip it
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
kvn
parents: 1137
diff changeset
202 }
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
kvn
parents: 1137
diff changeset
203 if (val == base ||
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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parents: 1137
diff changeset
204 val == index && val->bottom_type()->isa_narrowoop()) {
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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diff changeset
205 break; // Found it
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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parents: 1137
diff changeset
206 } else {
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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diff changeset
207 continue; // Skip it
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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parents: 1137
diff changeset
208 }
1271af4ec18c 6912517: JIT bug compiles out (and stops running) code that needs to be run. Causes NPE.
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diff changeset
209 }
0
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210 break;
a61af66fc99e Initial load
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211 }
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parents:
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212 // check if the offset is not too high for implicit exception
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213 {
a61af66fc99e Initial load
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214 intptr_t offset = 0;
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215 const TypePtr *adr_type = NULL; // Do not need this return value here
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216 const Node* base = mach->get_base_and_disp(offset, adr_type);
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217 if (base == NULL || base == NodeSentinel) {
332
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diff changeset
218 // Narrow oop address doesn't have base, only index
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diff changeset
219 if( val->bottom_type()->isa_narrowoop() &&
c792b641b8bd 6746907: Improve implicit null check generation
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diff changeset
220 MacroAssembler::needs_explicit_null_check(offset) )
c792b641b8bd 6746907: Improve implicit null check generation
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diff changeset
221 continue; // Give up if offset is beyond page size
0
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222 // cannot reason about it; is probably not implicit null exception
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223 } else {
642
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diff changeset
224 const TypePtr* tptr;
10279
70120f47d403 8014189: JVM crash with SEGV in ConnectionGraph::record_for_escape_analysis()
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diff changeset
225 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
70120f47d403 8014189: JVM crash with SEGV in ConnectionGraph::record_for_escape_analysis()
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diff changeset
226 Universe::narrow_klass_shift() == 0)) {
642
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diff changeset
227 // 32-bits narrow oop can be the base of address expressions
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228 tptr = base->get_ptr_type();
642
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229 } else {
660978a2a31a 6791178: Specialize for zero as the compressed oop vm heap base
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230 // only regular oops are expected here
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231 tptr = base->bottom_type()->is_ptr();
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232 }
0
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parents:
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233 // Give up if offset is not a compile-time constant
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parents:
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234 if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot )
a61af66fc99e Initial load
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235 continue;
a61af66fc99e Initial load
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parents:
diff changeset
236 offset += tptr->_offset; // correct if base is offseted
a61af66fc99e Initial load
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parents:
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237 if( MacroAssembler::needs_explicit_null_check(offset) )
a61af66fc99e Initial load
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238 continue; // Give up is reference is beyond 4K page size
a61af66fc99e Initial load
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parents:
diff changeset
239 }
a61af66fc99e Initial load
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parents:
diff changeset
240 }
a61af66fc99e Initial load
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parents:
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241
a61af66fc99e Initial load
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242 // Check ctrl input to see if the null-check dominates the memory op
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diff changeset
243 Block *cb = cfg->get_block_for_node(mach);
0
a61af66fc99e Initial load
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parents:
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244 cb = cb->_idom; // Always hoist at least 1 block
a61af66fc99e Initial load
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parents:
diff changeset
245 if( !was_store ) { // Stores can be hoisted only one block
a61af66fc99e Initial load
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parents:
diff changeset
246 while( cb->_dom_depth > (_dom_depth + 1))
a61af66fc99e Initial load
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247 cb = cb->_idom; // Hoist loads as far as we want
a61af66fc99e Initial load
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parents:
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248 // The non-null-block should dominate the memory op, too. Live
a61af66fc99e Initial load
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parents:
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249 // range spilling will insert a spill in the non-null-block if it is
a61af66fc99e Initial load
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parents:
diff changeset
250 // needs to spill the memory op for an implicit null check.
a61af66fc99e Initial load
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parents:
diff changeset
251 if (cb->_dom_depth == (_dom_depth + 1)) {
a61af66fc99e Initial load
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parents:
diff changeset
252 if (cb != not_null_block) continue;
a61af66fc99e Initial load
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parents:
diff changeset
253 cb = cb->_idom;
a61af66fc99e Initial load
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parents:
diff changeset
254 }
a61af66fc99e Initial load
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parents:
diff changeset
255 }
a61af66fc99e Initial load
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parents:
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256 if( cb != this ) continue;
a61af66fc99e Initial load
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257
a61af66fc99e Initial load
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parents:
diff changeset
258 // Found a memory user; see if it can be hoisted to check-block
a61af66fc99e Initial load
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parents:
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259 uint vidx = 0; // Capture index of value into memop
a61af66fc99e Initial load
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parents:
diff changeset
260 uint j;
a61af66fc99e Initial load
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parents:
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261 for( j = mach->req()-1; j > 0; j-- ) {
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diff changeset
262 if( mach->in(j) == val ) {
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
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parents: 1151
diff changeset
263 vidx = j;
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
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parents: 1151
diff changeset
264 // Ignore DecodeN val which could be hoisted to where needed.
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
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parents: 1151
diff changeset
265 if( is_decoden ) continue;
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
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diff changeset
266 }
0
a61af66fc99e Initial load
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parents:
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267 // Block of memory-op input
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diff changeset
268 Block *inb = cfg->get_block_for_node(mach->in(j));
0
a61af66fc99e Initial load
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parents:
diff changeset
269 Block *b = this; // Start from nul check
a61af66fc99e Initial load
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parents:
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270 while( b != inb && b->_dom_depth > inb->_dom_depth )
a61af66fc99e Initial load
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parents:
diff changeset
271 b = b->_idom; // search upwards for input
a61af66fc99e Initial load
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parents:
diff changeset
272 // See if input dominates null check
a61af66fc99e Initial load
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parents:
diff changeset
273 if( b != inb )
a61af66fc99e Initial load
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parents:
diff changeset
274 break;
a61af66fc99e Initial load
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parents:
diff changeset
275 }
a61af66fc99e Initial load
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parents:
diff changeset
276 if( j > 0 )
a61af66fc99e Initial load
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parents:
diff changeset
277 continue;
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
278 Block *mb = cfg->get_block_for_node(mach);
0
a61af66fc99e Initial load
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parents:
diff changeset
279 // Hoisting stores requires more checks for the anti-dependence case.
a61af66fc99e Initial load
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parents:
diff changeset
280 // Give up hoisting if we have to move the store past any load.
a61af66fc99e Initial load
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parents:
diff changeset
281 if( was_store ) {
a61af66fc99e Initial load
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parents:
diff changeset
282 Block *b = mb; // Start searching here for a local load
a61af66fc99e Initial load
duke
parents:
diff changeset
283 // mach use (faulting) trying to hoist
a61af66fc99e Initial load
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parents:
diff changeset
284 // n might be blocker to hoisting
a61af66fc99e Initial load
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parents:
diff changeset
285 while( b != this ) {
a61af66fc99e Initial load
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parents:
diff changeset
286 uint k;
a61af66fc99e Initial load
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parents:
diff changeset
287 for( k = 1; k < b->_nodes.size(); k++ ) {
a61af66fc99e Initial load
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parents:
diff changeset
288 Node *n = b->_nodes[k];
a61af66fc99e Initial load
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parents:
diff changeset
289 if( n->needs_anti_dependence_check() &&
a61af66fc99e Initial load
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parents:
diff changeset
290 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
a61af66fc99e Initial load
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parents:
diff changeset
291 break; // Found anti-dependent load
a61af66fc99e Initial load
duke
parents:
diff changeset
292 }
a61af66fc99e Initial load
duke
parents:
diff changeset
293 if( k < b->_nodes.size() )
a61af66fc99e Initial load
duke
parents:
diff changeset
294 break; // Found anti-dependent load
a61af66fc99e Initial load
duke
parents:
diff changeset
295 // Make sure control does not do a merge (would have to check allpaths)
a61af66fc99e Initial load
duke
parents:
diff changeset
296 if( b->num_preds() != 2 ) break;
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
297 b = cfg->get_block_for_node(b->pred(1)); // Move up to predecessor block
0
a61af66fc99e Initial load
duke
parents:
diff changeset
298 }
a61af66fc99e Initial load
duke
parents:
diff changeset
299 if( b != this ) continue;
a61af66fc99e Initial load
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parents:
diff changeset
300 }
a61af66fc99e Initial load
duke
parents:
diff changeset
301
a61af66fc99e Initial load
duke
parents:
diff changeset
302 // Make sure this memory op is not already being used for a NullCheck
a61af66fc99e Initial load
duke
parents:
diff changeset
303 Node *e = mb->end();
a61af66fc99e Initial load
duke
parents:
diff changeset
304 if( e->is_MachNullCheck() && e->in(1) == mach )
a61af66fc99e Initial load
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parents:
diff changeset
305 continue; // Already being used as a NULL check
a61af66fc99e Initial load
duke
parents:
diff changeset
306
a61af66fc99e Initial load
duke
parents:
diff changeset
307 // Found a candidate! Pick one with least dom depth - the highest
a61af66fc99e Initial load
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parents:
diff changeset
308 // in the dom tree should be closest to the null check.
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
309 if (best == NULL || cfg->get_block_for_node(mach)->_dom_depth < cfg->get_block_for_node(best)->_dom_depth) {
0
a61af66fc99e Initial load
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parents:
diff changeset
310 best = mach;
a61af66fc99e Initial load
duke
parents:
diff changeset
311 bidx = vidx;
a61af66fc99e Initial load
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parents:
diff changeset
312 }
a61af66fc99e Initial load
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parents:
diff changeset
313 }
a61af66fc99e Initial load
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parents:
diff changeset
314 // No candidate!
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
315 if (best == NULL) {
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
316 return;
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
317 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
318
a61af66fc99e Initial load
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parents:
diff changeset
319 // ---- Found an implicit null check
a61af66fc99e Initial load
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parents:
diff changeset
320 extern int implicit_null_checks;
a61af66fc99e Initial load
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parents:
diff changeset
321 implicit_null_checks++;
a61af66fc99e Initial load
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parents:
diff changeset
322
1575
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
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parents: 1151
diff changeset
323 if( is_decoden ) {
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
324 // Check if we need to hoist decodeHeapOop_not_null first.
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
325 Block *valb = cfg->get_block_for_node(val);
1575
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
326 if( this != valb && this->_dom_depth < valb->_dom_depth ) {
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
327 // Hoist it up to the end of the test block.
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
328 valb->find_remove(val);
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
329 this->add_inst(val);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
330 cfg->map_node_to_block(val, this);
1575
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
331 // DecodeN on x86 may kill flags. Check for flag-killing projections
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
332 // that also need to be hoisted.
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
333 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
334 Node* n = val->fast_out(j);
3842
c7b60b601eb4 7069452: Cleanup NodeFlags
kvn
parents: 3796
diff changeset
335 if( n->is_MachProj() ) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
336 cfg->get_block_for_node(n)->find_remove(n);
1575
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
337 this->add_inst(n);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
338 cfg->map_node_to_block(n, this);
1575
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
339 }
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
340 }
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
341 }
3657cb01ffc5 6954029: Improve implicit null check generation with compressed oops
kvn
parents: 1151
diff changeset
342 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
343 // Hoist the memory candidate up to the end of the test block.
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
344 Block *old_block = cfg->get_block_for_node(best);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
345 old_block->find_remove(best);
a61af66fc99e Initial load
duke
parents:
diff changeset
346 add_inst(best);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
347 cfg->map_node_to_block(best, this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
348
a61af66fc99e Initial load
duke
parents:
diff changeset
349 // Move the control dependence
a61af66fc99e Initial load
duke
parents:
diff changeset
350 if (best->in(0) && best->in(0) == old_block->_nodes[0])
a61af66fc99e Initial load
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parents:
diff changeset
351 best->set_req(0, _nodes[0]);
a61af66fc99e Initial load
duke
parents:
diff changeset
352
a61af66fc99e Initial load
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parents:
diff changeset
353 // Check for flag-killing projections that also need to be hoisted
a61af66fc99e Initial load
duke
parents:
diff changeset
354 // Should be DU safe because no edge updates.
a61af66fc99e Initial load
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parents:
diff changeset
355 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
a61af66fc99e Initial load
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parents:
diff changeset
356 Node* n = best->fast_out(j);
3842
c7b60b601eb4 7069452: Cleanup NodeFlags
kvn
parents: 3796
diff changeset
357 if( n->is_MachProj() ) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
358 cfg->get_block_for_node(n)->find_remove(n);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
359 add_inst(n);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
360 cfg->map_node_to_block(n, this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
361 }
a61af66fc99e Initial load
duke
parents:
diff changeset
362 }
a61af66fc99e Initial load
duke
parents:
diff changeset
363
a61af66fc99e Initial load
duke
parents:
diff changeset
364 Compile *C = cfg->C;
a61af66fc99e Initial load
duke
parents:
diff changeset
365 // proj==Op_True --> ne test; proj==Op_False --> eq test.
a61af66fc99e Initial load
duke
parents:
diff changeset
366 // One of two graph shapes got matched:
a61af66fc99e Initial load
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parents:
diff changeset
367 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
a61af66fc99e Initial load
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parents:
diff changeset
368 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
a61af66fc99e Initial load
duke
parents:
diff changeset
369 // NULL checks are always branch-if-eq. If we see a IfTrue projection
a61af66fc99e Initial load
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parents:
diff changeset
370 // then we are replacing a 'ne' test with a 'eq' NULL check test.
a61af66fc99e Initial load
duke
parents:
diff changeset
371 // We need to flip the projections to keep the same semantics.
a61af66fc99e Initial load
duke
parents:
diff changeset
372 if( proj->Opcode() == Op_IfTrue ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
373 // Swap order of projections in basic block to swap branch targets
a61af66fc99e Initial load
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parents:
diff changeset
374 Node *tmp1 = _nodes[end_idx()+1];
a61af66fc99e Initial load
duke
parents:
diff changeset
375 Node *tmp2 = _nodes[end_idx()+2];
a61af66fc99e Initial load
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parents:
diff changeset
376 _nodes.map(end_idx()+1, tmp2);
a61af66fc99e Initial load
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parents:
diff changeset
377 _nodes.map(end_idx()+2, tmp1);
6804
e626685e9f6c 7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents: 6179
diff changeset
378 Node *tmp = new (C) Node(C->top()); // Use not NULL input
0
a61af66fc99e Initial load
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parents:
diff changeset
379 tmp1->replace_by(tmp);
a61af66fc99e Initial load
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parents:
diff changeset
380 tmp2->replace_by(tmp1);
a61af66fc99e Initial load
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parents:
diff changeset
381 tmp->replace_by(tmp2);
a61af66fc99e Initial load
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parents:
diff changeset
382 tmp->destruct();
a61af66fc99e Initial load
duke
parents:
diff changeset
383 }
a61af66fc99e Initial load
duke
parents:
diff changeset
384
a61af66fc99e Initial load
duke
parents:
diff changeset
385 // Remove the existing null check; use a new implicit null check instead.
a61af66fc99e Initial load
duke
parents:
diff changeset
386 // Since schedule-local needs precise def-use info, we need to correct
a61af66fc99e Initial load
duke
parents:
diff changeset
387 // it as well.
a61af66fc99e Initial load
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parents:
diff changeset
388 Node *old_tst = proj->in(0);
a61af66fc99e Initial load
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parents:
diff changeset
389 MachNode *nul_chk = new (C) MachNullCheckNode(old_tst->in(0),best,bidx);
a61af66fc99e Initial load
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parents:
diff changeset
390 _nodes.map(end_idx(),nul_chk);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
391 cfg->map_node_to_block(nul_chk, this);
0
a61af66fc99e Initial load
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parents:
diff changeset
392 // Redirect users of old_test to nul_chk
a61af66fc99e Initial load
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parents:
diff changeset
393 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
a61af66fc99e Initial load
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parents:
diff changeset
394 old_tst->last_out(i2)->set_req(0, nul_chk);
a61af66fc99e Initial load
duke
parents:
diff changeset
395 // Clean-up any dead code
a61af66fc99e Initial load
duke
parents:
diff changeset
396 for (uint i3 = 0; i3 < old_tst->req(); i3++)
a61af66fc99e Initial load
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parents:
diff changeset
397 old_tst->set_req(i3, NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
398
a61af66fc99e Initial load
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parents:
diff changeset
399 cfg->latency_from_uses(nul_chk);
a61af66fc99e Initial load
duke
parents:
diff changeset
400 cfg->latency_from_uses(best);
a61af66fc99e Initial load
duke
parents:
diff changeset
401 }
a61af66fc99e Initial load
duke
parents:
diff changeset
402
a61af66fc99e Initial load
duke
parents:
diff changeset
403
a61af66fc99e Initial load
duke
parents:
diff changeset
404 //------------------------------select-----------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
405 // Select a nice fellow from the worklist to schedule next. If there is only
a61af66fc99e Initial load
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parents:
diff changeset
406 // one choice, then use it. Projections take top priority for correctness
a61af66fc99e Initial load
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parents:
diff changeset
407 // reasons - if I see a projection, then it is next. There are a number of
a61af66fc99e Initial load
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parents:
diff changeset
408 // other special cases, for instructions that consume condition codes, et al.
a61af66fc99e Initial load
duke
parents:
diff changeset
409 // These are chosen immediately. Some instructions are required to immediately
a61af66fc99e Initial load
duke
parents:
diff changeset
410 // precede the last instruction in the block, and these are taken last. Of the
a61af66fc99e Initial load
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parents:
diff changeset
411 // remaining cases (most), choose the instruction with the greatest latency
a61af66fc99e Initial load
duke
parents:
diff changeset
412 // (that is, the most number of pseudo-cycles required to the end of the
a61af66fc99e Initial load
duke
parents:
diff changeset
413 // routine). If there is a tie, choose the instruction with the most inputs.
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
414 Node *Block::select(PhaseCFG *cfg, Node_List &worklist, GrowableArray<int> &ready_cnt, VectorSet &next_call, uint sched_slot) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
415
a61af66fc99e Initial load
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parents:
diff changeset
416 // If only a single entry on the stack, use it
a61af66fc99e Initial load
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parents:
diff changeset
417 uint cnt = worklist.size();
a61af66fc99e Initial load
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parents:
diff changeset
418 if (cnt == 1) {
a61af66fc99e Initial load
duke
parents:
diff changeset
419 Node *n = worklist[0];
a61af66fc99e Initial load
duke
parents:
diff changeset
420 worklist.map(0,worklist.pop());
a61af66fc99e Initial load
duke
parents:
diff changeset
421 return n;
a61af66fc99e Initial load
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parents:
diff changeset
422 }
a61af66fc99e Initial load
duke
parents:
diff changeset
423
a61af66fc99e Initial load
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parents:
diff changeset
424 uint choice = 0; // Bigger is most important
a61af66fc99e Initial load
duke
parents:
diff changeset
425 uint latency = 0; // Bigger is scheduled first
a61af66fc99e Initial load
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parents:
diff changeset
426 uint score = 0; // Bigger is better
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
427 int idx = -1; // Index in worklist
8691
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
428 int cand_cnt = 0; // Candidate count
0
a61af66fc99e Initial load
duke
parents:
diff changeset
429
a61af66fc99e Initial load
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parents:
diff changeset
430 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
431 // Order in worklist is used to break ties.
a61af66fc99e Initial load
duke
parents:
diff changeset
432 // See caller for how this is used to delay scheduling
a61af66fc99e Initial load
duke
parents:
diff changeset
433 // of induction variable increments to after the other
a61af66fc99e Initial load
duke
parents:
diff changeset
434 // uses of the phi are scheduled.
a61af66fc99e Initial load
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parents:
diff changeset
435 Node *n = worklist[i]; // Get Node on worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
436
a61af66fc99e Initial load
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parents:
diff changeset
437 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
a61af66fc99e Initial load
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parents:
diff changeset
438 if( n->is_Proj() || // Projections always win
a61af66fc99e Initial load
duke
parents:
diff changeset
439 n->Opcode()== Op_Con || // So does constant 'Top'
a61af66fc99e Initial load
duke
parents:
diff changeset
440 iop == Op_CreateEx || // Create-exception must start block
a61af66fc99e Initial load
duke
parents:
diff changeset
441 iop == Op_CheckCastPP
a61af66fc99e Initial load
duke
parents:
diff changeset
442 ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
443 worklist.map(i,worklist.pop());
a61af66fc99e Initial load
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parents:
diff changeset
444 return n;
a61af66fc99e Initial load
duke
parents:
diff changeset
445 }
a61af66fc99e Initial load
duke
parents:
diff changeset
446
a61af66fc99e Initial load
duke
parents:
diff changeset
447 // Final call in a block must be adjacent to 'catch'
a61af66fc99e Initial load
duke
parents:
diff changeset
448 Node *e = end();
a61af66fc99e Initial load
duke
parents:
diff changeset
449 if( e->is_Catch() && e->in(0)->in(0) == n )
a61af66fc99e Initial load
duke
parents:
diff changeset
450 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
451
a61af66fc99e Initial load
duke
parents:
diff changeset
452 // Memory op for an implicit null check has to be at the end of the block
a61af66fc99e Initial load
duke
parents:
diff changeset
453 if( e->is_MachNullCheck() && e->in(1) == n )
a61af66fc99e Initial load
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parents:
diff changeset
454 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
455
6179
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4820
diff changeset
456 // Schedule IV increment last.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4820
diff changeset
457 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd &&
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4820
diff changeset
458 e->in(1)->in(1) == n && n->is_iteratively_computed())
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4820
diff changeset
459 continue;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits
kvn
parents: 4820
diff changeset
460
0
a61af66fc99e Initial load
duke
parents:
diff changeset
461 uint n_choice = 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
462
a61af66fc99e Initial load
duke
parents:
diff changeset
463 // See if this instruction is consumed by a branch. If so, then (as the
a61af66fc99e Initial load
duke
parents:
diff changeset
464 // branch is the last instruction in the basic block) force it to the
a61af66fc99e Initial load
duke
parents:
diff changeset
465 // end of the basic block
a61af66fc99e Initial load
duke
parents:
diff changeset
466 if ( must_clone[iop] ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
467 // See if any use is a branch
a61af66fc99e Initial load
duke
parents:
diff changeset
468 bool found_machif = false;
a61af66fc99e Initial load
duke
parents:
diff changeset
469
a61af66fc99e Initial load
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parents:
diff changeset
470 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
471 Node* use = n->fast_out(j);
a61af66fc99e Initial load
duke
parents:
diff changeset
472
a61af66fc99e Initial load
duke
parents:
diff changeset
473 // The use is a conditional branch, make them adjacent
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
474 if (use->is_MachIf() && cfg->get_block_for_node(use) == this) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
475 found_machif = true;
a61af66fc99e Initial load
duke
parents:
diff changeset
476 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
477 }
a61af66fc99e Initial load
duke
parents:
diff changeset
478
a61af66fc99e Initial load
duke
parents:
diff changeset
479 // More than this instruction pending for successor to be ready,
a61af66fc99e Initial load
duke
parents:
diff changeset
480 // don't choose this if other opportunities are ready
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
481 if (ready_cnt.at(use->_idx) > 1)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
482 n_choice = 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
483 }
a61af66fc99e Initial load
duke
parents:
diff changeset
484
a61af66fc99e Initial load
duke
parents:
diff changeset
485 // loop terminated, prefer not to use this instruction
a61af66fc99e Initial load
duke
parents:
diff changeset
486 if (found_machif)
a61af66fc99e Initial load
duke
parents:
diff changeset
487 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
488 }
a61af66fc99e Initial load
duke
parents:
diff changeset
489
a61af66fc99e Initial load
duke
parents:
diff changeset
490 // See if this has a predecessor that is "must_clone", i.e. sets the
a61af66fc99e Initial load
duke
parents:
diff changeset
491 // condition code. If so, choose this first
a61af66fc99e Initial load
duke
parents:
diff changeset
492 for (uint j = 0; j < n->req() ; j++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
493 Node *inn = n->in(j);
a61af66fc99e Initial load
duke
parents:
diff changeset
494 if (inn) {
a61af66fc99e Initial load
duke
parents:
diff changeset
495 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
496 n_choice = 3;
a61af66fc99e Initial load
duke
parents:
diff changeset
497 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
498 }
a61af66fc99e Initial load
duke
parents:
diff changeset
499 }
a61af66fc99e Initial load
duke
parents:
diff changeset
500 }
a61af66fc99e Initial load
duke
parents:
diff changeset
501
a61af66fc99e Initial load
duke
parents:
diff changeset
502 // MachTemps should be scheduled last so they are near their uses
a61af66fc99e Initial load
duke
parents:
diff changeset
503 if (n->is_MachTemp()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
504 n_choice = 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
505 }
a61af66fc99e Initial load
duke
parents:
diff changeset
506
12071
adb9a7d94cb5 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 12023
diff changeset
507 uint n_latency = cfg->get_latency_for_node(n);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
508 uint n_score = n->req(); // Many inputs get high score to break ties
a61af66fc99e Initial load
duke
parents:
diff changeset
509
a61af66fc99e Initial load
duke
parents:
diff changeset
510 // Keep best latency found
8691
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
511 cand_cnt++;
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
512 if (choice < n_choice ||
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
513 (choice == n_choice &&
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
514 ((StressLCM && Compile::randomized_select(cand_cnt)) ||
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
515 (!StressLCM &&
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
516 (latency < n_latency ||
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
517 (latency == n_latency &&
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7637
diff changeset
518 (score < n_score))))))) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
519 choice = n_choice;
a61af66fc99e Initial load
duke
parents:
diff changeset
520 latency = n_latency;
a61af66fc99e Initial load
duke
parents:
diff changeset
521 score = n_score;
a61af66fc99e Initial load
duke
parents:
diff changeset
522 idx = i; // Also keep index in worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
523 }
a61af66fc99e Initial load
duke
parents:
diff changeset
524 } // End of for all ready nodes in worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
525
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
526 assert(idx >= 0, "index should be set");
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
527 Node *n = worklist[(uint)idx]; // Get the winner
0
a61af66fc99e Initial load
duke
parents:
diff changeset
528
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
529 worklist.map((uint)idx, worklist.pop()); // Compress worklist
0
a61af66fc99e Initial load
duke
parents:
diff changeset
530 return n;
a61af66fc99e Initial load
duke
parents:
diff changeset
531 }
a61af66fc99e Initial load
duke
parents:
diff changeset
532
a61af66fc99e Initial load
duke
parents:
diff changeset
533
a61af66fc99e Initial load
duke
parents:
diff changeset
534 //------------------------------set_next_call----------------------------------
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
535 void Block::set_next_call( Node *n, VectorSet &next_call, PhaseCFG* cfg) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
536 if( next_call.test_set(n->_idx) ) return;
a61af66fc99e Initial load
duke
parents:
diff changeset
537 for( uint i=0; i<n->len(); i++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
538 Node *m = n->in(i);
a61af66fc99e Initial load
duke
parents:
diff changeset
539 if( !m ) continue; // must see all nodes in block that precede call
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
540 if (cfg->get_block_for_node(m) == this) {
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
541 set_next_call(m, next_call, cfg);
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
542 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
543 }
a61af66fc99e Initial load
duke
parents:
diff changeset
544 }
a61af66fc99e Initial load
duke
parents:
diff changeset
545
a61af66fc99e Initial load
duke
parents:
diff changeset
546 //------------------------------needed_for_next_call---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
547 // Set the flag 'next_call' for each Node that is needed for the next call to
a61af66fc99e Initial load
duke
parents:
diff changeset
548 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
a61af66fc99e Initial load
duke
parents:
diff changeset
549 // next subroutine call get priority - basically it moves things NOT needed
a61af66fc99e Initial load
duke
parents:
diff changeset
550 // for the next call till after the call. This prevents me from trying to
a61af66fc99e Initial load
duke
parents:
diff changeset
551 // carry lots of stuff live across a call.
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
552 void Block::needed_for_next_call(Node *this_call, VectorSet &next_call, PhaseCFG* cfg) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
553 // Find the next control-defining Node in this block
a61af66fc99e Initial load
duke
parents:
diff changeset
554 Node* call = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
555 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
556 Node* m = this_call->fast_out(i);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
557 if(cfg->get_block_for_node(m) == this && // Local-block user
0
a61af66fc99e Initial load
duke
parents:
diff changeset
558 m != this_call && // Not self-start node
3842
c7b60b601eb4 7069452: Cleanup NodeFlags
kvn
parents: 3796
diff changeset
559 m->is_MachCall() )
0
a61af66fc99e Initial load
duke
parents:
diff changeset
560 call = m;
a61af66fc99e Initial load
duke
parents:
diff changeset
561 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
562 }
a61af66fc99e Initial load
duke
parents:
diff changeset
563 if (call == NULL) return; // No next call (e.g., block end is near)
a61af66fc99e Initial load
duke
parents:
diff changeset
564 // Set next-call for all inputs to this call
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
565 set_next_call(call, next_call, cfg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
566 }
a61af66fc99e Initial load
duke
parents:
diff changeset
567
4120
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
568 //------------------------------add_call_kills-------------------------------------
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
569 void Block::add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
570 // Fill in the kill mask for the call
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
571 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
572 if( !regs.Member(r) ) { // Not already defined by the call
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
573 // Save-on-call register?
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
574 if ((save_policy[r] == 'C') ||
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
575 (save_policy[r] == 'A') ||
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
576 ((save_policy[r] == 'E') && exclude_soe)) {
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
577 proj->_rout.Insert(r);
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
578 }
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
579 }
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
580 }
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
581 }
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
582
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
583
0
a61af66fc99e Initial load
duke
parents:
diff changeset
584 //------------------------------sched_call-------------------------------------
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
585 uint Block::sched_call( Matcher &matcher, PhaseCFG* cfg, uint node_cnt, Node_List &worklist, GrowableArray<int> &ready_cnt, MachCallNode *mcall, VectorSet &next_call ) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
586 RegMask regs;
a61af66fc99e Initial load
duke
parents:
diff changeset
587
a61af66fc99e Initial load
duke
parents:
diff changeset
588 // Schedule all the users of the call right now. All the users are
a61af66fc99e Initial load
duke
parents:
diff changeset
589 // projection Nodes, so they must be scheduled next to the call.
a61af66fc99e Initial load
duke
parents:
diff changeset
590 // Collect all the defined registers.
a61af66fc99e Initial load
duke
parents:
diff changeset
591 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
592 Node* n = mcall->fast_out(i);
3842
c7b60b601eb4 7069452: Cleanup NodeFlags
kvn
parents: 3796
diff changeset
593 assert( n->is_MachProj(), "" );
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
594 int n_cnt = ready_cnt.at(n->_idx)-1;
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
595 ready_cnt.at_put(n->_idx, n_cnt);
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
596 assert( n_cnt == 0, "" );
0
a61af66fc99e Initial load
duke
parents:
diff changeset
597 // Schedule next to call
a61af66fc99e Initial load
duke
parents:
diff changeset
598 _nodes.map(node_cnt++, n);
a61af66fc99e Initial load
duke
parents:
diff changeset
599 // Collect defined registers
a61af66fc99e Initial load
duke
parents:
diff changeset
600 regs.OR(n->out_RegMask());
a61af66fc99e Initial load
duke
parents:
diff changeset
601 // Check for scheduling the next control-definer
a61af66fc99e Initial load
duke
parents:
diff changeset
602 if( n->bottom_type() == Type::CONTROL )
a61af66fc99e Initial load
duke
parents:
diff changeset
603 // Warm up next pile of heuristic bits
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
604 needed_for_next_call(n, next_call, cfg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
605
a61af66fc99e Initial load
duke
parents:
diff changeset
606 // Children of projections are now all ready
a61af66fc99e Initial load
duke
parents:
diff changeset
607 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
608 Node* m = n->fast_out(j); // Get user
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
609 if(cfg->get_block_for_node(m) != this) {
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
610 continue;
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
611 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
612 if( m->is_Phi() ) continue;
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
613 int m_cnt = ready_cnt.at(m->_idx)-1;
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
614 ready_cnt.at_put(m->_idx, m_cnt);
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
615 if( m_cnt == 0 )
0
a61af66fc99e Initial load
duke
parents:
diff changeset
616 worklist.push(m);
a61af66fc99e Initial load
duke
parents:
diff changeset
617 }
a61af66fc99e Initial load
duke
parents:
diff changeset
618
a61af66fc99e Initial load
duke
parents:
diff changeset
619 }
a61af66fc99e Initial load
duke
parents:
diff changeset
620
a61af66fc99e Initial load
duke
parents:
diff changeset
621 // Act as if the call defines the Frame Pointer.
a61af66fc99e Initial load
duke
parents:
diff changeset
622 // Certainly the FP is alive and well after the call.
a61af66fc99e Initial load
duke
parents:
diff changeset
623 regs.Insert(matcher.c_frame_pointer());
a61af66fc99e Initial load
duke
parents:
diff changeset
624
a61af66fc99e Initial load
duke
parents:
diff changeset
625 // Set all registers killed and not already defined by the call.
a61af66fc99e Initial load
duke
parents:
diff changeset
626 uint r_cnt = mcall->tf()->range()->cnt();
a61af66fc99e Initial load
duke
parents:
diff changeset
627 int op = mcall->ideal_Opcode();
6804
e626685e9f6c 7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents: 6179
diff changeset
628 MachProjNode *proj = new (matcher.C) MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
629 cfg->map_node_to_block(proj, this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
630 _nodes.insert(node_cnt++, proj);
a61af66fc99e Initial load
duke
parents:
diff changeset
631
a61af66fc99e Initial load
duke
parents:
diff changeset
632 // Select the right register save policy.
a61af66fc99e Initial load
duke
parents:
diff changeset
633 const char * save_policy;
a61af66fc99e Initial load
duke
parents:
diff changeset
634 switch (op) {
a61af66fc99e Initial load
duke
parents:
diff changeset
635 case Op_CallRuntime:
a61af66fc99e Initial load
duke
parents:
diff changeset
636 case Op_CallLeaf:
a61af66fc99e Initial load
duke
parents:
diff changeset
637 case Op_CallLeafNoFP:
a61af66fc99e Initial load
duke
parents:
diff changeset
638 // Calling C code so use C calling convention
a61af66fc99e Initial load
duke
parents:
diff changeset
639 save_policy = matcher._c_reg_save_policy;
a61af66fc99e Initial load
duke
parents:
diff changeset
640 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
641
a61af66fc99e Initial load
duke
parents:
diff changeset
642 case Op_CallStaticJava:
a61af66fc99e Initial load
duke
parents:
diff changeset
643 case Op_CallDynamicJava:
a61af66fc99e Initial load
duke
parents:
diff changeset
644 // Calling Java code so use Java calling convention
a61af66fc99e Initial load
duke
parents:
diff changeset
645 save_policy = matcher._register_save_policy;
a61af66fc99e Initial load
duke
parents:
diff changeset
646 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
647
a61af66fc99e Initial load
duke
parents:
diff changeset
648 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
649 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
650 }
a61af66fc99e Initial load
duke
parents:
diff changeset
651
a61af66fc99e Initial load
duke
parents:
diff changeset
652 // When using CallRuntime mark SOE registers as killed by the call
a61af66fc99e Initial load
duke
parents:
diff changeset
653 // so values that could show up in the RegisterMap aren't live in a
a61af66fc99e Initial load
duke
parents:
diff changeset
654 // callee saved register since the register wouldn't know where to
a61af66fc99e Initial load
duke
parents:
diff changeset
655 // find them. CallLeaf and CallLeafNoFP are ok because they can't
a61af66fc99e Initial load
duke
parents:
diff changeset
656 // have debug info on them. Strictly speaking this only needs to be
a61af66fc99e Initial load
duke
parents:
diff changeset
657 // done for oops since idealreg2debugmask takes care of debug info
a61af66fc99e Initial load
duke
parents:
diff changeset
658 // references but there no way to handle oops differently than other
a61af66fc99e Initial load
duke
parents:
diff changeset
659 // pointers as far as the kill mask goes.
a61af66fc99e Initial load
duke
parents:
diff changeset
660 bool exclude_soe = op == Op_CallRuntime;
a61af66fc99e Initial load
duke
parents:
diff changeset
661
1137
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
662 // If the call is a MethodHandle invoke, we need to exclude the
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
663 // register which is used to save the SP value over MH invokes from
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
664 // the mask. Otherwise this register could be used for
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
665 // deoptimization information.
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
666 if (op == Op_CallStaticJava) {
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
667 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
668 if (mcallstaticjava->_method_handle_invoke)
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
669 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
670 }
97125851f396 6829187: compiler optimizations required for JSR 292
twisti
parents: 1100
diff changeset
671
4120
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
672 add_call_kills(proj, regs, save_policy, exclude_soe);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
673
a61af66fc99e Initial load
duke
parents:
diff changeset
674 return node_cnt;
a61af66fc99e Initial load
duke
parents:
diff changeset
675 }
a61af66fc99e Initial load
duke
parents:
diff changeset
676
a61af66fc99e Initial load
duke
parents:
diff changeset
677
a61af66fc99e Initial load
duke
parents:
diff changeset
678 //------------------------------schedule_local---------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
679 // Topological sort within a block. Someday become a real scheduler.
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
680 bool Block::schedule_local(PhaseCFG *cfg, Matcher &matcher, GrowableArray<int> &ready_cnt, VectorSet &next_call) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
681 // Already "sorted" are the block start Node (as the first entry), and
a61af66fc99e Initial load
duke
parents:
diff changeset
682 // the block-ending Node and any trailing control projections. We leave
a61af66fc99e Initial load
duke
parents:
diff changeset
683 // these alone. PhiNodes and ParmNodes are made to follow the block start
a61af66fc99e Initial load
duke
parents:
diff changeset
684 // Node. Everything else gets topo-sorted.
a61af66fc99e Initial load
duke
parents:
diff changeset
685
a61af66fc99e Initial load
duke
parents:
diff changeset
686 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
687 if (cfg->trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
688 tty->print_cr("# --- schedule_local B%d, before: ---", _pre_order);
a61af66fc99e Initial load
duke
parents:
diff changeset
689 for (uint i = 0;i < _nodes.size();i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
690 tty->print("# ");
a61af66fc99e Initial load
duke
parents:
diff changeset
691 _nodes[i]->fast_dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
692 }
a61af66fc99e Initial load
duke
parents:
diff changeset
693 tty->print_cr("#");
a61af66fc99e Initial load
duke
parents:
diff changeset
694 }
a61af66fc99e Initial load
duke
parents:
diff changeset
695 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
696
a61af66fc99e Initial load
duke
parents:
diff changeset
697 // RootNode is already sorted
a61af66fc99e Initial load
duke
parents:
diff changeset
698 if( _nodes.size() == 1 ) return true;
a61af66fc99e Initial load
duke
parents:
diff changeset
699
a61af66fc99e Initial load
duke
parents:
diff changeset
700 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
a61af66fc99e Initial load
duke
parents:
diff changeset
701 uint node_cnt = end_idx();
a61af66fc99e Initial load
duke
parents:
diff changeset
702 uint phi_cnt = 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
703 uint i;
a61af66fc99e Initial load
duke
parents:
diff changeset
704 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
a61af66fc99e Initial load
duke
parents:
diff changeset
705 Node *n = _nodes[i];
a61af66fc99e Initial load
duke
parents:
diff changeset
706 if( n->is_Phi() || // Found a PhiNode or ParmNode
a61af66fc99e Initial load
duke
parents:
diff changeset
707 (n->is_Proj() && n->in(0) == head()) ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
708 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
a61af66fc99e Initial load
duke
parents:
diff changeset
709 _nodes.map(i,_nodes[phi_cnt]);
a61af66fc99e Initial load
duke
parents:
diff changeset
710 _nodes.map(phi_cnt++,n); // swap Phi/Parm up front
a61af66fc99e Initial load
duke
parents:
diff changeset
711 } else { // All others
a61af66fc99e Initial load
duke
parents:
diff changeset
712 // Count block-local inputs to 'n'
a61af66fc99e Initial load
duke
parents:
diff changeset
713 uint cnt = n->len(); // Input count
a61af66fc99e Initial load
duke
parents:
diff changeset
714 uint local = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
715 for( uint j=0; j<cnt; j++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
716 Node *m = n->in(j);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
717 if( m && cfg->get_block_for_node(m) == this && !m->is_top() )
0
a61af66fc99e Initial load
duke
parents:
diff changeset
718 local++; // One more block-local input
a61af66fc99e Initial load
duke
parents:
diff changeset
719 }
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
720 ready_cnt.at_put(n->_idx, local); // Count em up
0
a61af66fc99e Initial load
duke
parents:
diff changeset
721
3248
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
722 #ifdef ASSERT
342
37f87013dfd8 6711316: Open source the Garbage-First garbage collector
ysr
parents: 125
diff changeset
723 if( UseConcMarkSweepGC || UseG1GC ) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
724 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
3248
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
725 // Check the precedence edges
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
726 for (uint prec = n->req(); prec < n->len(); prec++) {
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
727 Node* oop_store = n->in(prec);
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
728 if (oop_store != NULL) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
729 assert(cfg->get_block_for_node(oop_store)->_dom_depth <= this->_dom_depth, "oop_store must dominate card-mark");
3248
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
730 }
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
731 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
732 }
a61af66fc99e Initial load
duke
parents:
diff changeset
733 }
3248
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
734 #endif
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
735
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
736 // A few node types require changing a required edge to a precedence edge
e6beb62de02d 7032963: StoreCM shouldn't participate in store elimination
never
parents: 1972
diff changeset
737 // before allocation.
1100
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 681
diff changeset
738 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 681
diff changeset
739 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
f96a1a986f7b 6895383: JCK test throws NPE for method compiled with Escape Analysis
kvn
parents: 681
diff changeset
740 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
253
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
741 // MemBarAcquire could be created without Precedent edge.
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
742 // del_req() replaces the specified edge with the last input edge
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
743 // and then removes the last edge. If the specified edge > number of
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
744 // edges the last edge will be moved outside of the input edges array
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
745 // and the edge will be lost. This is why this code should be
b0fe4deeb9fb 6726999: nsk/stress/jck12a/jck12a010 assert(n != null,"Bad immediate dominator info.")
kvn
parents: 196
diff changeset
746 // executed only when Precedent (== TypeFunc::Parms) edge is present.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
747 Node *x = n->in(TypeFunc::Parms);
a61af66fc99e Initial load
duke
parents:
diff changeset
748 n->del_req(TypeFunc::Parms);
a61af66fc99e Initial load
duke
parents:
diff changeset
749 n->add_prec(x);
a61af66fc99e Initial load
duke
parents:
diff changeset
750 }
a61af66fc99e Initial load
duke
parents:
diff changeset
751 }
a61af66fc99e Initial load
duke
parents:
diff changeset
752 }
a61af66fc99e Initial load
duke
parents:
diff changeset
753 for(uint i2=i; i2<_nodes.size(); i2++ ) // Trailing guys get zapped count
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
754 ready_cnt.at_put(_nodes[i2]->_idx, 0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
755
a61af66fc99e Initial load
duke
parents:
diff changeset
756 // All the prescheduled guys do not hold back internal nodes
a61af66fc99e Initial load
duke
parents:
diff changeset
757 uint i3;
a61af66fc99e Initial load
duke
parents:
diff changeset
758 for(i3 = 0; i3<phi_cnt; i3++ ) { // For all pre-scheduled
a61af66fc99e Initial load
duke
parents:
diff changeset
759 Node *n = _nodes[i3]; // Get pre-scheduled
a61af66fc99e Initial load
duke
parents:
diff changeset
760 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
761 Node* m = n->fast_out(j);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
762 if (cfg->get_block_for_node(m) == this) { // Local-block user
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
763 int m_cnt = ready_cnt.at(m->_idx)-1;
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
764 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
765 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
766 }
a61af66fc99e Initial load
duke
parents:
diff changeset
767 }
a61af66fc99e Initial load
duke
parents:
diff changeset
768
a61af66fc99e Initial load
duke
parents:
diff changeset
769 Node_List delay;
a61af66fc99e Initial load
duke
parents:
diff changeset
770 // Make a worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
771 Node_List worklist;
a61af66fc99e Initial load
duke
parents:
diff changeset
772 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
773 Node *m = _nodes[i4];
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
774 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
0
a61af66fc99e Initial load
duke
parents:
diff changeset
775 if (m->is_iteratively_computed()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
776 // Push induction variable increments last to allow other uses
a61af66fc99e Initial load
duke
parents:
diff changeset
777 // of the phi to be scheduled first. The select() method breaks
a61af66fc99e Initial load
duke
parents:
diff changeset
778 // ties in scheduling by worklist order.
a61af66fc99e Initial load
duke
parents:
diff changeset
779 delay.push(m);
125
d942c7e64bd9 6601321: Assert(j == 1 || b->_nodes[j-1]->is_Phi(),"CreateEx must be first instruction in block")
never
parents: 113
diff changeset
780 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
d942c7e64bd9 6601321: Assert(j == 1 || b->_nodes[j-1]->is_Phi(),"CreateEx must be first instruction in block")
never
parents: 113
diff changeset
781 // Force the CreateEx to the top of the list so it's processed
d942c7e64bd9 6601321: Assert(j == 1 || b->_nodes[j-1]->is_Phi(),"CreateEx must be first instruction in block")
never
parents: 113
diff changeset
782 // first and ends up at the start of the block.
d942c7e64bd9 6601321: Assert(j == 1 || b->_nodes[j-1]->is_Phi(),"CreateEx must be first instruction in block")
never
parents: 113
diff changeset
783 worklist.insert(0, m);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
784 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
785 worklist.push(m); // Then on to worklist!
a61af66fc99e Initial load
duke
parents:
diff changeset
786 }
a61af66fc99e Initial load
duke
parents:
diff changeset
787 }
a61af66fc99e Initial load
duke
parents:
diff changeset
788 }
a61af66fc99e Initial load
duke
parents:
diff changeset
789 while (delay.size()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
790 Node* d = delay.pop();
a61af66fc99e Initial load
duke
parents:
diff changeset
791 worklist.push(d);
a61af66fc99e Initial load
duke
parents:
diff changeset
792 }
a61af66fc99e Initial load
duke
parents:
diff changeset
793
a61af66fc99e Initial load
duke
parents:
diff changeset
794 // Warm up the 'next_call' heuristic bits
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
795 needed_for_next_call(_nodes[0], next_call, cfg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
796
a61af66fc99e Initial load
duke
parents:
diff changeset
797 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
798 if (cfg->trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
799 for (uint j=0; j<_nodes.size(); j++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
800 Node *n = _nodes[j];
a61af66fc99e Initial load
duke
parents:
diff changeset
801 int idx = n->_idx;
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
802 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
12071
adb9a7d94cb5 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 12023
diff changeset
803 tty->print("latency:%3d ", cfg->get_latency_for_node(n));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
804 tty->print("%4d: %s\n", idx, n->Name());
a61af66fc99e Initial load
duke
parents:
diff changeset
805 }
a61af66fc99e Initial load
duke
parents:
diff changeset
806 }
a61af66fc99e Initial load
duke
parents:
diff changeset
807 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
808
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
809 uint max_idx = (uint)ready_cnt.length();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
810 // Pull from worklist and schedule
a61af66fc99e Initial load
duke
parents:
diff changeset
811 while( worklist.size() ) { // Worklist is not ready
a61af66fc99e Initial load
duke
parents:
diff changeset
812
a61af66fc99e Initial load
duke
parents:
diff changeset
813 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
814 if (cfg->trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
815 tty->print("# ready list:");
a61af66fc99e Initial load
duke
parents:
diff changeset
816 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
817 Node *n = worklist[i]; // Get Node on worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
818 tty->print(" %d", n->_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
819 }
a61af66fc99e Initial load
duke
parents:
diff changeset
820 tty->cr();
a61af66fc99e Initial load
duke
parents:
diff changeset
821 }
a61af66fc99e Initial load
duke
parents:
diff changeset
822 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
823
a61af66fc99e Initial load
duke
parents:
diff changeset
824 // Select and pop a ready guy from worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
825 Node* n = select(cfg, worklist, ready_cnt, next_call, phi_cnt);
a61af66fc99e Initial load
duke
parents:
diff changeset
826 _nodes.map(phi_cnt++,n); // Schedule him next
a61af66fc99e Initial load
duke
parents:
diff changeset
827
a61af66fc99e Initial load
duke
parents:
diff changeset
828 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
829 if (cfg->trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
830 tty->print("# select %d: %s", n->_idx, n->Name());
12071
adb9a7d94cb5 8023003: Cleanup the public interface to PhaseCFG
adlertz
parents: 12023
diff changeset
831 tty->print(", latency:%d", cfg->get_latency_for_node(n));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
832 n->dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
833 if (Verbose) {
a61af66fc99e Initial load
duke
parents:
diff changeset
834 tty->print("# ready list:");
a61af66fc99e Initial load
duke
parents:
diff changeset
835 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
836 Node *n = worklist[i]; // Get Node on worklist
a61af66fc99e Initial load
duke
parents:
diff changeset
837 tty->print(" %d", n->_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
838 }
a61af66fc99e Initial load
duke
parents:
diff changeset
839 tty->cr();
a61af66fc99e Initial load
duke
parents:
diff changeset
840 }
a61af66fc99e Initial load
duke
parents:
diff changeset
841 }
a61af66fc99e Initial load
duke
parents:
diff changeset
842
a61af66fc99e Initial load
duke
parents:
diff changeset
843 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
844 if( n->is_MachCall() ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
845 MachCallNode *mcall = n->as_MachCall();
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
846 phi_cnt = sched_call(matcher, cfg, phi_cnt, worklist, ready_cnt, mcall, next_call);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
847 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
848 }
4120
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
849
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
850 if (n->is_Mach() && n->as_Mach()->has_call()) {
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
851 RegMask regs;
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
852 regs.Insert(matcher.c_frame_pointer());
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
853 regs.OR(n->out_RegMask());
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
854
6804
e626685e9f6c 7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents: 6179
diff changeset
855 MachProjNode *proj = new (matcher.C) MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
856 cfg->map_node_to_block(proj, this);
4120
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
857 _nodes.insert(phi_cnt++, proj);
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
858
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
859 add_call_kills(proj, regs, matcher._c_reg_save_policy, false);
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
860 }
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
861
0
a61af66fc99e Initial load
duke
parents:
diff changeset
862 // Children are now all ready
a61af66fc99e Initial load
duke
parents:
diff changeset
863 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
864 Node* m = n->fast_out(i5); // Get user
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
865 if (cfg->get_block_for_node(m) != this) {
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
866 continue;
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
867 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
868 if( m->is_Phi() ) continue;
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
869 if (m->_idx >= max_idx) { // new node, skip it
4120
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
870 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
871 continue;
f03a3c8bd5e5 7077312: Provide a CALL effect for instruct declaration in the ad file
roland
parents: 3842
diff changeset
872 }
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
873 int m_cnt = ready_cnt.at(m->_idx)-1;
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
874 ready_cnt.at_put(m->_idx, m_cnt);
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4120
diff changeset
875 if( m_cnt == 0 )
0
a61af66fc99e Initial load
duke
parents:
diff changeset
876 worklist.push(m);
a61af66fc99e Initial load
duke
parents:
diff changeset
877 }
a61af66fc99e Initial load
duke
parents:
diff changeset
878 }
a61af66fc99e Initial load
duke
parents:
diff changeset
879
a61af66fc99e Initial load
duke
parents:
diff changeset
880 if( phi_cnt != end_idx() ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
881 // did not schedule all. Retry, Bailout, or Die
a61af66fc99e Initial load
duke
parents:
diff changeset
882 Compile* C = matcher.C;
a61af66fc99e Initial load
duke
parents:
diff changeset
883 if (C->subsume_loads() == true && !C->failing()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
884 // Retry with subsume_loads == false
a61af66fc99e Initial load
duke
parents:
diff changeset
885 // If this is the first failure, the sentinel string will "stick"
a61af66fc99e Initial load
duke
parents:
diff changeset
886 // to the Compile object, and the C2Compiler will see it and retry.
a61af66fc99e Initial load
duke
parents:
diff changeset
887 C->record_failure(C2Compiler::retry_no_subsuming_loads());
a61af66fc99e Initial load
duke
parents:
diff changeset
888 }
a61af66fc99e Initial load
duke
parents:
diff changeset
889 // assert( phi_cnt == end_idx(), "did not schedule all" );
a61af66fc99e Initial load
duke
parents:
diff changeset
890 return false;
a61af66fc99e Initial load
duke
parents:
diff changeset
891 }
a61af66fc99e Initial load
duke
parents:
diff changeset
892
a61af66fc99e Initial load
duke
parents:
diff changeset
893 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
894 if (cfg->trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
895 tty->print_cr("#");
a61af66fc99e Initial load
duke
parents:
diff changeset
896 tty->print_cr("# after schedule_local");
a61af66fc99e Initial load
duke
parents:
diff changeset
897 for (uint i = 0;i < _nodes.size();i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
898 tty->print("# ");
a61af66fc99e Initial load
duke
parents:
diff changeset
899 _nodes[i]->fast_dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
900 }
a61af66fc99e Initial load
duke
parents:
diff changeset
901 tty->cr();
a61af66fc99e Initial load
duke
parents:
diff changeset
902 }
a61af66fc99e Initial load
duke
parents:
diff changeset
903 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
904
a61af66fc99e Initial load
duke
parents:
diff changeset
905
a61af66fc99e Initial load
duke
parents:
diff changeset
906 return true;
a61af66fc99e Initial load
duke
parents:
diff changeset
907 }
a61af66fc99e Initial load
duke
parents:
diff changeset
908
a61af66fc99e Initial load
duke
parents:
diff changeset
909 //--------------------------catch_cleanup_fix_all_inputs-----------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
910 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
a61af66fc99e Initial load
duke
parents:
diff changeset
911 for (uint l = 0; l < use->len(); l++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
912 if (use->in(l) == old_def) {
a61af66fc99e Initial load
duke
parents:
diff changeset
913 if (l < use->req()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
914 use->set_req(l, new_def);
a61af66fc99e Initial load
duke
parents:
diff changeset
915 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
916 use->rm_prec(l);
a61af66fc99e Initial load
duke
parents:
diff changeset
917 use->add_prec(new_def);
a61af66fc99e Initial load
duke
parents:
diff changeset
918 l--;
a61af66fc99e Initial load
duke
parents:
diff changeset
919 }
a61af66fc99e Initial load
duke
parents:
diff changeset
920 }
a61af66fc99e Initial load
duke
parents:
diff changeset
921 }
a61af66fc99e Initial load
duke
parents:
diff changeset
922 }
a61af66fc99e Initial load
duke
parents:
diff changeset
923
a61af66fc99e Initial load
duke
parents:
diff changeset
924 //------------------------------catch_cleanup_find_cloned_def------------------
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
925 static Node *catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, PhaseCFG* cfg, int n_clone_idx) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
926 assert( use_blk != def_blk, "Inter-block cleanup only");
a61af66fc99e Initial load
duke
parents:
diff changeset
927
a61af66fc99e Initial load
duke
parents:
diff changeset
928 // The use is some block below the Catch. Find and return the clone of the def
a61af66fc99e Initial load
duke
parents:
diff changeset
929 // that dominates the use. If there is no clone in a dominating block, then
a61af66fc99e Initial load
duke
parents:
diff changeset
930 // create a phi for the def in a dominating block.
a61af66fc99e Initial load
duke
parents:
diff changeset
931
a61af66fc99e Initial load
duke
parents:
diff changeset
932 // Find which successor block dominates this use. The successor
a61af66fc99e Initial load
duke
parents:
diff changeset
933 // blocks must all be single-entry (from the Catch only; I will have
a61af66fc99e Initial load
duke
parents:
diff changeset
934 // split blocks to make this so), hence they all dominate.
a61af66fc99e Initial load
duke
parents:
diff changeset
935 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
a61af66fc99e Initial load
duke
parents:
diff changeset
936 use_blk = use_blk->_idom;
a61af66fc99e Initial load
duke
parents:
diff changeset
937
a61af66fc99e Initial load
duke
parents:
diff changeset
938 // Find the successor
a61af66fc99e Initial load
duke
parents:
diff changeset
939 Node *fixup = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
940
a61af66fc99e Initial load
duke
parents:
diff changeset
941 uint j;
a61af66fc99e Initial load
duke
parents:
diff changeset
942 for( j = 0; j < def_blk->_num_succs; j++ )
a61af66fc99e Initial load
duke
parents:
diff changeset
943 if( use_blk == def_blk->_succs[j] )
a61af66fc99e Initial load
duke
parents:
diff changeset
944 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
945
a61af66fc99e Initial load
duke
parents:
diff changeset
946 if( j == def_blk->_num_succs ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
947 // Block at same level in dom-tree is not a successor. It needs a
a61af66fc99e Initial load
duke
parents:
diff changeset
948 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
a61af66fc99e Initial load
duke
parents:
diff changeset
949 Node_Array inputs = new Node_List(Thread::current()->resource_area());
a61af66fc99e Initial load
duke
parents:
diff changeset
950 for(uint k = 1; k < use_blk->num_preds(); k++) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
951 Block* block = cfg->get_block_for_node(use_blk->pred(k));
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
952 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, cfg, n_clone_idx));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
953 }
a61af66fc99e Initial load
duke
parents:
diff changeset
954
a61af66fc99e Initial load
duke
parents:
diff changeset
955 // Check to see if the use_blk already has an identical phi inserted.
a61af66fc99e Initial load
duke
parents:
diff changeset
956 // If it exists, it will be at the first position since all uses of a
a61af66fc99e Initial load
duke
parents:
diff changeset
957 // def are processed together.
a61af66fc99e Initial load
duke
parents:
diff changeset
958 Node *phi = use_blk->_nodes[1];
a61af66fc99e Initial load
duke
parents:
diff changeset
959 if( phi->is_Phi() ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
960 fixup = phi;
a61af66fc99e Initial load
duke
parents:
diff changeset
961 for (uint k = 1; k < use_blk->num_preds(); k++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
962 if (phi->in(k) != inputs[k]) {
a61af66fc99e Initial load
duke
parents:
diff changeset
963 // Not a match
a61af66fc99e Initial load
duke
parents:
diff changeset
964 fixup = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
965 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
966 }
a61af66fc99e Initial load
duke
parents:
diff changeset
967 }
a61af66fc99e Initial load
duke
parents:
diff changeset
968 }
a61af66fc99e Initial load
duke
parents:
diff changeset
969
a61af66fc99e Initial load
duke
parents:
diff changeset
970 // If an existing PhiNode was not found, make a new one.
a61af66fc99e Initial load
duke
parents:
diff changeset
971 if (fixup == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
972 Node *new_phi = PhiNode::make(use_blk->head(), def);
a61af66fc99e Initial load
duke
parents:
diff changeset
973 use_blk->_nodes.insert(1, new_phi);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
974 cfg->map_node_to_block(new_phi, use_blk);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
975 for (uint k = 1; k < use_blk->num_preds(); k++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
976 new_phi->set_req(k, inputs[k]);
a61af66fc99e Initial load
duke
parents:
diff changeset
977 }
a61af66fc99e Initial load
duke
parents:
diff changeset
978 fixup = new_phi;
a61af66fc99e Initial load
duke
parents:
diff changeset
979 }
a61af66fc99e Initial load
duke
parents:
diff changeset
980
a61af66fc99e Initial load
duke
parents:
diff changeset
981 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
982 // Found the use just below the Catch. Make it use the clone.
a61af66fc99e Initial load
duke
parents:
diff changeset
983 fixup = use_blk->_nodes[n_clone_idx];
a61af66fc99e Initial load
duke
parents:
diff changeset
984 }
a61af66fc99e Initial load
duke
parents:
diff changeset
985
a61af66fc99e Initial load
duke
parents:
diff changeset
986 return fixup;
a61af66fc99e Initial load
duke
parents:
diff changeset
987 }
a61af66fc99e Initial load
duke
parents:
diff changeset
988
a61af66fc99e Initial load
duke
parents:
diff changeset
989 //--------------------------catch_cleanup_intra_block--------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
990 // Fix all input edges in use that reference "def". The use is in the same
a61af66fc99e Initial load
duke
parents:
diff changeset
991 // block as the def and both have been cloned in each successor block.
a61af66fc99e Initial load
duke
parents:
diff changeset
992 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
a61af66fc99e Initial load
duke
parents:
diff changeset
993
a61af66fc99e Initial load
duke
parents:
diff changeset
994 // Both the use and def have been cloned. For each successor block,
a61af66fc99e Initial load
duke
parents:
diff changeset
995 // get the clone of the use, and make its input the clone of the def
a61af66fc99e Initial load
duke
parents:
diff changeset
996 // found in that block.
a61af66fc99e Initial load
duke
parents:
diff changeset
997
a61af66fc99e Initial load
duke
parents:
diff changeset
998 uint use_idx = blk->find_node(use);
a61af66fc99e Initial load
duke
parents:
diff changeset
999 uint offset_idx = use_idx - beg;
a61af66fc99e Initial load
duke
parents:
diff changeset
1000 for( uint k = 0; k < blk->_num_succs; k++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1001 // Get clone in each successor block
a61af66fc99e Initial load
duke
parents:
diff changeset
1002 Block *sb = blk->_succs[k];
a61af66fc99e Initial load
duke
parents:
diff changeset
1003 Node *clone = sb->_nodes[offset_idx+1];
a61af66fc99e Initial load
duke
parents:
diff changeset
1004 assert( clone->Opcode() == use->Opcode(), "" );
a61af66fc99e Initial load
duke
parents:
diff changeset
1005
a61af66fc99e Initial load
duke
parents:
diff changeset
1006 // Make use-clone reference the def-clone
a61af66fc99e Initial load
duke
parents:
diff changeset
1007 catch_cleanup_fix_all_inputs(clone, def, sb->_nodes[n_clone_idx]);
a61af66fc99e Initial load
duke
parents:
diff changeset
1008 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1009 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1010
a61af66fc99e Initial load
duke
parents:
diff changeset
1011 //------------------------------catch_cleanup_inter_block---------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1012 // Fix all input edges in use that reference "def". The use is in a different
a61af66fc99e Initial load
duke
parents:
diff changeset
1013 // block than the def.
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
1014 static void catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, PhaseCFG* cfg, int n_clone_idx) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 if( !use_blk ) return; // Can happen if the use is a precedence edge
a61af66fc99e Initial load
duke
parents:
diff changeset
1016
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
1017 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, cfg, n_clone_idx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1018 catch_cleanup_fix_all_inputs(use, def, new_def);
a61af66fc99e Initial load
duke
parents:
diff changeset
1019 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1020
a61af66fc99e Initial load
duke
parents:
diff changeset
1021 //------------------------------call_catch_cleanup-----------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1022 // If we inserted any instructions between a Call and his CatchNode,
a61af66fc99e Initial load
duke
parents:
diff changeset
1023 // clone the instructions on all paths below the Catch.
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
1024 void Block::call_catch_cleanup(PhaseCFG* cfg, Compile* C) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1025
a61af66fc99e Initial load
duke
parents:
diff changeset
1026 // End of region to clone
a61af66fc99e Initial load
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parents:
diff changeset
1027 uint end = end_idx();
a61af66fc99e Initial load
duke
parents:
diff changeset
1028 if( !_nodes[end]->is_Catch() ) return;
a61af66fc99e Initial load
duke
parents:
diff changeset
1029 // Start of region to clone
a61af66fc99e Initial load
duke
parents:
diff changeset
1030 uint beg = end;
3842
c7b60b601eb4 7069452: Cleanup NodeFlags
kvn
parents: 3796
diff changeset
1031 while(!_nodes[beg-1]->is_MachProj() ||
c7b60b601eb4 7069452: Cleanup NodeFlags
kvn
parents: 3796
diff changeset
1032 !_nodes[beg-1]->in(0)->is_MachCall() ) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1033 beg--;
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 assert(beg > 0,"Catch cleanup walking beyond block boundary");
a61af66fc99e Initial load
duke
parents:
diff changeset
1035 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 // Range of inserted instructions is [beg, end)
a61af66fc99e Initial load
duke
parents:
diff changeset
1037 if( beg == end ) return;
a61af66fc99e Initial load
duke
parents:
diff changeset
1038
a61af66fc99e Initial load
duke
parents:
diff changeset
1039 // Clone along all Catch output paths. Clone area between the 'beg' and
a61af66fc99e Initial load
duke
parents:
diff changeset
1040 // 'end' indices.
a61af66fc99e Initial load
duke
parents:
diff changeset
1041 for( uint i = 0; i < _num_succs; i++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1042 Block *sb = _succs[i];
a61af66fc99e Initial load
duke
parents:
diff changeset
1043 // Clone the entire area; ignoring the edge fixup for now.
a61af66fc99e Initial load
duke
parents:
diff changeset
1044 for( uint j = end; j > beg; j-- ) {
1693
6c9cc03d8726 6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents: 1685
diff changeset
1045 // It is safe here to clone a node with anti_dependence
6c9cc03d8726 6973329: C2 with Zero based COOP produces code with broken anti-dependency on x86
kvn
parents: 1685
diff changeset
1046 // since clones dominate on each path.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1047 Node *clone = _nodes[j-1]->clone();
a61af66fc99e Initial load
duke
parents:
diff changeset
1048 sb->_nodes.insert( 1, clone );
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
1049 cfg->map_node_to_block(clone, sb);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1050 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1051 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1052
a61af66fc99e Initial load
duke
parents:
diff changeset
1053
a61af66fc99e Initial load
duke
parents:
diff changeset
1054 // Fixup edges. Check the def-use info per cloned Node
a61af66fc99e Initial load
duke
parents:
diff changeset
1055 for(uint i2 = beg; i2 < end; i2++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1056 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
a61af66fc99e Initial load
duke
parents:
diff changeset
1057 Node *n = _nodes[i2]; // Node that got cloned
a61af66fc99e Initial load
duke
parents:
diff changeset
1058 // Need DU safe iterator because of edge manipulation in calls.
a61af66fc99e Initial load
duke
parents:
diff changeset
1059 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
a61af66fc99e Initial load
duke
parents:
diff changeset
1060 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1061 out->push(n->fast_out(j1));
a61af66fc99e Initial load
duke
parents:
diff changeset
1062 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1063 uint max = out->size();
a61af66fc99e Initial load
duke
parents:
diff changeset
1064 for (uint j = 0; j < max; j++) {// For all users
a61af66fc99e Initial load
duke
parents:
diff changeset
1065 Node *use = out->pop();
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
1066 Block *buse = cfg->get_block_for_node(use);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1067 if( use->is_Phi() ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1068 for( uint k = 1; k < use->req(); k++ )
a61af66fc99e Initial load
duke
parents:
diff changeset
1069 if( use->in(k) == n ) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
1070 Block* block = cfg->get_block_for_node(buse->pred(k));
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
1071 Node *fixup = catch_cleanup_find_cloned_def(block, n, this, cfg, n_clone_idx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1072 use->set_req(k, fixup);
a61af66fc99e Initial load
duke
parents:
diff changeset
1073 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1074 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1075 if (this == buse) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1076 catch_cleanup_intra_block(use, n, this, beg, n_clone_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
1077 } else {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 10279
diff changeset
1078 catch_cleanup_inter_block(use, buse, n, this, cfg, n_clone_idx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1079 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1080 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1081 } // End for all users
a61af66fc99e Initial load
duke
parents:
diff changeset
1082
a61af66fc99e Initial load
duke
parents:
diff changeset
1083 } // End of for all Nodes in cloned area
a61af66fc99e Initial load
duke
parents:
diff changeset
1084
a61af66fc99e Initial load
duke
parents:
diff changeset
1085 // Remove the now-dead cloned ops
a61af66fc99e Initial load
duke
parents:
diff changeset
1086 for(uint i3 = beg; i3 < end; i3++ ) {
7196
2aff40cb4703 7092905: C2: Keep track of the number of dead nodes
bharadwaj
parents: 6848
diff changeset
1087 _nodes[beg]->disconnect_inputs(NULL, C);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1088 _nodes.remove(beg);
a61af66fc99e Initial load
duke
parents:
diff changeset
1089 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1090
a61af66fc99e Initial load
duke
parents:
diff changeset
1091 // If the successor blocks have a CreateEx node, move it back to the top
a61af66fc99e Initial load
duke
parents:
diff changeset
1092 for(uint i4 = 0; i4 < _num_succs; i4++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1093 Block *sb = _succs[i4];
a61af66fc99e Initial load
duke
parents:
diff changeset
1094 uint new_cnt = end - beg;
a61af66fc99e Initial load
duke
parents:
diff changeset
1095 // Remove any newly created, but dead, nodes.
a61af66fc99e Initial load
duke
parents:
diff changeset
1096 for( uint j = new_cnt; j > 0; j-- ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1097 Node *n = sb->_nodes[j];
a61af66fc99e Initial load
duke
parents:
diff changeset
1098 if (n->outcnt() == 0 &&
a61af66fc99e Initial load
duke
parents:
diff changeset
1099 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
7196
2aff40cb4703 7092905: C2: Keep track of the number of dead nodes
bharadwaj
parents: 6848
diff changeset
1100 n->disconnect_inputs(NULL, C);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1101 sb->_nodes.remove(j);
a61af66fc99e Initial load
duke
parents:
diff changeset
1102 new_cnt--;
a61af66fc99e Initial load
duke
parents:
diff changeset
1103 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1104 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1105 // If any newly created nodes remain, move the CreateEx node to the top
a61af66fc99e Initial load
duke
parents:
diff changeset
1106 if (new_cnt > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1107 Node *cex = sb->_nodes[1+new_cnt];
a61af66fc99e Initial load
duke
parents:
diff changeset
1108 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1109 sb->_nodes.remove(1+new_cnt);
a61af66fc99e Initial load
duke
parents:
diff changeset
1110 sb->_nodes.insert(1,cex);
a61af66fc99e Initial load
duke
parents:
diff changeset
1111 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1112 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1113 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1114 }