Mercurial > hg > graal-compiler
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 6194:fa0c28fabbb1
Added tag jdk8-b47 for changeset 0c7bb1f4f9c8
author | katleman |
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date | Thu, 12 Jul 2012 16:48:00 -0700 |
parents | 031df0387c09 |
children | 1d7922586cf6 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "asm/assembler.hpp" | |
27 #include "assembler_x86.inline.hpp" | |
28 #include "code/debugInfoRec.hpp" | |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
32 #include "oops/compiledICHolderOop.hpp" | |
33 #include "prims/jvmtiRedefineClassesTrace.hpp" | |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
0 | 43 |
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44 #define __ masm-> |
0 | 45 |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
0 | 48 class SimpleRuntimeFrame { |
49 | |
50 public: | |
51 | |
52 // Most of the runtime stubs have this simple frame layout. | |
53 // This class exists to make the layout shared in one place. | |
54 // Offsets are for compiler stack slots, which are jints. | |
55 enum layout { | |
56 // The frame sender code expects that rbp will be in the "natural" place and | |
57 // will override any oopMap setting for it. We must therefore force the layout | |
58 // so that it agrees with the frame sender code. | |
59 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
60 rbp_off2, | |
61 return_off, return_off2, | |
62 framesize | |
63 }; | |
64 }; | |
65 | |
66 class RegisterSaver { | |
67 // Capture info about frame layout. Layout offsets are in jint | |
68 // units because compiler frame slots are jints. | |
69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
70 enum layout { | |
71 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
72 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
73 DEF_XMM_OFFS(0), | |
74 DEF_XMM_OFFS(1), | |
75 DEF_XMM_OFFS(2), | |
76 DEF_XMM_OFFS(3), | |
77 DEF_XMM_OFFS(4), | |
78 DEF_XMM_OFFS(5), | |
79 DEF_XMM_OFFS(6), | |
80 DEF_XMM_OFFS(7), | |
81 DEF_XMM_OFFS(8), | |
82 DEF_XMM_OFFS(9), | |
83 DEF_XMM_OFFS(10), | |
84 DEF_XMM_OFFS(11), | |
85 DEF_XMM_OFFS(12), | |
86 DEF_XMM_OFFS(13), | |
87 DEF_XMM_OFFS(14), | |
88 DEF_XMM_OFFS(15), | |
89 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
90 fpu_stateH_end, | |
91 r15_off, r15H_off, | |
92 r14_off, r14H_off, | |
93 r13_off, r13H_off, | |
94 r12_off, r12H_off, | |
95 r11_off, r11H_off, | |
96 r10_off, r10H_off, | |
97 r9_off, r9H_off, | |
98 r8_off, r8H_off, | |
99 rdi_off, rdiH_off, | |
100 rsi_off, rsiH_off, | |
101 ignore_off, ignoreH_off, // extra copy of rbp | |
102 rsp_off, rspH_off, | |
103 rbx_off, rbxH_off, | |
104 rdx_off, rdxH_off, | |
105 rcx_off, rcxH_off, | |
106 rax_off, raxH_off, | |
107 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
108 align_off, alignH_off, | |
109 flags_off, flagsH_off, | |
110 // The frame sender code expects that rbp will be in the "natural" place and | |
111 // will override any oopMap setting for it. We must therefore force the layout | |
112 // so that it agrees with the frame sender code. | |
113 rbp_off, rbpH_off, // copy of rbp we will restore | |
114 return_off, returnH_off, // slot for return address | |
115 reg_save_size // size in compiler stack slots | |
116 }; | |
117 | |
118 public: | |
119 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); | |
120 static void restore_live_registers(MacroAssembler* masm); | |
121 | |
122 // Offsets into the register save area | |
123 // Used by deoptimization when it is managing result register | |
124 // values on its own | |
125 | |
126 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 127 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 128 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
129 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } | |
130 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
131 | |
132 // During deoptimization only the result registers need to be restored, | |
133 // all the other values have already been extracted. | |
134 static void restore_result_registers(MacroAssembler* masm); | |
135 }; | |
136 | |
137 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { | |
138 | |
139 // Always make the frame size 16-byte aligned | |
140 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
141 reg_save_size*BytesPerInt, 16); | |
142 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
143 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
144 // The caller will allocate additional_frame_words | |
145 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
146 // CodeBlob frame size is in words. | |
147 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
148 *total_frame_words = frame_size_in_words; | |
149 | |
150 // Save registers, fpu state, and flags. | |
151 // We assume caller has already pushed the return address onto the | |
152 // stack, so rsp is 8-byte aligned here. | |
153 // We push rpb twice in this sequence because we want the real rbp | |
154 // to be under the return like a normal enter. | |
155 | |
156 __ enter(); // rsp becomes 16-byte aligned here | |
157 __ push_CPU_state(); // Push a multiple of 16 bytes | |
158 if (frame::arg_reg_save_area_bytes != 0) { | |
159 // Allocate argument register save area | |
304 | 160 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 161 } |
162 | |
163 // Set an oopmap for the call site. This oopmap will map all | |
164 // oop-registers and debug-info registers as callee-saved. This | |
165 // will allow deoptimization at this safepoint to find all possible | |
166 // debug-info recordings, as well as let GC find all oops. | |
167 | |
168 OopMapSet *oop_maps = new OopMapSet(); | |
169 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
170 map->set_callee_saved(VMRegImpl::stack2reg( rax_off + additional_frame_slots), rax->as_VMReg()); | |
171 map->set_callee_saved(VMRegImpl::stack2reg( rcx_off + additional_frame_slots), rcx->as_VMReg()); | |
172 map->set_callee_saved(VMRegImpl::stack2reg( rdx_off + additional_frame_slots), rdx->as_VMReg()); | |
173 map->set_callee_saved(VMRegImpl::stack2reg( rbx_off + additional_frame_slots), rbx->as_VMReg()); | |
174 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
175 // and the location where rbp was saved by is ignored | |
176 map->set_callee_saved(VMRegImpl::stack2reg( rsi_off + additional_frame_slots), rsi->as_VMReg()); | |
177 map->set_callee_saved(VMRegImpl::stack2reg( rdi_off + additional_frame_slots), rdi->as_VMReg()); | |
178 map->set_callee_saved(VMRegImpl::stack2reg( r8_off + additional_frame_slots), r8->as_VMReg()); | |
179 map->set_callee_saved(VMRegImpl::stack2reg( r9_off + additional_frame_slots), r9->as_VMReg()); | |
180 map->set_callee_saved(VMRegImpl::stack2reg( r10_off + additional_frame_slots), r10->as_VMReg()); | |
181 map->set_callee_saved(VMRegImpl::stack2reg( r11_off + additional_frame_slots), r11->as_VMReg()); | |
182 map->set_callee_saved(VMRegImpl::stack2reg( r12_off + additional_frame_slots), r12->as_VMReg()); | |
183 map->set_callee_saved(VMRegImpl::stack2reg( r13_off + additional_frame_slots), r13->as_VMReg()); | |
184 map->set_callee_saved(VMRegImpl::stack2reg( r14_off + additional_frame_slots), r14->as_VMReg()); | |
185 map->set_callee_saved(VMRegImpl::stack2reg( r15_off + additional_frame_slots), r15->as_VMReg()); | |
186 map->set_callee_saved(VMRegImpl::stack2reg(xmm0_off + additional_frame_slots), xmm0->as_VMReg()); | |
187 map->set_callee_saved(VMRegImpl::stack2reg(xmm1_off + additional_frame_slots), xmm1->as_VMReg()); | |
188 map->set_callee_saved(VMRegImpl::stack2reg(xmm2_off + additional_frame_slots), xmm2->as_VMReg()); | |
189 map->set_callee_saved(VMRegImpl::stack2reg(xmm3_off + additional_frame_slots), xmm3->as_VMReg()); | |
190 map->set_callee_saved(VMRegImpl::stack2reg(xmm4_off + additional_frame_slots), xmm4->as_VMReg()); | |
191 map->set_callee_saved(VMRegImpl::stack2reg(xmm5_off + additional_frame_slots), xmm5->as_VMReg()); | |
192 map->set_callee_saved(VMRegImpl::stack2reg(xmm6_off + additional_frame_slots), xmm6->as_VMReg()); | |
193 map->set_callee_saved(VMRegImpl::stack2reg(xmm7_off + additional_frame_slots), xmm7->as_VMReg()); | |
194 map->set_callee_saved(VMRegImpl::stack2reg(xmm8_off + additional_frame_slots), xmm8->as_VMReg()); | |
195 map->set_callee_saved(VMRegImpl::stack2reg(xmm9_off + additional_frame_slots), xmm9->as_VMReg()); | |
196 map->set_callee_saved(VMRegImpl::stack2reg(xmm10_off + additional_frame_slots), xmm10->as_VMReg()); | |
197 map->set_callee_saved(VMRegImpl::stack2reg(xmm11_off + additional_frame_slots), xmm11->as_VMReg()); | |
198 map->set_callee_saved(VMRegImpl::stack2reg(xmm12_off + additional_frame_slots), xmm12->as_VMReg()); | |
199 map->set_callee_saved(VMRegImpl::stack2reg(xmm13_off + additional_frame_slots), xmm13->as_VMReg()); | |
200 map->set_callee_saved(VMRegImpl::stack2reg(xmm14_off + additional_frame_slots), xmm14->as_VMReg()); | |
201 map->set_callee_saved(VMRegImpl::stack2reg(xmm15_off + additional_frame_slots), xmm15->as_VMReg()); | |
202 | |
203 // %%% These should all be a waste but we'll keep things as they were for now | |
204 if (true) { | |
205 map->set_callee_saved(VMRegImpl::stack2reg( raxH_off + additional_frame_slots), | |
206 rax->as_VMReg()->next()); | |
207 map->set_callee_saved(VMRegImpl::stack2reg( rcxH_off + additional_frame_slots), | |
208 rcx->as_VMReg()->next()); | |
209 map->set_callee_saved(VMRegImpl::stack2reg( rdxH_off + additional_frame_slots), | |
210 rdx->as_VMReg()->next()); | |
211 map->set_callee_saved(VMRegImpl::stack2reg( rbxH_off + additional_frame_slots), | |
212 rbx->as_VMReg()->next()); | |
213 // rbp location is known implicitly by the frame sender code, needs no oopmap | |
214 map->set_callee_saved(VMRegImpl::stack2reg( rsiH_off + additional_frame_slots), | |
215 rsi->as_VMReg()->next()); | |
216 map->set_callee_saved(VMRegImpl::stack2reg( rdiH_off + additional_frame_slots), | |
217 rdi->as_VMReg()->next()); | |
218 map->set_callee_saved(VMRegImpl::stack2reg( r8H_off + additional_frame_slots), | |
219 r8->as_VMReg()->next()); | |
220 map->set_callee_saved(VMRegImpl::stack2reg( r9H_off + additional_frame_slots), | |
221 r9->as_VMReg()->next()); | |
222 map->set_callee_saved(VMRegImpl::stack2reg( r10H_off + additional_frame_slots), | |
223 r10->as_VMReg()->next()); | |
224 map->set_callee_saved(VMRegImpl::stack2reg( r11H_off + additional_frame_slots), | |
225 r11->as_VMReg()->next()); | |
226 map->set_callee_saved(VMRegImpl::stack2reg( r12H_off + additional_frame_slots), | |
227 r12->as_VMReg()->next()); | |
228 map->set_callee_saved(VMRegImpl::stack2reg( r13H_off + additional_frame_slots), | |
229 r13->as_VMReg()->next()); | |
230 map->set_callee_saved(VMRegImpl::stack2reg( r14H_off + additional_frame_slots), | |
231 r14->as_VMReg()->next()); | |
232 map->set_callee_saved(VMRegImpl::stack2reg( r15H_off + additional_frame_slots), | |
233 r15->as_VMReg()->next()); | |
234 map->set_callee_saved(VMRegImpl::stack2reg(xmm0H_off + additional_frame_slots), | |
235 xmm0->as_VMReg()->next()); | |
236 map->set_callee_saved(VMRegImpl::stack2reg(xmm1H_off + additional_frame_slots), | |
237 xmm1->as_VMReg()->next()); | |
238 map->set_callee_saved(VMRegImpl::stack2reg(xmm2H_off + additional_frame_slots), | |
239 xmm2->as_VMReg()->next()); | |
240 map->set_callee_saved(VMRegImpl::stack2reg(xmm3H_off + additional_frame_slots), | |
241 xmm3->as_VMReg()->next()); | |
242 map->set_callee_saved(VMRegImpl::stack2reg(xmm4H_off + additional_frame_slots), | |
243 xmm4->as_VMReg()->next()); | |
244 map->set_callee_saved(VMRegImpl::stack2reg(xmm5H_off + additional_frame_slots), | |
245 xmm5->as_VMReg()->next()); | |
246 map->set_callee_saved(VMRegImpl::stack2reg(xmm6H_off + additional_frame_slots), | |
247 xmm6->as_VMReg()->next()); | |
248 map->set_callee_saved(VMRegImpl::stack2reg(xmm7H_off + additional_frame_slots), | |
249 xmm7->as_VMReg()->next()); | |
250 map->set_callee_saved(VMRegImpl::stack2reg(xmm8H_off + additional_frame_slots), | |
251 xmm8->as_VMReg()->next()); | |
252 map->set_callee_saved(VMRegImpl::stack2reg(xmm9H_off + additional_frame_slots), | |
253 xmm9->as_VMReg()->next()); | |
254 map->set_callee_saved(VMRegImpl::stack2reg(xmm10H_off + additional_frame_slots), | |
255 xmm10->as_VMReg()->next()); | |
256 map->set_callee_saved(VMRegImpl::stack2reg(xmm11H_off + additional_frame_slots), | |
257 xmm11->as_VMReg()->next()); | |
258 map->set_callee_saved(VMRegImpl::stack2reg(xmm12H_off + additional_frame_slots), | |
259 xmm12->as_VMReg()->next()); | |
260 map->set_callee_saved(VMRegImpl::stack2reg(xmm13H_off + additional_frame_slots), | |
261 xmm13->as_VMReg()->next()); | |
262 map->set_callee_saved(VMRegImpl::stack2reg(xmm14H_off + additional_frame_slots), | |
263 xmm14->as_VMReg()->next()); | |
264 map->set_callee_saved(VMRegImpl::stack2reg(xmm15H_off + additional_frame_slots), | |
265 xmm15->as_VMReg()->next()); | |
266 } | |
267 | |
268 return map; | |
269 } | |
270 | |
271 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { | |
272 if (frame::arg_reg_save_area_bytes != 0) { | |
273 // Pop arg register save area | |
304 | 274 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 275 } |
276 // Recover CPU state | |
277 __ pop_CPU_state(); | |
278 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 279 __ pop(rbp); |
0 | 280 } |
281 | |
282 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
283 | |
284 // Just restore result register. Only used by deoptimization. By | |
285 // now any callee save register that needs to be restored to a c2 | |
286 // caller of the deoptee has been extracted into the vframeArray | |
287 // and will be stuffed into the c2i adapter we create for later | |
288 // restoration so only result registers need to be restored here. | |
289 | |
290 // Restore fp result register | |
291 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
292 // Restore integer result register | |
304 | 293 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
294 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
295 | |
0 | 296 // Pop all of the register save are off the stack except the return address |
304 | 297 __ addptr(rsp, return_offset_in_bytes()); |
0 | 298 } |
299 | |
300 // The java_calling_convention describes stack locations as ideal slots on | |
301 // a frame with no abi restrictions. Since we must observe abi restrictions | |
302 // (like the placement of the register window) the slots must be biased by | |
303 // the following value. | |
304 static int reg2offset_in(VMReg r) { | |
305 // Account for saved rbp and return address | |
306 // This should really be in_preserve_stack_slots | |
307 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
308 } | |
309 | |
310 static int reg2offset_out(VMReg r) { | |
311 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
312 } | |
313 | |
314 // --------------------------------------------------------------------------- | |
315 // Read the array of BasicTypes from a signature, and compute where the | |
316 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
317 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
318 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
319 // as framesizes are fixed. | |
320 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
321 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
322 // up to RegisterImpl::number_of_registers) are the 64-bit | |
323 // integer registers. | |
324 | |
325 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
326 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
327 // units regardless of build. Of course for i486 there is no 64 bit build | |
328 | |
329 // The Java calling convention is a "shifted" version of the C ABI. | |
330 // By skipping the first C ABI register we can call non-static jni methods | |
331 // with small numbers of arguments without having to shuffle the arguments | |
332 // at all. Since we control the java ABI we ought to at least get some | |
333 // advantage out of it. | |
334 | |
335 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
336 VMRegPair *regs, | |
337 int total_args_passed, | |
338 int is_outgoing) { | |
339 | |
340 // Create the mapping between argument positions and | |
341 // registers. | |
342 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
343 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
344 }; | |
345 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
346 j_farg0, j_farg1, j_farg2, j_farg3, | |
347 j_farg4, j_farg5, j_farg6, j_farg7 | |
348 }; | |
349 | |
350 | |
351 uint int_args = 0; | |
352 uint fp_args = 0; | |
353 uint stk_args = 0; // inc by 2 each time | |
354 | |
355 for (int i = 0; i < total_args_passed; i++) { | |
356 switch (sig_bt[i]) { | |
357 case T_BOOLEAN: | |
358 case T_CHAR: | |
359 case T_BYTE: | |
360 case T_SHORT: | |
361 case T_INT: | |
362 if (int_args < Argument::n_int_register_parameters_j) { | |
363 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
364 } else { | |
365 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
366 stk_args += 2; | |
367 } | |
368 break; | |
369 case T_VOID: | |
370 // halves of T_LONG or T_DOUBLE | |
371 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
372 regs[i].set_bad(); | |
373 break; | |
374 case T_LONG: | |
375 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
376 // fall through | |
377 case T_OBJECT: | |
378 case T_ARRAY: | |
379 case T_ADDRESS: | |
380 if (int_args < Argument::n_int_register_parameters_j) { | |
381 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
382 } else { | |
383 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
384 stk_args += 2; | |
385 } | |
386 break; | |
387 case T_FLOAT: | |
388 if (fp_args < Argument::n_float_register_parameters_j) { | |
389 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
390 } else { | |
391 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
392 stk_args += 2; | |
393 } | |
394 break; | |
395 case T_DOUBLE: | |
396 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
397 if (fp_args < Argument::n_float_register_parameters_j) { | |
398 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
399 } else { | |
400 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
401 stk_args += 2; | |
402 } | |
403 break; | |
404 default: | |
405 ShouldNotReachHere(); | |
406 break; | |
407 } | |
408 } | |
409 | |
410 return round_to(stk_args, 2); | |
411 } | |
412 | |
413 // Patch the callers callsite with entry to compiled code if it exists. | |
414 static void patch_callers_callsite(MacroAssembler *masm) { | |
415 Label L; | |
416 __ verify_oop(rbx); | |
304 | 417 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 418 __ jcc(Assembler::equal, L); |
419 | |
420 // Save the current stack pointer | |
304 | 421 __ mov(r13, rsp); |
0 | 422 // Schedule the branch target address early. |
423 // Call into the VM to patch the caller, then jump to compiled callee | |
424 // rax isn't live so capture return address while we easily can | |
304 | 425 __ movptr(rax, Address(rsp, 0)); |
0 | 426 |
427 // align stack so push_CPU_state doesn't fault | |
304 | 428 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 429 __ push_CPU_state(); |
430 | |
431 | |
432 __ verify_oop(rbx); | |
433 // VM needs caller's callsite | |
434 // VM needs target method | |
435 // This needs to be a long call since we will relocate this adapter to | |
436 // the codeBuffer and it may not reach | |
437 | |
438 // Allocate argument register save area | |
439 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 440 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 441 } |
304 | 442 __ mov(c_rarg0, rbx); |
443 __ mov(c_rarg1, rax); | |
0 | 444 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
445 | |
446 // De-allocate argument register save area | |
447 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 448 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 449 } |
450 | |
451 __ pop_CPU_state(); | |
452 // restore sp | |
304 | 453 __ mov(rsp, r13); |
0 | 454 __ bind(L); |
455 } | |
456 | |
457 | |
458 static void gen_c2i_adapter(MacroAssembler *masm, | |
459 int total_args_passed, | |
460 int comp_args_on_stack, | |
461 const BasicType *sig_bt, | |
462 const VMRegPair *regs, | |
463 Label& skip_fixup) { | |
464 // Before we get into the guts of the C2I adapter, see if we should be here | |
465 // at all. We've come from compiled code and are attempting to jump to the | |
466 // interpreter, which means the caller made a static call to get here | |
467 // (vcalls always get a compiled target if there is one). Check for a | |
468 // compiled target. If there is one, we need to patch the caller's call. | |
469 patch_callers_callsite(masm); | |
470 | |
471 __ bind(skip_fixup); | |
472 | |
473 // Since all args are passed on the stack, total_args_passed * | |
474 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
475 // we also account for the return address location since | |
476 // we store it first rather than hold it in rax across all the shuffling | |
477 | |
1506 | 478 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 479 |
480 // stack is aligned, keep it that way | |
481 extraspace = round_to(extraspace, 2*wordSize); | |
482 | |
483 // Get return address | |
304 | 484 __ pop(rax); |
0 | 485 |
486 // set senderSP value | |
304 | 487 __ mov(r13, rsp); |
488 | |
489 __ subptr(rsp, extraspace); | |
0 | 490 |
491 // Store the return address in the expected location | |
304 | 492 __ movptr(Address(rsp, 0), rax); |
0 | 493 |
494 // Now write the args into the outgoing interpreter space | |
495 for (int i = 0; i < total_args_passed; i++) { | |
496 if (sig_bt[i] == T_VOID) { | |
497 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
498 continue; | |
499 } | |
500 | |
501 // offset to start parameters | |
1506 | 502 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
503 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 504 |
505 // Say 4 args: | |
506 // i st_off | |
507 // 0 32 T_LONG | |
508 // 1 24 T_VOID | |
509 // 2 16 T_OBJECT | |
510 // 3 8 T_BOOL | |
511 // - 0 return address | |
512 // | |
513 // However to make thing extra confusing. Because we can fit a long/double in | |
514 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
515 // leaves one slot empty and only stores to a single slot. In this case the | |
516 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
517 | |
518 VMReg r_1 = regs[i].first(); | |
519 VMReg r_2 = regs[i].second(); | |
520 if (!r_1->is_valid()) { | |
521 assert(!r_2->is_valid(), ""); | |
522 continue; | |
523 } | |
524 if (r_1->is_stack()) { | |
525 // memory to memory use rax | |
526 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
527 if (!r_2->is_valid()) { | |
528 // sign extend?? | |
529 __ movl(rax, Address(rsp, ld_off)); | |
304 | 530 __ movptr(Address(rsp, st_off), rax); |
0 | 531 |
532 } else { | |
533 | |
534 __ movq(rax, Address(rsp, ld_off)); | |
535 | |
536 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
537 // T_DOUBLE and T_LONG use two slots in the interpreter | |
538 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
539 // ld_off == LSW, ld_off+wordSize == MSW | |
540 // st_off == MSW, next_off == LSW | |
541 __ movq(Address(rsp, next_off), rax); | |
542 #ifdef ASSERT | |
543 // Overwrite the unused slot with known junk | |
544 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 545 __ movptr(Address(rsp, st_off), rax); |
0 | 546 #endif /* ASSERT */ |
547 } else { | |
548 __ movq(Address(rsp, st_off), rax); | |
549 } | |
550 } | |
551 } else if (r_1->is_Register()) { | |
552 Register r = r_1->as_Register(); | |
553 if (!r_2->is_valid()) { | |
554 // must be only an int (or less ) so move only 32bits to slot | |
555 // why not sign extend?? | |
556 __ movl(Address(rsp, st_off), r); | |
557 } else { | |
558 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
559 // T_DOUBLE and T_LONG use two slots in the interpreter | |
560 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
561 // long/double in gpr | |
562 #ifdef ASSERT | |
563 // Overwrite the unused slot with known junk | |
564 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 565 __ movptr(Address(rsp, st_off), rax); |
0 | 566 #endif /* ASSERT */ |
567 __ movq(Address(rsp, next_off), r); | |
568 } else { | |
304 | 569 __ movptr(Address(rsp, st_off), r); |
0 | 570 } |
571 } | |
572 } else { | |
573 assert(r_1->is_XMMRegister(), ""); | |
574 if (!r_2->is_valid()) { | |
575 // only a float use just part of the slot | |
576 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
577 } else { | |
578 #ifdef ASSERT | |
579 // Overwrite the unused slot with known junk | |
580 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 581 __ movptr(Address(rsp, st_off), rax); |
0 | 582 #endif /* ASSERT */ |
583 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
584 } | |
585 } | |
586 } | |
587 | |
588 // Schedule the branch target address early. | |
304 | 589 __ movptr(rcx, Address(rbx, in_bytes(methodOopDesc::interpreter_entry_offset()))); |
0 | 590 __ jmp(rcx); |
591 } | |
592 | |
593 static void gen_i2c_adapter(MacroAssembler *masm, | |
594 int total_args_passed, | |
595 int comp_args_on_stack, | |
596 const BasicType *sig_bt, | |
597 const VMRegPair *regs) { | |
598 | |
599 // Note: r13 contains the senderSP on entry. We must preserve it since | |
600 // we may do a i2c -> c2i transition if we lose a race where compiled | |
601 // code goes non-entrant while we get args ready. | |
602 // In addition we use r13 to locate all the interpreter args as | |
603 // we must align the stack to 16 bytes on an i2c entry else we | |
604 // lose alignment we expect in all compiled code and register | |
605 // save code can segv when fxsave instructions find improperly | |
606 // aligned stack pointer. | |
607 | |
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608 // Pick up the return address |
304 | 609 __ movptr(rax, Address(rsp, 0)); |
0 | 610 |
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611 // Must preserve original SP for loading incoming arguments because |
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612 // we need to align the outgoing SP for compiled code. |
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613 __ movptr(r11, rsp); |
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614 |
0 | 615 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
616 // in registers, we will occasionally have no stack args. | |
617 int comp_words_on_stack = 0; | |
618 if (comp_args_on_stack) { | |
619 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
620 // registers are below. By subtracting stack0, we either get a negative | |
621 // number (all values in registers) or the maximum stack slot accessed. | |
622 | |
623 // Convert 4-byte c2 stack slots to words. | |
624 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
625 // Round up to miminum stack alignment, in wordSize | |
626 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 627 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 628 } |
629 | |
630 | |
631 // Ensure compiled code always sees stack at proper alignment | |
304 | 632 __ andptr(rsp, -16); |
0 | 633 |
634 // push the return address and misalign the stack that youngest frame always sees | |
635 // as far as the placement of the call instruction | |
304 | 636 __ push(rax); |
0 | 637 |
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638 // Put saved SP in another register |
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639 const Register saved_sp = rax; |
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640 __ movptr(saved_sp, r11); |
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641 |
0 | 642 // Will jump to the compiled code just as if compiled code was doing it. |
643 // Pre-load the register-jump target early, to schedule it better. | |
304 | 644 __ movptr(r11, Address(rbx, in_bytes(methodOopDesc::from_compiled_offset()))); |
0 | 645 |
646 // Now generate the shuffle code. Pick up all register args and move the | |
647 // rest through the floating point stack top. | |
648 for (int i = 0; i < total_args_passed; i++) { | |
649 if (sig_bt[i] == T_VOID) { | |
650 // Longs and doubles are passed in native word order, but misaligned | |
651 // in the 32-bit build. | |
652 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
653 continue; | |
654 } | |
655 | |
656 // Pick up 0, 1 or 2 words from SP+offset. | |
657 | |
658 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
659 "scrambled load targets?"); | |
660 // Load in argument order going down. | |
1506 | 661 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 662 // Point to interpreter value (vs. tag) |
1506 | 663 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 664 // |
665 // | |
666 // | |
667 VMReg r_1 = regs[i].first(); | |
668 VMReg r_2 = regs[i].second(); | |
669 if (!r_1->is_valid()) { | |
670 assert(!r_2->is_valid(), ""); | |
671 continue; | |
672 } | |
673 if (r_1->is_stack()) { | |
674 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
675 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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676 |
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677 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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678 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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679 // will be generated. |
0 | 680 if (!r_2->is_valid()) { |
681 // sign extend??? | |
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682 __ movl(r13, Address(saved_sp, ld_off)); |
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683 __ movptr(Address(rsp, st_off), r13); |
0 | 684 } else { |
685 // | |
686 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
687 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
688 // So we must adjust where to pick up the data to match the interpreter. | |
689 // | |
690 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
691 // are accessed as negative so LSW is at LOW address | |
692 | |
693 // ld_off is MSW so get LSW | |
694 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
695 next_off : ld_off; | |
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696 __ movq(r13, Address(saved_sp, offset)); |
0 | 697 // st_off is LSW (i.e. reg.first()) |
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698 __ movq(Address(rsp, st_off), r13); |
0 | 699 } |
700 } else if (r_1->is_Register()) { // Register argument | |
701 Register r = r_1->as_Register(); | |
702 assert(r != rax, "must be different"); | |
703 if (r_2->is_valid()) { | |
704 // | |
705 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
706 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
707 // So we must adjust where to pick up the data to match the interpreter. | |
708 | |
709 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
710 next_off : ld_off; | |
711 | |
712 // this can be a misaligned move | |
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713 __ movq(r, Address(saved_sp, offset)); |
0 | 714 } else { |
715 // sign extend and use a full word? | |
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716 __ movl(r, Address(saved_sp, ld_off)); |
0 | 717 } |
718 } else { | |
719 if (!r_2->is_valid()) { | |
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720 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 721 } else { |
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722 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 723 } |
724 } | |
725 } | |
726 | |
727 // 6243940 We might end up in handle_wrong_method if | |
728 // the callee is deoptimized as we race thru here. If that | |
729 // happens we don't want to take a safepoint because the | |
730 // caller frame will look interpreted and arguments are now | |
731 // "compiled" so it is much better to make this transition | |
732 // invisible to the stack walking code. Unfortunately if | |
733 // we try and find the callee by normal means a safepoint | |
734 // is possible. So we stash the desired callee in the thread | |
735 // and the vm will find there should this case occur. | |
736 | |
304 | 737 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 738 |
739 // put methodOop where a c2i would expect should we end up there | |
740 // only needed becaus eof c2 resolve stubs return methodOop as a result in | |
741 // rax | |
304 | 742 __ mov(rax, rbx); |
0 | 743 __ jmp(r11); |
744 } | |
745 | |
746 // --------------------------------------------------------------- | |
747 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
748 int total_args_passed, | |
749 int comp_args_on_stack, | |
750 const BasicType *sig_bt, | |
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751 const VMRegPair *regs, |
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752 AdapterFingerPrint* fingerprint) { |
0 | 753 address i2c_entry = __ pc(); |
754 | |
755 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
756 | |
757 // ------------------------------------------------------------------------- | |
758 // Generate a C2I adapter. On entry we know rbx holds the methodOop during calls | |
759 // to the interpreter. The args start out packed in the compiled layout. They | |
760 // need to be unpacked into the interpreter layout. This will almost always | |
761 // require some stack space. We grow the current (compiled) stack, then repack | |
762 // the args. We finally end in a jump to the generic interpreter entry point. | |
763 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
764 // compiled code, which relys solely on SP and not RBP, get sick). | |
765 | |
766 address c2i_unverified_entry = __ pc(); | |
767 Label skip_fixup; | |
768 Label ok; | |
769 | |
770 Register holder = rax; | |
771 Register receiver = j_rarg0; | |
772 Register temp = rbx; | |
773 | |
774 { | |
775 __ verify_oop(holder); | |
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776 __ load_klass(temp, receiver); |
0 | 777 __ verify_oop(temp); |
778 | |
304 | 779 __ cmpptr(temp, Address(holder, compiledICHolderOopDesc::holder_klass_offset())); |
780 __ movptr(rbx, Address(holder, compiledICHolderOopDesc::holder_method_offset())); | |
0 | 781 __ jcc(Assembler::equal, ok); |
782 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
783 | |
784 __ bind(ok); | |
785 // Method might have been compiled since the call site was patched to | |
786 // interpreted if that is the case treat it as a miss so we can get | |
787 // the call site corrected. | |
304 | 788 __ cmpptr(Address(rbx, in_bytes(methodOopDesc::code_offset())), (int32_t)NULL_WORD); |
0 | 789 __ jcc(Assembler::equal, skip_fixup); |
790 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
791 } | |
792 | |
793 address c2i_entry = __ pc(); | |
794 | |
795 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
796 | |
797 __ flush(); | |
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798 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 799 } |
800 | |
801 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
802 VMRegPair *regs, | |
803 int total_args_passed) { | |
804 // We return the amount of VMRegImpl stack slots we need to reserve for all | |
805 // the arguments NOT counting out_preserve_stack_slots. | |
806 | |
807 // NOTE: These arrays will have to change when c1 is ported | |
808 #ifdef _WIN64 | |
809 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
810 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
811 }; | |
812 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
813 c_farg0, c_farg1, c_farg2, c_farg3 | |
814 }; | |
815 #else | |
816 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
817 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
818 }; | |
819 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
820 c_farg0, c_farg1, c_farg2, c_farg3, | |
821 c_farg4, c_farg5, c_farg6, c_farg7 | |
822 }; | |
823 #endif // _WIN64 | |
824 | |
825 | |
826 uint int_args = 0; | |
827 uint fp_args = 0; | |
828 uint stk_args = 0; // inc by 2 each time | |
829 | |
830 for (int i = 0; i < total_args_passed; i++) { | |
831 switch (sig_bt[i]) { | |
832 case T_BOOLEAN: | |
833 case T_CHAR: | |
834 case T_BYTE: | |
835 case T_SHORT: | |
836 case T_INT: | |
837 if (int_args < Argument::n_int_register_parameters_c) { | |
838 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
839 #ifdef _WIN64 | |
840 fp_args++; | |
841 // Allocate slots for callee to stuff register args the stack. | |
842 stk_args += 2; | |
843 #endif | |
844 } else { | |
845 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
846 stk_args += 2; | |
847 } | |
848 break; | |
849 case T_LONG: | |
850 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
851 // fall through | |
852 case T_OBJECT: | |
853 case T_ARRAY: | |
854 case T_ADDRESS: | |
855 if (int_args < Argument::n_int_register_parameters_c) { | |
856 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
857 #ifdef _WIN64 | |
858 fp_args++; | |
859 stk_args += 2; | |
860 #endif | |
861 } else { | |
862 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
863 stk_args += 2; | |
864 } | |
865 break; | |
866 case T_FLOAT: | |
867 if (fp_args < Argument::n_float_register_parameters_c) { | |
868 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
869 #ifdef _WIN64 | |
870 int_args++; | |
871 // Allocate slots for callee to stuff register args the stack. | |
872 stk_args += 2; | |
873 #endif | |
874 } else { | |
875 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
876 stk_args += 2; | |
877 } | |
878 break; | |
879 case T_DOUBLE: | |
880 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
881 if (fp_args < Argument::n_float_register_parameters_c) { | |
882 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
883 #ifdef _WIN64 | |
884 int_args++; | |
885 // Allocate slots for callee to stuff register args the stack. | |
886 stk_args += 2; | |
887 #endif | |
888 } else { | |
889 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
890 stk_args += 2; | |
891 } | |
892 break; | |
893 case T_VOID: // Halves of longs and doubles | |
894 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
895 regs[i].set_bad(); | |
896 break; | |
897 default: | |
898 ShouldNotReachHere(); | |
899 break; | |
900 } | |
901 } | |
902 #ifdef _WIN64 | |
903 // windows abi requires that we always allocate enough stack space | |
904 // for 4 64bit registers to be stored down. | |
905 if (stk_args < 8) { | |
906 stk_args = 8; | |
907 } | |
908 #endif // _WIN64 | |
909 | |
910 return stk_args; | |
911 } | |
912 | |
913 // On 64 bit we will store integer like items to the stack as | |
914 // 64 bits items (sparc abi) even though java would only store | |
915 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
916 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
917 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
918 if (src.first()->is_stack()) { | |
919 if (dst.first()->is_stack()) { | |
920 // stack to stack | |
921 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
922 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
923 } else { | |
924 // stack to reg | |
925 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
926 } | |
927 } else if (dst.first()->is_stack()) { | |
928 // reg to stack | |
929 // Do we really have to sign extend??? | |
930 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
931 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
932 } else { | |
933 // Do we really have to sign extend??? | |
934 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
935 if (dst.first() != src.first()) { | |
936 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
937 } | |
938 } | |
939 } | |
940 | |
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941 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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942 if (src.first()->is_stack()) { |
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943 if (dst.first()->is_stack()) { |
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944 // stack to stack |
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945 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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946 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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947 } else { |
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948 // stack to reg |
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949 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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950 } |
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951 } else if (dst.first()->is_stack()) { |
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952 // reg to stack |
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953 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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954 } else { |
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955 if (dst.first() != src.first()) { |
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956 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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957 } |
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958 } |
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959 } |
0 | 960 |
961 // An oop arg. Must pass a handle not the oop itself | |
962 static void object_move(MacroAssembler* masm, | |
963 OopMap* map, | |
964 int oop_handle_offset, | |
965 int framesize_in_slots, | |
966 VMRegPair src, | |
967 VMRegPair dst, | |
968 bool is_receiver, | |
969 int* receiver_offset) { | |
970 | |
971 // must pass a handle. First figure out the location we use as a handle | |
972 | |
973 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
974 | |
975 // See if oop is NULL if it is we need no handle | |
976 | |
977 if (src.first()->is_stack()) { | |
978 | |
979 // Oop is already on the stack as an argument | |
980 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
981 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
982 if (is_receiver) { | |
983 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
984 } | |
985 | |
304 | 986 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
987 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 988 // conditionally move a NULL |
304 | 989 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 990 } else { |
991 | |
992 // Oop is in an a register we must store it to the space we reserve | |
993 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
994 | |
995 const Register rOop = src.first()->as_Register(); | |
996 int oop_slot; | |
997 if (rOop == j_rarg0) | |
998 oop_slot = 0; | |
999 else if (rOop == j_rarg1) | |
1000 oop_slot = 1; | |
1001 else if (rOop == j_rarg2) | |
1002 oop_slot = 2; | |
1003 else if (rOop == j_rarg3) | |
1004 oop_slot = 3; | |
1005 else if (rOop == j_rarg4) | |
1006 oop_slot = 4; | |
1007 else { | |
1008 assert(rOop == j_rarg5, "wrong register"); | |
1009 oop_slot = 5; | |
1010 } | |
1011 | |
1012 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
1013 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1014 | |
1015 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1016 // Store oop in handle area, may be NULL | |
304 | 1017 __ movptr(Address(rsp, offset), rOop); |
0 | 1018 if (is_receiver) { |
1019 *receiver_offset = offset; | |
1020 } | |
1021 | |
304 | 1022 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1023 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1024 // conditionally move a NULL from the handle area where it was just stored |
304 | 1025 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1026 } |
1027 | |
1028 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1029 if (dst.first()->is_stack()) { | |
304 | 1030 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1031 } |
1032 } | |
1033 | |
1034 // A float arg may have to do float reg int reg conversion | |
1035 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1036 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1037 | |
1038 // The calling conventions assures us that each VMregpair is either | |
1039 // all really one physical register or adjacent stack slots. | |
1040 // This greatly simplifies the cases here compared to sparc. | |
1041 | |
1042 if (src.first()->is_stack()) { | |
1043 if (dst.first()->is_stack()) { | |
1044 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1045 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1046 } else { |
1047 // stack to reg | |
1048 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1049 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1050 } | |
1051 } else if (dst.first()->is_stack()) { | |
1052 // reg to stack | |
1053 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1054 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1055 } else { | |
1056 // reg to reg | |
1057 // In theory these overlap but the ordering is such that this is likely a nop | |
1058 if ( src.first() != dst.first()) { | |
1059 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1060 } | |
1061 } | |
1062 } | |
1063 | |
1064 // A long move | |
1065 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1066 | |
1067 // The calling conventions assures us that each VMregpair is either | |
1068 // all really one physical register or adjacent stack slots. | |
1069 // This greatly simplifies the cases here compared to sparc. | |
1070 | |
1071 if (src.is_single_phys_reg() ) { | |
1072 if (dst.is_single_phys_reg()) { | |
1073 if (dst.first() != src.first()) { | |
304 | 1074 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1075 } |
1076 } else { | |
1077 assert(dst.is_single_reg(), "not a stack pair"); | |
1078 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1079 } | |
1080 } else if (dst.is_single_phys_reg()) { | |
1081 assert(src.is_single_reg(), "not a stack pair"); | |
1082 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1083 } else { | |
1084 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1085 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1086 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1087 } | |
1088 } | |
1089 | |
1090 // A double move | |
1091 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1092 | |
1093 // The calling conventions assures us that each VMregpair is either | |
1094 // all really one physical register or adjacent stack slots. | |
1095 // This greatly simplifies the cases here compared to sparc. | |
1096 | |
1097 if (src.is_single_phys_reg() ) { | |
1098 if (dst.is_single_phys_reg()) { | |
1099 // In theory these overlap but the ordering is such that this is likely a nop | |
1100 if ( src.first() != dst.first()) { | |
1101 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1102 } | |
1103 } else { | |
1104 assert(dst.is_single_reg(), "not a stack pair"); | |
1105 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1106 } | |
1107 } else if (dst.is_single_phys_reg()) { | |
1108 assert(src.is_single_reg(), "not a stack pair"); | |
1109 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1110 } else { | |
1111 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1112 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1113 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1114 } | |
1115 } | |
1116 | |
1117 | |
1118 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1119 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1120 // which by this time is free to use | |
1121 switch (ret_type) { | |
1122 case T_FLOAT: | |
1123 __ movflt(Address(rbp, -wordSize), xmm0); | |
1124 break; | |
1125 case T_DOUBLE: | |
1126 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1127 break; | |
1128 case T_VOID: break; | |
1129 default: { | |
304 | 1130 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1131 } |
1132 } | |
1133 } | |
1134 | |
1135 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1136 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1137 // which by this time is free to use | |
1138 switch (ret_type) { | |
1139 case T_FLOAT: | |
1140 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1141 break; | |
1142 case T_DOUBLE: | |
1143 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1144 break; | |
1145 case T_VOID: break; | |
1146 default: { | |
304 | 1147 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1148 } |
1149 } | |
1150 } | |
1151 | |
1152 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1153 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1154 if (args[i].first()->is_Register()) { | |
304 | 1155 __ push(args[i].first()->as_Register()); |
0 | 1156 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1157 __ subptr(rsp, 2*wordSize); |
0 | 1158 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1159 } | |
1160 } | |
1161 } | |
1162 | |
1163 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1164 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1165 if (args[i].first()->is_Register()) { | |
304 | 1166 __ pop(args[i].first()->as_Register()); |
0 | 1167 } else if (args[i].first()->is_XMMRegister()) { |
1168 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1169 __ addptr(rsp, 2*wordSize); |
0 | 1170 } |
1171 } | |
1172 } | |
1173 | |
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1174 |
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1175 static void save_or_restore_arguments(MacroAssembler* masm, |
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1176 const int stack_slots, |
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1177 const int total_in_args, |
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1178 const int arg_save_area, |
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1179 OopMap* map, |
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1180 VMRegPair* in_regs, |
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1181 BasicType* in_sig_bt) { |
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1182 // if map is non-NULL then the code should store the values, |
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1183 // otherwise it should load them. |
5905 | 1184 int slot = arg_save_area; |
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1185 // Save down double word first |
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1186 for ( int i = 0; i < total_in_args; i++) { |
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1187 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1188 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1189 slot += VMRegImpl::slots_per_word; |
1190 assert(slot <= stack_slots, "overflow"); | |
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1191 if (map != NULL) { |
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1192 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1193 } else { |
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1194 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1195 } |
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1196 } |
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1197 if (in_regs[i].first()->is_Register() && |
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1198 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1199 int offset = slot * VMRegImpl::stack_slot_size; |
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1200 if (map != NULL) { |
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1201 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1202 if (in_sig_bt[i] == T_ARRAY) { |
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1203 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1204 } |
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1205 } else { |
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1206 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1207 } |
5907 | 1208 slot += VMRegImpl::slots_per_word; |
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1209 } |
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1210 } |
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1211 // Save or restore single word registers |
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1212 for ( int i = 0; i < total_in_args; i++) { |
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1213 if (in_regs[i].first()->is_Register()) { |
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1214 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1215 slot++; |
1216 assert(slot <= stack_slots, "overflow"); | |
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1217 |
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1218 // Value is in an input register pass we must flush it to the stack |
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1219 const Register reg = in_regs[i].first()->as_Register(); |
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1220 switch (in_sig_bt[i]) { |
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1221 case T_BOOLEAN: |
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1222 case T_CHAR: |
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1223 case T_BYTE: |
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1224 case T_SHORT: |
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1225 case T_INT: |
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1226 if (map != NULL) { |
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1227 __ movl(Address(rsp, offset), reg); |
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1228 } else { |
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1229 __ movl(reg, Address(rsp, offset)); |
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1230 } |
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1231 break; |
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1232 case T_ARRAY: |
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1233 case T_LONG: |
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1234 // handled above |
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1235 break; |
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1236 case T_OBJECT: |
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1237 default: ShouldNotReachHere(); |
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1238 } |
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1239 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1240 if (in_sig_bt[i] == T_FLOAT) { |
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1241 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1242 slot++; |
1243 assert(slot <= stack_slots, "overflow"); | |
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1244 if (map != NULL) { |
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1245 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1246 } else { |
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1247 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1248 } |
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1249 } |
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1250 } else if (in_regs[i].first()->is_stack()) { |
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1251 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1252 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1253 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1254 } |
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1255 } |
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1256 } |
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1257 } |
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1258 |
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1259 |
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1260 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1261 // keeps a new JNI critical region from starting until a GC has been |
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1262 // forced. Save down any oops in registers and describe them in an |
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1263 // OopMap. |
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1264 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1265 int stack_slots, |
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1266 int total_c_args, |
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1267 int total_in_args, |
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1268 int arg_save_area, |
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1269 OopMapSet* oop_maps, |
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1270 VMRegPair* in_regs, |
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1271 BasicType* in_sig_bt) { |
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1272 __ block_comment("check GC_locker::needs_gc"); |
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1273 Label cont; |
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1274 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1275 __ jcc(Assembler::equal, cont); |
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1276 |
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1277 // Save down any incoming oops and call into the runtime to halt for a GC |
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1278 |
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1279 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1280 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1281 arg_save_area, map, in_regs, in_sig_bt); |
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1282 |
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1283 address the_pc = __ pc(); |
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1284 oop_maps->add_gc_map( __ offset(), map); |
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1285 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1286 |
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1287 __ block_comment("block_for_jni_critical"); |
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1288 __ movptr(c_rarg0, r15_thread); |
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1289 __ mov(r12, rsp); // remember sp |
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1290 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1291 __ andptr(rsp, -16); // align stack as required by ABI |
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1292 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1293 __ mov(rsp, r12); // restore sp |
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1294 __ reinit_heapbase(); |
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1295 |
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1296 __ reset_last_Java_frame(false, true); |
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1297 |
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1298 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1299 arg_save_area, NULL, in_regs, in_sig_bt); |
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1300 |
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1301 __ bind(cont); |
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1302 #ifdef ASSERT |
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1303 if (StressCriticalJNINatives) { |
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1304 // Stress register saving |
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1305 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1306 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1307 arg_save_area, map, in_regs, in_sig_bt); |
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1308 // Destroy argument registers |
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1309 for (int i = 0; i < total_in_args - 1; i++) { |
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1310 if (in_regs[i].first()->is_Register()) { |
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1311 const Register reg = in_regs[i].first()->as_Register(); |
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1312 __ xorptr(reg, reg); |
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1313 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1314 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1315 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1316 ShouldNotReachHere(); |
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1317 } else if (in_regs[i].first()->is_stack()) { |
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1318 // Nothing to do |
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1319 } else { |
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1320 ShouldNotReachHere(); |
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1321 } |
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1322 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1323 i++; |
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1324 } |
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1325 } |
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1326 |
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1327 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1328 arg_save_area, NULL, in_regs, in_sig_bt); |
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1329 } |
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1330 #endif |
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1331 } |
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1332 |
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1333 // Unpack an array argument into a pointer to the body and the length |
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1334 // if the array is non-null, otherwise pass 0 for both. |
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1335 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1336 Register tmp_reg = rax; |
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1337 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1338 "possible collision"); |
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1339 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1340 "possible collision"); |
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1341 |
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1342 // Pass the length, ptr pair |
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1343 Label is_null, done; |
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1344 VMRegPair tmp; |
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1345 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1346 if (reg.first()->is_stack()) { |
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1347 // Load the arg up from the stack |
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1348 move_ptr(masm, reg, tmp); |
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1349 reg = tmp; |
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1350 } |
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1351 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1352 __ jccb(Assembler::equal, is_null); |
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1353 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1354 move_ptr(masm, tmp, body_arg); |
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1355 // load the length relative to the body. |
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1356 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1357 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1358 move32_64(masm, tmp, length_arg); |
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1359 __ jmpb(done); |
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1360 __ bind(is_null); |
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1361 // Pass zeros |
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1362 __ xorptr(tmp_reg, tmp_reg); |
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1363 move_ptr(masm, tmp, body_arg); |
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1364 move32_64(masm, tmp, length_arg); |
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1365 __ bind(done); |
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1366 } |
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1367 |
5905 | 1368 |
1369 class ComputeMoveOrder: public StackObj { | |
1370 class MoveOperation: public ResourceObj { | |
1371 friend class ComputeMoveOrder; | |
1372 private: | |
1373 VMRegPair _src; | |
1374 VMRegPair _dst; | |
1375 int _src_index; | |
1376 int _dst_index; | |
1377 bool _processed; | |
1378 MoveOperation* _next; | |
1379 MoveOperation* _prev; | |
1380 | |
1381 static int get_id(VMRegPair r) { | |
1382 return r.first()->value(); | |
1383 } | |
1384 | |
1385 public: | |
1386 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
1387 _src(src) | |
1388 , _src_index(src_index) | |
1389 , _dst(dst) | |
1390 , _dst_index(dst_index) | |
1391 , _next(NULL) | |
1392 , _prev(NULL) | |
1393 , _processed(false) { | |
1394 } | |
1395 | |
1396 VMRegPair src() const { return _src; } | |
1397 int src_id() const { return get_id(src()); } | |
1398 int src_index() const { return _src_index; } | |
1399 VMRegPair dst() const { return _dst; } | |
1400 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
1401 int dst_index() const { return _dst_index; } | |
1402 int dst_id() const { return get_id(dst()); } | |
1403 MoveOperation* next() const { return _next; } | |
1404 MoveOperation* prev() const { return _prev; } | |
1405 void set_processed() { _processed = true; } | |
1406 bool is_processed() const { return _processed; } | |
1407 | |
1408 // insert | |
1409 void break_cycle(VMRegPair temp_register) { | |
1410 // create a new store following the last store | |
1411 // to move from the temp_register to the original | |
1412 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
1413 | |
1414 // break the cycle of links and insert new_store at the end | |
1415 // break the reverse link. | |
1416 MoveOperation* p = prev(); | |
1417 assert(p->next() == this, "must be"); | |
1418 _prev = NULL; | |
1419 p->_next = new_store; | |
1420 new_store->_prev = p; | |
1421 | |
1422 // change the original store to save it's value in the temp. | |
1423 set_dst(-1, temp_register); | |
1424 } | |
1425 | |
1426 void link(GrowableArray<MoveOperation*>& killer) { | |
1427 // link this store in front the store that it depends on | |
1428 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
1429 if (n != NULL) { | |
1430 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
1431 _next = n; | |
1432 n->_prev = this; | |
1433 } | |
1434 } | |
1435 }; | |
1436 | |
1437 private: | |
1438 GrowableArray<MoveOperation*> edges; | |
1439 | |
1440 public: | |
1441 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
1442 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
1443 // Move operations where the dest is the stack can all be | |
1444 // scheduled first since they can't interfere with the other moves. | |
1445 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
1446 if (in_sig_bt[i] == T_ARRAY) { | |
1447 c_arg--; | |
1448 if (out_regs[c_arg].first()->is_stack() && | |
1449 out_regs[c_arg + 1].first()->is_stack()) { | |
1450 arg_order.push(i); | |
1451 arg_order.push(c_arg); | |
1452 } else { | |
1453 if (out_regs[c_arg].first()->is_stack() || | |
1454 in_regs[i].first() == out_regs[c_arg].first()) { | |
1455 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
1456 } else { | |
1457 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1458 } | |
1459 } | |
1460 } else if (in_sig_bt[i] == T_VOID) { | |
1461 arg_order.push(i); | |
1462 arg_order.push(c_arg); | |
1463 } else { | |
1464 if (out_regs[c_arg].first()->is_stack() || | |
1465 in_regs[i].first() == out_regs[c_arg].first()) { | |
1466 arg_order.push(i); | |
1467 arg_order.push(c_arg); | |
1468 } else { | |
1469 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1470 } | |
1471 } | |
1472 } | |
1473 // Break any cycles in the register moves and emit the in the | |
1474 // proper order. | |
1475 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
1476 for (int i = 0; i < stores->length(); i++) { | |
1477 arg_order.push(stores->at(i)->src_index()); | |
1478 arg_order.push(stores->at(i)->dst_index()); | |
1479 } | |
1480 } | |
1481 | |
1482 // Collected all the move operations | |
1483 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
1484 if (src.first() == dst.first()) return; | |
1485 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
1486 } | |
1487 | |
1488 // Walk the edges breaking cycles between moves. The result list | |
1489 // can be walked in order to produce the proper set of loads | |
1490 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
1491 // Record which moves kill which values | |
1492 GrowableArray<MoveOperation*> killer; | |
1493 for (int i = 0; i < edges.length(); i++) { | |
1494 MoveOperation* s = edges.at(i); | |
1495 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
1496 killer.at_put_grow(s->dst_id(), s, NULL); | |
1497 } | |
1498 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
1499 "make sure temp isn't in the registers that are killed"); | |
1500 | |
1501 // create links between loads and stores | |
1502 for (int i = 0; i < edges.length(); i++) { | |
1503 edges.at(i)->link(killer); | |
1504 } | |
1505 | |
1506 // at this point, all the move operations are chained together | |
1507 // in a doubly linked list. Processing it backwards finds | |
1508 // the beginning of the chain, forwards finds the end. If there's | |
1509 // a cycle it can be broken at any point, so pick an edge and walk | |
1510 // backward until the list ends or we end where we started. | |
1511 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
1512 for (int e = 0; e < edges.length(); e++) { | |
1513 MoveOperation* s = edges.at(e); | |
1514 if (!s->is_processed()) { | |
1515 MoveOperation* start = s; | |
1516 // search for the beginning of the chain or cycle | |
1517 while (start->prev() != NULL && start->prev() != s) { | |
1518 start = start->prev(); | |
1519 } | |
1520 if (start->prev() == s) { | |
1521 start->break_cycle(temp_register); | |
1522 } | |
1523 // walk the chain forward inserting to store list | |
1524 while (start != NULL) { | |
1525 stores->append(start); | |
1526 start->set_processed(); | |
1527 start = start->next(); | |
1528 } | |
1529 } | |
1530 } | |
1531 return stores; | |
1532 } | |
1533 }; | |
1534 | |
1535 | |
0 | 1536 // --------------------------------------------------------------------------- |
1537 // Generate a native wrapper for a given method. The method takes arguments | |
1538 // in the Java compiled code convention, marshals them to the native | |
1539 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1540 // returns to java state (possibly blocking), unhandlizes any result and | |
1541 // returns. | |
1542 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm, | |
1543 methodHandle method, | |
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1544 int compile_id, |
0 | 1545 int total_in_args, |
1546 int comp_args_on_stack, | |
1547 BasicType *in_sig_bt, | |
1548 VMRegPair *in_regs, | |
1549 BasicType ret_type) { | |
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1550 bool is_critical_native = true; |
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1551 address native_func = method->critical_native_function(); |
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1552 if (native_func == NULL) { |
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1553 native_func = method->native_function(); |
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1554 is_critical_native = false; |
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1555 } |
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1556 assert(native_func != NULL, "must have function"); |
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1557 |
0 | 1558 // An OopMap for lock (and class if static) |
1559 OopMapSet *oop_maps = new OopMapSet(); | |
1560 intptr_t start = (intptr_t)__ pc(); | |
1561 | |
1562 // We have received a description of where all the java arg are located | |
1563 // on entry to the wrapper. We need to convert these args to where | |
1564 // the jni function will expect them. To figure out where they go | |
1565 // we convert the java signature to a C signature by inserting | |
1566 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1567 | |
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1568 int total_c_args = total_in_args; |
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1569 if (!is_critical_native) { |
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1570 total_c_args += 1; |
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1571 if (method->is_static()) { |
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1572 total_c_args++; |
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1573 } |
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1574 } else { |
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1575 for (int i = 0; i < total_in_args; i++) { |
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1576 if (in_sig_bt[i] == T_ARRAY) { |
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1577 total_c_args++; |
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1578 } |
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1579 } |
0 | 1580 } |
1581 | |
1582 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1583 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1584 BasicType* in_elem_bt = NULL; |
0 | 1585 |
1586 int argc = 0; | |
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1587 if (!is_critical_native) { |
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1588 out_sig_bt[argc++] = T_ADDRESS; |
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1589 if (method->is_static()) { |
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1590 out_sig_bt[argc++] = T_OBJECT; |
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1591 } |
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1592 |
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1593 for (int i = 0; i < total_in_args ; i++ ) { |
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1594 out_sig_bt[argc++] = in_sig_bt[i]; |
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1595 } |
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1596 } else { |
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1597 Thread* THREAD = Thread::current(); |
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1598 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1599 SignatureStream ss(method->signature()); |
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1600 for (int i = 0; i < total_in_args ; i++ ) { |
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1601 if (in_sig_bt[i] == T_ARRAY) { |
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1602 // Arrays are passed as int, elem* pair |
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1603 out_sig_bt[argc++] = T_INT; |
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1604 out_sig_bt[argc++] = T_ADDRESS; |
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1605 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1606 const char* at = atype->as_C_string(); |
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1607 if (strlen(at) == 2) { |
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1608 assert(at[0] == '[', "must be"); |
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1609 switch (at[1]) { |
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1610 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1611 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1612 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1613 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1614 case 'I': in_elem_bt[i] = T_INT; break; |
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1615 case 'J': in_elem_bt[i] = T_LONG; break; |
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1616 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1617 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1618 default: ShouldNotReachHere(); |
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1619 } |
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1620 } |
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1621 } else { |
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1622 out_sig_bt[argc++] = in_sig_bt[i]; |
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1623 in_elem_bt[i] = T_VOID; |
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1624 } |
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1625 if (in_sig_bt[i] != T_VOID) { |
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1626 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1627 ss.next(); |
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1628 } |
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1629 } |
0 | 1630 } |
1631 | |
1632 // Now figure out where the args must be stored and how much stack space | |
1633 // they require. | |
1634 int out_arg_slots; | |
1635 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); | |
1636 | |
1637 // Compute framesize for the wrapper. We need to handlize all oops in | |
1638 // incoming registers | |
1639 | |
1640 // Calculate the total number of stack slots we will need. | |
1641 | |
1642 // First count the abi requirement plus all of the outgoing args | |
1643 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1644 | |
1645 // Now the space for the inbound oop handle area | |
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1646 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1647 if (is_critical_native) { |
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1648 // Critical natives may have to call out so they need a save area |
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1649 // for register arguments. |
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1650 int double_slots = 0; |
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1651 int single_slots = 0; |
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1652 for ( int i = 0; i < total_in_args; i++) { |
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1653 if (in_regs[i].first()->is_Register()) { |
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1654 const Register reg = in_regs[i].first()->as_Register(); |
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1655 switch (in_sig_bt[i]) { |
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1656 case T_BOOLEAN: |
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1657 case T_BYTE: |
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1658 case T_SHORT: |
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1659 case T_CHAR: |
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1660 case T_INT: single_slots++; break; |
5905 | 1661 case T_ARRAY: |
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1662 case T_LONG: double_slots++; break; |
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1663 default: ShouldNotReachHere(); |
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1664 } |
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1665 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1666 switch (in_sig_bt[i]) { |
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1667 case T_FLOAT: single_slots++; break; |
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1668 case T_DOUBLE: double_slots++; break; |
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1669 default: ShouldNotReachHere(); |
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1670 } |
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1671 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1672 ShouldNotReachHere(); |
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1673 } |
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1674 } |
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1675 total_save_slots = double_slots * 2 + single_slots; |
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1676 // align the save area |
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1677 if (double_slots != 0) { |
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1678 stack_slots = round_to(stack_slots, 2); |
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1679 } |
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1680 } |
0 | 1681 |
1682 int oop_handle_offset = stack_slots; | |
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1683 stack_slots += total_save_slots; |
0 | 1684 |
1685 // Now any space we need for handlizing a klass if static method | |
1686 | |
1687 int klass_slot_offset = 0; | |
1688 int klass_offset = -1; | |
1689 int lock_slot_offset = 0; | |
1690 bool is_static = false; | |
1691 | |
1692 if (method->is_static()) { | |
1693 klass_slot_offset = stack_slots; | |
1694 stack_slots += VMRegImpl::slots_per_word; | |
1695 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1696 is_static = true; | |
1697 } | |
1698 | |
1699 // Plus a lock if needed | |
1700 | |
1701 if (method->is_synchronized()) { | |
1702 lock_slot_offset = stack_slots; | |
1703 stack_slots += VMRegImpl::slots_per_word; | |
1704 } | |
1705 | |
1706 // Now a place (+2) to save return values or temp during shuffling | |
1707 // + 4 for return address (which we own) and saved rbp | |
1708 stack_slots += 6; | |
1709 | |
1710 // Ok The space we have allocated will look like: | |
1711 // | |
1712 // | |
1713 // FP-> | | | |
1714 // |---------------------| | |
1715 // | 2 slots for moves | | |
1716 // |---------------------| | |
1717 // | lock box (if sync) | | |
1718 // |---------------------| <- lock_slot_offset | |
1719 // | klass (if static) | | |
1720 // |---------------------| <- klass_slot_offset | |
1721 // | oopHandle area | | |
1722 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
1723 // | outbound memory | | |
1724 // | based arguments | | |
1725 // | | | |
1726 // |---------------------| | |
1727 // | | | |
1728 // SP-> | out_preserved_slots | | |
1729 // | |
1730 // | |
1731 | |
1732 | |
1733 // Now compute actual number of stack words we need rounding to make | |
1734 // stack properly aligned. | |
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1735 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1736 |
1737 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1738 | |
1739 // First thing make an ic check to see if we should even be here | |
1740 | |
1741 // We are free to use all registers as temps without saving them and | |
1742 // restoring them except rbp. rbp is the only callee save register | |
1743 // as far as the interpreter and the compiler(s) are concerned. | |
1744 | |
1745 | |
1746 const Register ic_reg = rax; | |
1747 const Register receiver = j_rarg0; | |
1748 | |
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1749 Label hit; |
0 | 1750 Label exception_pending; |
1751 | |
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1752 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 1753 __ verify_oop(receiver); |
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1754 __ load_klass(rscratch1, receiver); |
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1755 __ cmpq(ic_reg, rscratch1); |
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1756 __ jcc(Assembler::equal, hit); |
0 | 1757 |
1758 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1759 | |
1760 // Verified entry point must be aligned | |
1761 __ align(8); | |
1762 | |
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1763 __ bind(hit); |
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1764 |
0 | 1765 int vep_offset = ((intptr_t)__ pc()) - start; |
1766 | |
1767 // The instruction at the verified entry point must be 5 bytes or longer | |
1768 // because it can be patched on the fly by make_non_entrant. The stack bang | |
1769 // instruction fits that requirement. | |
1770 | |
1771 // Generate stack overflow check | |
1772 | |
1773 if (UseStackBanging) { | |
1774 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
1775 } else { | |
1776 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
1777 __ fat_nop(); | |
1778 } | |
1779 | |
1780 // Generate a new frame for the wrapper. | |
1781 __ enter(); | |
1782 // -2 because return address is already present and so is saved rbp | |
304 | 1783 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 1784 |
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1785 // Frame is now completed as far as size and linkage. |
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1786 int frame_complete = ((intptr_t)__ pc()) - start; |
0 | 1787 |
1788 #ifdef ASSERT | |
1789 { | |
1790 Label L; | |
304 | 1791 __ mov(rax, rsp); |
605 | 1792 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 1793 __ cmpptr(rax, rsp); |
0 | 1794 __ jcc(Assembler::equal, L); |
1795 __ stop("improperly aligned stack"); | |
1796 __ bind(L); | |
1797 } | |
1798 #endif /* ASSERT */ | |
1799 | |
1800 | |
1801 // We use r14 as the oop handle for the receiver/klass | |
1802 // It is callee save so it survives the call to native | |
1803 | |
1804 const Register oop_handle_reg = r14; | |
1805 | |
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1806 if (is_critical_native) { |
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1807 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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1808 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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1809 } |
0 | 1810 |
1811 // | |
1812 // We immediately shuffle the arguments so that any vm call we have to | |
1813 // make from here on out (sync slow path, jvmti, etc.) we will have | |
1814 // captured the oops from our caller and have a valid oopMap for | |
1815 // them. | |
1816 | |
1817 // ----------------- | |
1818 // The Grand Shuffle | |
1819 | |
1820 // The Java calling convention is either equal (linux) or denser (win64) than the | |
1821 // c calling convention. However the because of the jni_env argument the c calling | |
1822 // convention always has at least one more (and two for static) arguments than Java. | |
1823 // Therefore if we move the args from java -> c backwards then we will never have | |
1824 // a register->register conflict and we don't have to build a dependency graph | |
1825 // and figure out how to break any cycles. | |
1826 // | |
1827 | |
1828 // Record esp-based slot for receiver on stack for non-static methods | |
1829 int receiver_offset = -1; | |
1830 | |
1831 // This is a trick. We double the stack slots so we can claim | |
1832 // the oops in the caller's frame. Since we are sure to have | |
1833 // more args than the caller doubling is enough to make | |
1834 // sure we can capture all the incoming oop args from the | |
1835 // caller. | |
1836 // | |
1837 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
1838 | |
1839 // Mark location of rbp (someday) | |
1840 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
1841 | |
1842 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
1843 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
1844 | |
1845 | |
1846 #ifdef ASSERT | |
1847 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
1848 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
1849 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
1850 reg_destroyed[r] = false; | |
1851 } | |
1852 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
1853 freg_destroyed[f] = false; | |
1854 } | |
1855 | |
1856 #endif /* ASSERT */ | |
1857 | |
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1858 // This may iterate in two different directions depending on the |
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1859 // kind of native it is. The reason is that for regular JNI natives |
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1860 // the incoming and outgoing registers are offset upwards and for |
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1861 // critical natives they are offset down. |
5905 | 1862 GrowableArray<int> arg_order(2 * total_in_args); |
1863 VMRegPair tmp_vmreg; | |
1864 tmp_vmreg.set1(rbx->as_VMReg()); | |
1865 | |
1866 if (!is_critical_native) { | |
1867 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
1868 arg_order.push(i); | |
1869 arg_order.push(c_arg); | |
1870 } | |
1871 } else { | |
1872 // Compute a valid move order, using tmp_vmreg to break any cycles | |
1873 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
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1874 } |
5905 | 1875 |
1876 int temploc = -1; | |
1877 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
1878 int i = arg_order.at(ai); | |
1879 int c_arg = arg_order.at(ai + 1); | |
1880 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
1881 if (c_arg == -1) { | |
1882 assert(is_critical_native, "should only be required for critical natives"); | |
1883 // This arg needs to be moved to a temporary | |
1884 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
1885 in_regs[i] = tmp_vmreg; | |
1886 temploc = i; | |
1887 continue; | |
1888 } else if (i == -1) { | |
1889 assert(is_critical_native, "should only be required for critical natives"); | |
1890 // Read from the temporary location | |
1891 assert(temploc != -1, "must be valid"); | |
1892 i = temploc; | |
1893 temploc = -1; | |
1894 } | |
0 | 1895 #ifdef ASSERT |
1896 if (in_regs[i].first()->is_Register()) { | |
1897 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
1898 } else if (in_regs[i].first()->is_XMMRegister()) { | |
1899 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
1900 } | |
1901 if (out_regs[c_arg].first()->is_Register()) { | |
1902 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
1903 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
1904 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
1905 } | |
1906 #endif /* ASSERT */ | |
1907 switch (in_sig_bt[i]) { | |
1908 case T_ARRAY: | |
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1909 if (is_critical_native) { |
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1910 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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1911 c_arg++; |
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1912 #ifdef ASSERT |
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1913 if (out_regs[c_arg].first()->is_Register()) { |
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1914 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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1915 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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1916 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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1917 } |
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1918 #endif |
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1919 break; |
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1920 } |
0 | 1921 case T_OBJECT: |
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1922 assert(!is_critical_native, "no oop arguments"); |
0 | 1923 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
1924 ((i == 0) && (!is_static)), | |
1925 &receiver_offset); | |
1926 break; | |
1927 case T_VOID: | |
1928 break; | |
1929 | |
1930 case T_FLOAT: | |
1931 float_move(masm, in_regs[i], out_regs[c_arg]); | |
1932 break; | |
1933 | |
1934 case T_DOUBLE: | |
1935 assert( i + 1 < total_in_args && | |
1936 in_sig_bt[i + 1] == T_VOID && | |
1937 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
1938 double_move(masm, in_regs[i], out_regs[c_arg]); | |
1939 break; | |
1940 | |
1941 case T_LONG : | |
1942 long_move(masm, in_regs[i], out_regs[c_arg]); | |
1943 break; | |
1944 | |
1945 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
1946 | |
1947 default: | |
1948 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
1949 } | |
1950 } | |
1951 | |
1952 // point c_arg at the first arg that is already loaded in case we | |
1953 // need to spill before we call out | |
5905 | 1954 int c_arg = total_c_args - total_in_args; |
0 | 1955 |
1956 // Pre-load a static method's oop into r14. Used both by locking code and | |
1957 // the normal JNI call code. | |
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1958 if (method->is_static() && !is_critical_native) { |
0 | 1959 |
1960 // load oop into a register | |
1961 __ movoop(oop_handle_reg, JNIHandles::make_local(Klass::cast(method->method_holder())->java_mirror())); | |
1962 | |
1963 // Now handlize the static class mirror it's known not-null. | |
304 | 1964 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
0 | 1965 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
1966 | |
1967 // Now get the handle | |
304 | 1968 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
0 | 1969 // store the klass handle as second argument |
304 | 1970 __ movptr(c_rarg1, oop_handle_reg); |
0 | 1971 // and protect the arg if we must spill |
1972 c_arg--; | |
1973 } | |
1974 | |
1975 // Change state to native (we save the return address in the thread, since it might not | |
1976 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
1977 // points into the right code segment. It does not have to be the correct return pc. | |
1978 // We use the same pc/oopMap repeatedly when we call out | |
1979 | |
1980 intptr_t the_pc = (intptr_t) __ pc(); | |
1981 oop_maps->add_gc_map(the_pc - start, map); | |
1982 | |
1983 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
1984 | |
1985 | |
1986 // We have all of the arguments setup at this point. We must not touch any register | |
1987 // argument registers at this point (what if we save/restore them there are no oop? | |
1988 | |
1989 { | |
1990 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
1991 // protect the args we've loaded | |
1992 save_args(masm, total_c_args, c_arg, out_regs); | |
1993 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
1994 __ call_VM_leaf( | |
1995 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
1996 r15_thread, c_rarg1); | |
1997 restore_args(masm, total_c_args, c_arg, out_regs); | |
1998 } | |
1999 | |
610
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2000 // RedefineClasses() tracing support for obsolete method entry |
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2001 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2002 // protect the args we've loaded |
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2003 save_args(masm, total_c_args, c_arg, out_regs); |
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2004 __ movoop(c_rarg1, JNIHandles::make_local(method())); |
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2005 __ call_VM_leaf( |
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2006 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2007 r15_thread, c_rarg1); |
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2008 restore_args(masm, total_c_args, c_arg, out_regs); |
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2009 } |
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2010 |
0 | 2011 // Lock a synchronized method |
2012 | |
2013 // Register definitions used by locking and unlocking | |
2014 | |
2015 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
2016 const Register obj_reg = rbx; // Will contain the oop | |
2017 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
2018 const Register old_hdr = r13; // value of old header at unlock time | |
2019 | |
2020 Label slow_path_lock; | |
2021 Label lock_done; | |
2022 | |
2023 if (method->is_synchronized()) { | |
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2024 assert(!is_critical_native, "unhandled"); |
0 | 2025 |
2026 | |
2027 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
2028 | |
2029 // Get the handle (the 2nd argument) | |
304 | 2030 __ mov(oop_handle_reg, c_rarg1); |
0 | 2031 |
2032 // Get address of the box | |
2033 | |
304 | 2034 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2035 |
2036 // Load the oop from the handle | |
304 | 2037 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2038 |
2039 if (UseBiasedLocking) { | |
2040 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
2041 } | |
2042 | |
2043 // Load immediate 1 into swap_reg %rax | |
2044 __ movl(swap_reg, 1); | |
2045 | |
2046 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 2047 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 2048 |
2049 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 2050 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2051 |
2052 if (os::is_MP()) { | |
2053 __ lock(); | |
2054 } | |
2055 | |
2056 // src -> dest iff dest == rax else rax <- dest | |
304 | 2057 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 2058 __ jcc(Assembler::equal, lock_done); |
2059 | |
2060 // Hmm should this move to the slow path code area??? | |
2061 | |
2062 // Test if the oopMark is an obvious stack pointer, i.e., | |
2063 // 1) (mark & 3) == 0, and | |
2064 // 2) rsp <= mark < mark + os::pagesize() | |
2065 // These 3 tests can be done by evaluating the following | |
2066 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
2067 // assuming both stack pointer and pagesize have their | |
2068 // least significant 2 bits clear. | |
2069 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
2070 | |
304 | 2071 __ subptr(swap_reg, rsp); |
2072 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 2073 |
2074 // Save the test result, for recursive case, the result is zero | |
304 | 2075 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2076 __ jcc(Assembler::notEqual, slow_path_lock); |
2077 | |
2078 // Slow path will re-enter here | |
2079 | |
2080 __ bind(lock_done); | |
2081 } | |
2082 | |
2083 | |
2084 // Finally just about ready to make the JNI call | |
2085 | |
2086 | |
2087 // get JNIEnv* which is first argument to native | |
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2088 if (!is_critical_native) { |
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2089 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2090 } |
0 | 2091 |
2092 // Now set thread in native | |
304 | 2093 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 2094 |
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2095 __ call(RuntimeAddress(native_func)); |
0 | 2096 |
2097 // Either restore the MXCSR register after returning from the JNI Call | |
2098 // or verify that it wasn't changed. | |
2099 if (RestoreMXCSROnJNICalls) { | |
304 | 2100 __ ldmxcsr(ExternalAddress(StubRoutines::x86::mxcsr_std())); |
0 | 2101 |
2102 } | |
2103 else if (CheckJNICalls ) { | |
304 | 2104 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::verify_mxcsr_entry()))); |
0 | 2105 } |
2106 | |
2107 | |
2108 // Unpack native results. | |
2109 switch (ret_type) { | |
2110 case T_BOOLEAN: __ c2bool(rax); break; | |
2111 case T_CHAR : __ movzwl(rax, rax); break; | |
2112 case T_BYTE : __ sign_extend_byte (rax); break; | |
2113 case T_SHORT : __ sign_extend_short(rax); break; | |
2114 case T_INT : /* nothing to do */ break; | |
2115 case T_DOUBLE : | |
2116 case T_FLOAT : | |
2117 // Result is in xmm0 we'll save as needed | |
2118 break; | |
2119 case T_ARRAY: // Really a handle | |
2120 case T_OBJECT: // Really a handle | |
2121 break; // can't de-handlize until after safepoint check | |
2122 case T_VOID: break; | |
2123 case T_LONG: break; | |
2124 default : ShouldNotReachHere(); | |
2125 } | |
2126 | |
2127 // Switch thread to "native transition" state before reading the synchronization state. | |
2128 // This additional state is necessary because reading and testing the synchronization | |
2129 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2130 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2131 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2132 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2133 // didn't see any synchronization is progress, and escapes. | |
304 | 2134 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 2135 |
2136 if(os::is_MP()) { | |
2137 if (UseMembar) { | |
2138 // Force this write out before the read below | |
2139 __ membar(Assembler::Membar_mask_bits( | |
2140 Assembler::LoadLoad | Assembler::LoadStore | | |
2141 Assembler::StoreLoad | Assembler::StoreStore)); | |
2142 } else { | |
2143 // Write serialization page so VM thread can do a pseudo remote membar. | |
2144 // We use the current thread pointer to calculate a thread specific | |
2145 // offset to write to within the page. This minimizes bus traffic | |
2146 // due to cache line collision. | |
2147 __ serialize_memory(r15_thread, rcx); | |
2148 } | |
2149 } | |
2150 | |
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2151 Label after_transition; |
0 | 2152 |
2153 // check for safepoint operation in progress and/or pending suspend requests | |
2154 { | |
2155 Label Continue; | |
2156 | |
2157 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
2158 SafepointSynchronize::_not_synchronized); | |
2159 | |
2160 Label L; | |
2161 __ jcc(Assembler::notEqual, L); | |
2162 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
2163 __ jcc(Assembler::equal, Continue); | |
2164 __ bind(L); | |
2165 | |
2166 // Don't use call_VM as it will see a possible pending exception and forward it | |
2167 // and never return here preventing us from clearing _last_native_pc down below. | |
2168 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2169 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2170 // by hand. | |
2171 // | |
2172 save_native_result(masm, ret_type, stack_slots); | |
304 | 2173 __ mov(c_rarg0, r15_thread); |
2174 __ mov(r12, rsp); // remember sp | |
2175 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2176 __ andptr(rsp, -16); // align stack as required by ABI | |
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2177 if (!is_critical_native) { |
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2178 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2179 } else { |
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2180 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2181 } |
304 | 2182 __ mov(rsp, r12); // restore sp |
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2183 __ reinit_heapbase(); |
0 | 2184 // Restore any method result value |
2185 restore_native_result(masm, ret_type, stack_slots); | |
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2186 |
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2187 if (is_critical_native) { |
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2188 // The call above performed the transition to thread_in_Java so |
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2189 // skip the transition logic below. |
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2190 __ jmpb(after_transition); |
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2191 } |
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2192 |
0 | 2193 __ bind(Continue); |
2194 } | |
2195 | |
2196 // change thread state | |
2197 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2198 __ bind(after_transition); |
0 | 2199 |
2200 Label reguard; | |
2201 Label reguard_done; | |
2202 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2203 __ jcc(Assembler::equal, reguard); | |
2204 __ bind(reguard_done); | |
2205 | |
2206 // native result if any is live | |
2207 | |
2208 // Unlock | |
2209 Label unlock_done; | |
2210 Label slow_path_unlock; | |
2211 if (method->is_synchronized()) { | |
2212 | |
2213 // Get locked oop from the handle we passed to jni | |
304 | 2214 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2215 |
2216 Label done; | |
2217 | |
2218 if (UseBiasedLocking) { | |
2219 __ biased_locking_exit(obj_reg, old_hdr, done); | |
2220 } | |
2221 | |
2222 // Simple recursive lock? | |
2223 | |
304 | 2224 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 2225 __ jcc(Assembler::equal, done); |
2226 | |
2227 // Must save rax if if it is live now because cmpxchg must use it | |
2228 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2229 save_native_result(masm, ret_type, stack_slots); | |
2230 } | |
2231 | |
2232 | |
2233 // get address of the stack lock | |
304 | 2234 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2235 // get old displaced header |
304 | 2236 __ movptr(old_hdr, Address(rax, 0)); |
0 | 2237 |
2238 // Atomic swap old header if oop still contains the stack lock | |
2239 if (os::is_MP()) { | |
2240 __ lock(); | |
2241 } | |
304 | 2242 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 2243 __ jcc(Assembler::notEqual, slow_path_unlock); |
2244 | |
2245 // slow path re-enters here | |
2246 __ bind(unlock_done); | |
2247 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2248 restore_native_result(masm, ret_type, stack_slots); | |
2249 } | |
2250 | |
2251 __ bind(done); | |
2252 | |
2253 } | |
2254 { | |
2255 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2256 save_native_result(masm, ret_type, stack_slots); | |
2257 __ movoop(c_rarg1, JNIHandles::make_local(method())); | |
2258 __ call_VM_leaf( | |
2259 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2260 r15_thread, c_rarg1); | |
2261 restore_native_result(masm, ret_type, stack_slots); | |
2262 } | |
2263 | |
2264 __ reset_last_Java_frame(false, true); | |
2265 | |
2266 // Unpack oop result | |
2267 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2268 Label L; | |
304 | 2269 __ testptr(rax, rax); |
0 | 2270 __ jcc(Assembler::zero, L); |
304 | 2271 __ movptr(rax, Address(rax, 0)); |
0 | 2272 __ bind(L); |
2273 __ verify_oop(rax); | |
2274 } | |
2275 | |
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2276 if (!is_critical_native) { |
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2277 // reset handle block |
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2278 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2279 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2280 } |
0 | 2281 |
2282 // pop our frame | |
2283 | |
2284 __ leave(); | |
2285 | |
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2286 if (!is_critical_native) { |
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2287 // Any exception pending? |
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2288 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2289 __ jcc(Assembler::notEqual, exception_pending); |
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2290 } |
0 | 2291 |
2292 // Return | |
2293 | |
2294 __ ret(0); | |
2295 | |
2296 // Unexpected paths are out of line and go here | |
2297 | |
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2298 if (!is_critical_native) { |
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2299 // forward the exception |
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2300 __ bind(exception_pending); |
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2301 |
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2302 // and forward the exception |
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2303 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2304 } |
0 | 2305 |
2306 // Slow path locking & unlocking | |
2307 if (method->is_synchronized()) { | |
2308 | |
2309 // BEGIN Slow path lock | |
2310 __ bind(slow_path_lock); | |
2311 | |
2312 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2313 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
2314 | |
2315 // protect the args we've loaded | |
2316 save_args(masm, total_c_args, c_arg, out_regs); | |
2317 | |
304 | 2318 __ mov(c_rarg0, obj_reg); |
2319 __ mov(c_rarg1, lock_reg); | |
2320 __ mov(c_rarg2, r15_thread); | |
0 | 2321 |
2322 // Not a leaf but we have last_Java_frame setup as we want | |
2323 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
2324 restore_args(masm, total_c_args, c_arg, out_regs); | |
2325 | |
2326 #ifdef ASSERT | |
2327 { Label L; | |
304 | 2328 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2329 __ jcc(Assembler::equal, L); |
2330 __ stop("no pending exception allowed on exit from monitorenter"); | |
2331 __ bind(L); | |
2332 } | |
2333 #endif | |
2334 __ jmp(lock_done); | |
2335 | |
2336 // END Slow path lock | |
2337 | |
2338 // BEGIN Slow path unlock | |
2339 __ bind(slow_path_unlock); | |
2340 | |
2341 // If we haven't already saved the native result we must save it now as xmm registers | |
2342 // are still exposed. | |
2343 | |
2344 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2345 save_native_result(masm, ret_type, stack_slots); | |
2346 } | |
2347 | |
304 | 2348 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
2349 | |
2350 __ mov(c_rarg0, obj_reg); | |
2351 __ mov(r12, rsp); // remember sp | |
2352 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2353 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2354 |
2355 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2356 // NOTE that obj_reg == rbx currently | |
304 | 2357 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
2358 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 2359 |
2360 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 2361 __ mov(rsp, r12); // restore sp |
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2362 __ reinit_heapbase(); |
0 | 2363 #ifdef ASSERT |
2364 { | |
2365 Label L; | |
304 | 2366 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2367 __ jcc(Assembler::equal, L); |
2368 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2369 __ bind(L); | |
2370 } | |
2371 #endif /* ASSERT */ | |
2372 | |
304 | 2373 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 2374 |
2375 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2376 restore_native_result(masm, ret_type, stack_slots); | |
2377 } | |
2378 __ jmp(unlock_done); | |
2379 | |
2380 // END Slow path unlock | |
2381 | |
2382 } // synchronized | |
2383 | |
2384 // SLOW PATH Reguard the stack if needed | |
2385 | |
2386 __ bind(reguard); | |
2387 save_native_result(masm, ret_type, stack_slots); | |
304 | 2388 __ mov(r12, rsp); // remember sp |
2389 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2390 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2391 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 2392 __ mov(rsp, r12); // restore sp |
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2393 __ reinit_heapbase(); |
0 | 2394 restore_native_result(masm, ret_type, stack_slots); |
2395 // and continue | |
2396 __ jmp(reguard_done); | |
2397 | |
2398 | |
2399 | |
2400 __ flush(); | |
2401 | |
2402 nmethod *nm = nmethod::new_native_nmethod(method, | |
2405
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2403 compile_id, |
0 | 2404 masm->code(), |
2405 vep_offset, | |
2406 frame_complete, | |
2407 stack_slots / VMRegImpl::slots_per_word, | |
2408 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2409 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2410 oop_maps); | |
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2411 |
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2412 if (is_critical_native) { |
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2413 nm->set_lazy_critical_native(true); |
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2414 } |
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2415 |
0 | 2416 return nm; |
2417 | |
2418 } | |
2419 | |
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2420 #ifdef HAVE_DTRACE_H |
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2421 // --------------------------------------------------------------------------- |
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2422 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2423 // in the Java compiled code convention, marshals them to the native |
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2424 // abi and then leaves nops at the position you would expect to call a native |
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2425 // function. When the probe is enabled the nops are replaced with a trap |
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2426 // instruction that dtrace inserts and the trace will cause a notification |
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2427 // to dtrace. |
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2428 // |
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2429 // The probes are only able to take primitive types and java/lang/String as |
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2430 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2431 // strings so that from dtrace point of view java strings are converted to C |
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2432 // strings. There is an arbitrary fixed limit on the total space that a method |
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2433 // can use for converting the strings. (256 chars per string in the signature). |
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2434 // So any java string larger then this is truncated. |
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2435 |
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2436 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2437 static bool offsets_initialized = false; |
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2438 |
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2439 |
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2440 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2441 methodHandle method) { |
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2442 |
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2443 |
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2444 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2445 // be single threaded in this method. |
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2446 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2447 |
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2448 if (!offsets_initialized) { |
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2449 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2450 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2451 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2452 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2453 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2454 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2455 |
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2456 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2457 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2458 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2459 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2460 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2461 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2462 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2463 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2464 |
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2465 offsets_initialized = true; |
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2466 } |
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2467 // Fill in the signature array, for the calling-convention call. |
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2468 int total_args_passed = method->size_of_parameters(); |
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2469 |
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2470 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2471 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2472 |
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2473 // The signature we are going to use for the trap that dtrace will see |
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2474 // java/lang/String is converted. We drop "this" and any other object |
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2475 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2476 // is converted to a two-slot long, which is why we double the allocation). |
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2477 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2478 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2479 |
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2480 int i=0; |
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2481 int total_strings = 0; |
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2482 int first_arg_to_pass = 0; |
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2483 int total_c_args = 0; |
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2484 |
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2485 // Skip the receiver as dtrace doesn't want to see it |
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2486 if( !method->is_static() ) { |
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2487 in_sig_bt[i++] = T_OBJECT; |
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2488 first_arg_to_pass = 1; |
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2489 } |
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2490 |
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2491 // We need to convert the java args to where a native (non-jni) function |
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2492 // would expect them. To figure out where they go we convert the java |
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2493 // signature to a C signature. |
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2494 |
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2495 SignatureStream ss(method->signature()); |
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2496 for ( ; !ss.at_return_type(); ss.next()) { |
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2497 BasicType bt = ss.type(); |
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2498 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2499 out_sig_bt[total_c_args++] = bt; |
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2500 if( bt == T_OBJECT) { |
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2501 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
116
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2502 if (s == vmSymbols::java_lang_String()) { |
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2503 total_strings++; |
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2504 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2505 } else if (s == vmSymbols::java_lang_Boolean() || |
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2506 s == vmSymbols::java_lang_Character() || |
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2507 s == vmSymbols::java_lang_Byte() || |
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2508 s == vmSymbols::java_lang_Short() || |
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2509 s == vmSymbols::java_lang_Integer() || |
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2510 s == vmSymbols::java_lang_Float()) { |
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2511 out_sig_bt[total_c_args-1] = T_INT; |
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2512 } else if (s == vmSymbols::java_lang_Long() || |
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2513 s == vmSymbols::java_lang_Double()) { |
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2514 out_sig_bt[total_c_args-1] = T_LONG; |
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2515 out_sig_bt[total_c_args++] = T_VOID; |
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2516 } |
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2517 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2518 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2519 // We convert double to long |
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2520 out_sig_bt[total_c_args-1] = T_LONG; |
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2521 out_sig_bt[total_c_args++] = T_VOID; |
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2522 } else if ( bt == T_FLOAT) { |
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2523 // We convert float to int |
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2524 out_sig_bt[total_c_args-1] = T_INT; |
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2525 } |
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2526 } |
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2527 |
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2528 assert(i==total_args_passed, "validly parsed signature"); |
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2529 |
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2530 // Now get the compiled-Java layout as input arguments |
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2531 int comp_args_on_stack; |
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2532 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2533 in_sig_bt, in_regs, total_args_passed, false); |
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2534 |
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2535 // Now figure out where the args must be stored and how much stack space |
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2536 // they require (neglecting out_preserve_stack_slots but space for storing |
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2537 // the 1st six register arguments). It's weird see int_stk_helper. |
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2538 |
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2539 int out_arg_slots; |
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2540 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); |
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2541 |
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2542 // Calculate the total number of stack slots we will need. |
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2543 |
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2544 // First count the abi requirement plus all of the outgoing args |
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2545 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2546 |
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2547 // Now space for the string(s) we must convert |
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2548 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2549 for (i = 0; i < total_strings ; i++) { |
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2550 string_locs[i] = stack_slots; |
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2551 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2552 } |
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2553 |
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2554 // Plus the temps we might need to juggle register args |
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2555 // regs take two slots each |
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2556 stack_slots += (Argument::n_int_register_parameters_c + |
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2557 Argument::n_float_register_parameters_c) * 2; |
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2558 |
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2559 |
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2560 // + 4 for return address (which we own) and saved rbp, |
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2561 |
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2562 stack_slots += 4; |
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2563 |
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2564 // Ok The space we have allocated will look like: |
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2565 // |
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2566 // |
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2567 // FP-> | | |
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2568 // |---------------------| |
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2569 // | string[n] | |
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2570 // |---------------------| <- string_locs[n] |
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2571 // | string[n-1] | |
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2572 // |---------------------| <- string_locs[n-1] |
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2573 // | ... | |
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2574 // | ... | |
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2575 // |---------------------| <- string_locs[1] |
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2576 // | string[0] | |
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2577 // |---------------------| <- string_locs[0] |
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2578 // | outbound memory | |
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2579 // | based arguments | |
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2580 // | | |
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2581 // |---------------------| |
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2582 // | | |
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2583 // SP-> | out_preserved_slots | |
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2584 // |
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2585 // |
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2586 |
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2587 // Now compute actual number of stack words we need rounding to make |
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2588 // stack properly aligned. |
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2589 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2590 |
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2591 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2592 |
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2593 intptr_t start = (intptr_t)__ pc(); |
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2594 |
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2595 // First thing make an ic check to see if we should even be here |
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2596 |
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2597 // We are free to use all registers as temps without saving them and |
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2598 // restoring them except rbp. rbp, is the only callee save register |
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2599 // as far as the interpreter and the compiler(s) are concerned. |
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2600 |
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2601 const Register ic_reg = rax; |
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2602 const Register receiver = rcx; |
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2603 Label hit; |
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2604 Label exception_pending; |
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2605 |
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2606 |
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2607 __ verify_oop(receiver); |
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2608 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2609 __ jcc(Assembler::equal, hit); |
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2610 |
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2611 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2612 |
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2613 // verified entry must be aligned for code patching. |
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2614 // and the first 5 bytes must be in the same cache line |
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2615 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2616 __ align(8); |
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2617 |
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2618 __ bind(hit); |
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2619 |
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2620 int vep_offset = ((intptr_t)__ pc()) - start; |
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2621 |
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2622 |
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2623 // The instruction at the verified entry point must be 5 bytes or longer |
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2624 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2625 // instruction fits that requirement. |
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2626 |
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2627 // Generate stack overflow check |
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2628 |
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2629 if (UseStackBanging) { |
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2630 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2631 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2632 } else { |
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2633 __ movl(rax, stack_size); |
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2634 __ bang_stack_size(rax, rbx); |
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2635 } |
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2636 } else { |
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2637 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2638 __ fat_nop(); |
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2639 } |
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2640 |
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2641 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2642 "valid size for make_non_entrant"); |
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2643 |
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2644 // Generate a new frame for the wrapper. |
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2645 __ enter(); |
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2646 |
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2647 // -4 because return address is already present and so is saved rbp, |
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2648 if (stack_size - 2*wordSize != 0) { |
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2649 __ subq(rsp, stack_size - 2*wordSize); |
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2650 } |
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2651 |
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2652 // Frame is now completed as far a size and linkage. |
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2653 |
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2654 int frame_complete = ((intptr_t)__ pc()) - start; |
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2655 |
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2656 int c_arg, j_arg; |
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2657 |
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2658 // State of input register args |
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2659 |
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2660 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2661 |
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2662 live[j_rarg0->as_VMReg()->value()] = false; |
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2663 live[j_rarg1->as_VMReg()->value()] = false; |
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2664 live[j_rarg2->as_VMReg()->value()] = false; |
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2665 live[j_rarg3->as_VMReg()->value()] = false; |
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2666 live[j_rarg4->as_VMReg()->value()] = false; |
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2667 live[j_rarg5->as_VMReg()->value()] = false; |
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2668 |
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2669 live[j_farg0->as_VMReg()->value()] = false; |
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2670 live[j_farg1->as_VMReg()->value()] = false; |
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2671 live[j_farg2->as_VMReg()->value()] = false; |
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2672 live[j_farg3->as_VMReg()->value()] = false; |
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2673 live[j_farg4->as_VMReg()->value()] = false; |
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2674 live[j_farg5->as_VMReg()->value()] = false; |
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2675 live[j_farg6->as_VMReg()->value()] = false; |
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2676 live[j_farg7->as_VMReg()->value()] = false; |
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2677 |
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2678 |
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2679 bool rax_is_zero = false; |
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2680 |
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2681 // All args (except strings) destined for the stack are moved first |
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2682 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2683 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2684 VMRegPair src = in_regs[j_arg]; |
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2685 VMRegPair dst = out_regs[c_arg]; |
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2686 |
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2687 // Get the real reg value or a dummy (rsp) |
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2688 |
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2689 int src_reg = src.first()->is_reg() ? |
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2690 src.first()->value() : |
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2691 rsp->as_VMReg()->value(); |
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2692 |
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2693 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2694 (in_sig_bt[j_arg] == T_OBJECT && |
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2695 out_sig_bt[c_arg] != T_INT && |
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2696 out_sig_bt[c_arg] != T_ADDRESS && |
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2697 out_sig_bt[c_arg] != T_LONG); |
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2698 |
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2699 live[src_reg] = !useless; |
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2700 |
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2701 if (dst.first()->is_stack()) { |
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2702 |
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2703 // Even though a string arg in a register is still live after this loop |
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2704 // after the string conversion loop (next) it will be dead so we take |
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2705 // advantage of that now for simpler code to manage live. |
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2706 |
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2707 live[src_reg] = false; |
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2708 switch (in_sig_bt[j_arg]) { |
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2709 |
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2710 case T_ARRAY: |
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2711 case T_OBJECT: |
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2712 { |
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2713 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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2714 |
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2715 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2716 // need to unbox a one-word value |
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2717 Register in_reg = rax; |
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2718 if ( src.first()->is_reg() ) { |
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2719 in_reg = src.first()->as_Register(); |
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2720 } else { |
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2721 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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2722 rax_is_zero = false; |
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2723 } |
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2724 Label skipUnbox; |
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2725 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
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2726 (int32_t)NULL_WORD); |
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2727 __ testq(in_reg, in_reg); |
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2728 __ jcc(Assembler::zero, skipUnbox); |
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2729 |
165
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2730 BasicType bt = out_sig_bt[c_arg]; |
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2731 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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2732 Address src1(in_reg, box_offset); |
165
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2733 if ( bt == T_LONG ) { |
116
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2734 __ movq(in_reg, src1); |
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2735 __ movq(stack_dst, in_reg); |
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2736 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2737 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2738 } else { |
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|
2739 __ movl(in_reg, src1); |
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|
2740 __ movl(stack_dst, in_reg); |
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|
2741 } |
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|
2742 |
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|
2743 __ bind(skipUnbox); |
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2744 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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2745 // Convert the arg to NULL |
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2746 if (!rax_is_zero) { |
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2747 __ xorq(rax, rax); |
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2748 rax_is_zero = true; |
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|
2749 } |
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|
2750 __ movq(stack_dst, rax); |
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|
2751 } |
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|
2752 } |
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|
2753 break; |
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|
2754 |
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|
2755 case T_VOID: |
018d5b58dd4f
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|
2756 break; |
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113
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|
2757 |
018d5b58dd4f
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|
2758 case T_FLOAT: |
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|
2759 // This does the right thing since we know it is destined for the |
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2760 // stack |
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|
2761 float_move(masm, src, dst); |
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|
2762 break; |
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kamg
parents:
113
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|
2763 |
018d5b58dd4f
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|
2764 case T_DOUBLE: |
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2765 // This does the right thing since we know it is destined for the |
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|
2766 // stack |
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|
2767 double_move(masm, src, dst); |
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|
2768 break; |
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parents:
113
diff
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|
2769 |
018d5b58dd4f
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|
2770 case T_LONG : |
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|
2771 long_move(masm, src, dst); |
018d5b58dd4f
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kamg
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|
2772 break; |
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parents:
113
diff
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|
2773 |
018d5b58dd4f
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113
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|
2774 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
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kamg
parents:
113
diff
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|
2775 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2776 default: |
018d5b58dd4f
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113
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|
2777 move32_64(masm, src, dst); |
018d5b58dd4f
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kamg
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113
diff
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|
2778 } |
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kamg
parents:
113
diff
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|
2779 } |
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
2780 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2781 } |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2782 |
018d5b58dd4f
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113
diff
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|
2783 // If we have any strings we must store any register based arg to the stack |
018d5b58dd4f
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|
2784 // This includes any still live xmm registers too. |
018d5b58dd4f
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kamg
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113
diff
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|
2785 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2786 int sid = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
2787 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2788 if (total_strings > 0 ) { |
018d5b58dd4f
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113
diff
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|
2789 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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|
2790 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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kamg
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113
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|
2791 VMRegPair src = in_regs[j_arg]; |
018d5b58dd4f
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|
2792 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
2793 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2794 if (src.first()->is_reg()) { |
018d5b58dd4f
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|
2795 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
018d5b58dd4f
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kamg
parents:
113
diff
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|
2796 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2797 // string oops were left untouched by the previous loop even if the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
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|
2798 // eventual (converted) arg is destined for the stack so park them |
018d5b58dd4f
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113
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|
2799 // away now (except for first) |
018d5b58dd4f
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kamg
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113
diff
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|
2800 |
018d5b58dd4f
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|
2801 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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|
2802 Address utf8_addr = Address( |
018d5b58dd4f
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|
2803 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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kamg
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|
2804 if (sid != 1) { |
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113
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|
2805 // The first string arg won't be killed until after the utf8 |
018d5b58dd4f
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113
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|
2806 // conversion |
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|
2807 __ movq(utf8_addr, src.first()->as_Register()); |
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kamg
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113
diff
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|
2808 } |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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|
2809 } else if (dst.first()->is_reg()) { |
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|
2810 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
018d5b58dd4f
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113
diff
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|
2811 |
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113
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|
2812 // Convert the xmm register to an int and store it in the reserved |
018d5b58dd4f
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|
2813 // location for the eventual c register arg |
018d5b58dd4f
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|
2814 XMMRegister f = src.first()->as_XMMRegister(); |
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|
2815 if (in_sig_bt[j_arg] == T_FLOAT) { |
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113
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|
2816 __ movflt(src_tmp, f); |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2817 } else { |
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113
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|
2818 __ movdbl(src_tmp, f); |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
2819 } |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
2820 } else { |
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113
diff
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|
2821 // If the arg is an oop type we don't support don't bother to store |
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|
2822 // it remember string was handled above. |
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|
2823 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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|
2824 (in_sig_bt[j_arg] == T_OBJECT && |
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|
2825 out_sig_bt[c_arg] != T_INT && |
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|
2826 out_sig_bt[c_arg] != T_LONG); |
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113
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|
2827 |
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|
2828 if (!useless) { |
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|
2829 __ movq(src_tmp, src.first()->as_Register()); |
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113
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|
2830 } |
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|
2831 } |
018d5b58dd4f
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113
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|
2832 } |
018d5b58dd4f
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113
diff
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|
2833 } |
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|
2834 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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|
2835 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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|
2836 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
2837 } |
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|
2838 } |
018d5b58dd4f
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|
2839 |
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|
2840 // Now that the volatile registers are safe, convert all the strings |
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|
2841 sid = 0; |
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|
2842 |
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|
2843 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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|
2844 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2845 if (out_sig_bt[c_arg] == T_ADDRESS) { |
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113
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|
2846 // It's a string |
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|
2847 Address utf8_addr = Address( |
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|
2848 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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|
2849 // The first string we find might still be in the original java arg |
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|
2850 // register |
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2851 |
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2852 VMReg src = in_regs[j_arg].first(); |
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2853 |
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2854 // We will need to eventually save the final argument to the trap |
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2855 // in the von-volatile location dedicated to src. This is the offset |
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2856 // from fp we will use. |
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2857 int src_off = src->is_reg() ? |
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2858 fp_offset[src->value()] : reg2offset_in(src); |
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2859 |
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2860 // This is where the argument will eventually reside |
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2861 VMRegPair dst = out_regs[c_arg]; |
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2862 |
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2863 if (src->is_reg()) { |
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2864 if (sid == 1) { |
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2865 __ movq(c_rarg0, src->as_Register()); |
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2866 } else { |
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2867 __ movq(c_rarg0, utf8_addr); |
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2868 } |
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2869 } else { |
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2870 // arg is still in the original location |
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2871 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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2872 } |
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2873 Label done, convert; |
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2874 |
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2875 // see if the oop is NULL |
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2876 __ testq(c_rarg0, c_rarg0); |
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2877 __ jcc(Assembler::notEqual, convert); |
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2878 |
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2879 if (dst.first()->is_reg()) { |
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2880 // Save the ptr to utf string in the origina src loc or the tmp |
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2881 // dedicated to it |
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2882 __ movq(Address(rbp, src_off), c_rarg0); |
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2883 } else { |
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2884 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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2885 } |
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2886 __ jmp(done); |
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|
2887 |
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2888 __ bind(convert); |
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|
2889 |
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2890 __ lea(c_rarg1, utf8_addr); |
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2891 if (dst.first()->is_reg()) { |
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2892 __ movq(Address(rbp, src_off), c_rarg1); |
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2893 } else { |
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|
2894 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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2895 } |
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2896 // And do the conversion |
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2897 __ call(RuntimeAddress( |
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2898 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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2899 |
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|
2900 __ bind(done); |
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|
2901 } |
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2902 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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2903 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2904 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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2905 } |
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|
2906 } |
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|
2907 // The get_utf call killed all the c_arg registers |
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2908 live[c_rarg0->as_VMReg()->value()] = false; |
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2909 live[c_rarg1->as_VMReg()->value()] = false; |
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2910 live[c_rarg2->as_VMReg()->value()] = false; |
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2911 live[c_rarg3->as_VMReg()->value()] = false; |
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2912 live[c_rarg4->as_VMReg()->value()] = false; |
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2913 live[c_rarg5->as_VMReg()->value()] = false; |
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2914 |
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2915 live[c_farg0->as_VMReg()->value()] = false; |
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2916 live[c_farg1->as_VMReg()->value()] = false; |
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2917 live[c_farg2->as_VMReg()->value()] = false; |
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2918 live[c_farg3->as_VMReg()->value()] = false; |
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2919 live[c_farg4->as_VMReg()->value()] = false; |
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2920 live[c_farg5->as_VMReg()->value()] = false; |
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2921 live[c_farg6->as_VMReg()->value()] = false; |
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2922 live[c_farg7->as_VMReg()->value()] = false; |
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2923 } |
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|
2924 |
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2925 // Now we can finally move the register args to their desired locations |
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2926 |
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|
2927 rax_is_zero = false; |
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|
2928 |
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|
2929 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2930 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2931 |
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|
2932 VMRegPair src = in_regs[j_arg]; |
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2933 VMRegPair dst = out_regs[c_arg]; |
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2934 |
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|
2935 // Only need to look for args destined for the interger registers (since we |
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2936 // convert float/double args to look like int/long outbound) |
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2937 if (dst.first()->is_reg()) { |
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2938 Register r = dst.first()->as_Register(); |
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2939 |
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|
2940 // Check if the java arg is unsupported and thereofre useless |
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2941 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2942 (in_sig_bt[j_arg] == T_OBJECT && |
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2943 out_sig_bt[c_arg] != T_INT && |
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2944 out_sig_bt[c_arg] != T_ADDRESS && |
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2945 out_sig_bt[c_arg] != T_LONG); |
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2946 |
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|
2947 |
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|
2948 // If we're going to kill an existing arg save it first |
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2949 if (live[dst.first()->value()]) { |
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2950 // you can't kill yourself |
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2951 if (src.first() != dst.first()) { |
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2952 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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|
2953 } |
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|
2954 } |
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|
2955 if (src.first()->is_reg()) { |
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2956 if (live[src.first()->value()] ) { |
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2957 if (in_sig_bt[j_arg] == T_FLOAT) { |
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2958 __ movdl(r, src.first()->as_XMMRegister()); |
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2959 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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|
2960 __ movdq(r, src.first()->as_XMMRegister()); |
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2961 } else if (r != src.first()->as_Register()) { |
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2962 if (!useless) { |
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2963 __ movq(r, src.first()->as_Register()); |
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|
2964 } |
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|
2965 } |
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|
2966 } else { |
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|
2967 // If the arg is an oop type we don't support don't bother to store |
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2968 // it |
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2969 if (!useless) { |
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2970 if (in_sig_bt[j_arg] == T_DOUBLE || |
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2971 in_sig_bt[j_arg] == T_LONG || |
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2972 in_sig_bt[j_arg] == T_OBJECT ) { |
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2973 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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2974 } else { |
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2975 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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2976 } |
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2977 } |
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2978 } |
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2979 live[src.first()->value()] = false; |
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2980 } else if (!useless) { |
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2981 // full sized move even for int should be ok |
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2982 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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2983 } |
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2984 |
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2985 // At this point r has the original java arg in the final location |
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2986 // (assuming it wasn't useless). If the java arg was an oop |
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2987 // we have a bit more to do |
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2988 |
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2989 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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2990 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2991 // need to unbox a one-word value |
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2992 Label skip; |
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2993 __ testq(r, r); |
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2994 __ jcc(Assembler::equal, skip); |
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2995 BasicType bt = out_sig_bt[c_arg]; |
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2996 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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2997 Address src1(r, box_offset); |
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2998 if ( bt == T_LONG ) { |
116
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2999 __ movq(r, src1); |
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3000 } else { |
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3001 __ movl(r, src1); |
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3002 } |
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3003 __ bind(skip); |
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3004 |
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3005 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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3006 // Convert the arg to NULL |
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3007 __ xorq(r, r); |
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3008 } |
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3009 } |
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3010 |
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3011 // dst can longer be holding an input value |
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3012 live[dst.first()->value()] = false; |
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3013 } |
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3014 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3015 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3016 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3017 } |
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3018 } |
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3019 |
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3020 |
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3021 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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3022 // patch in the trap |
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3023 int patch_offset = ((intptr_t)__ pc()) - start; |
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3024 |
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3025 __ nop(); |
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3026 |
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3027 |
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3028 // Return |
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3029 |
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3030 __ leave(); |
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3031 __ ret(0); |
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3032 |
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3033 __ flush(); |
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3034 |
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3035 nmethod *nm = nmethod::new_dtrace_nmethod( |
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3036 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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3037 stack_slots / VMRegImpl::slots_per_word); |
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3038 return nm; |
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3039 |
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3040 } |
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3041 |
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3042 #endif // HAVE_DTRACE_H |
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3043 |
0 | 3044 // this function returns the adjust size (in number of words) to a c2i adapter |
3045 // activation for use during deoptimization | |
3046 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 3047 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 3048 } |
3049 | |
3050 | |
3051 uint SharedRuntime::out_preserve_stack_slots() { | |
3052 return 0; | |
3053 } | |
3054 | |
3055 | |
3056 //------------------------------generate_deopt_blob---------------------------- | |
3057 void SharedRuntime::generate_deopt_blob() { | |
3058 // Allocate space for the code | |
3059 ResourceMark rm; | |
3060 // Setup code generation tools | |
3061 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
3062 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3063 int frame_size_in_words; | |
3064 OopMap* map = NULL; | |
3065 OopMapSet *oop_maps = new OopMapSet(); | |
3066 | |
3067 // ------------- | |
3068 // This code enters when returning to a de-optimized nmethod. A return | |
3069 // address has been pushed on the the stack, and return values are in | |
3070 // registers. | |
3071 // If we are doing a normal deopt then we were called from the patched | |
3072 // nmethod from the point we returned to the nmethod. So the return | |
3073 // address on the stack is wrong by NativeCall::instruction_size | |
3074 // We will adjust the value so it looks like we have the original return | |
3075 // address on the stack (like when we eagerly deoptimized). | |
3076 // In the case of an exception pending when deoptimizing, we enter | |
3077 // with a return address on the stack that points after the call we patched | |
3078 // into the exception handler. We have the following register state from, | |
3079 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
3080 // rax: exception oop | |
3081 // rbx: exception handler | |
3082 // rdx: throwing pc | |
3083 // So in this case we simply jam rdx into the useless return address and | |
3084 // the stack looks just like we want. | |
3085 // | |
3086 // At this point we need to de-opt. We save the argument return | |
3087 // registers. We call the first C routine, fetch_unroll_info(). This | |
3088 // routine captures the return values and returns a structure which | |
3089 // describes the current frame size and the sizes of all replacement frames. | |
3090 // The current frame is compiled code and may contain many inlined | |
3091 // functions, each with their own JVM state. We pop the current frame, then | |
3092 // push all the new frames. Then we call the C routine unpack_frames() to | |
3093 // populate these frames. Finally unpack_frames() returns us the new target | |
3094 // address. Notice that callee-save registers are BLOWN here; they have | |
3095 // already been captured in the vframeArray at the time the return PC was | |
3096 // patched. | |
3097 address start = __ pc(); | |
3098 Label cont; | |
3099 | |
3100 // Prolog for non exception case! | |
3101 | |
3102 // Save everything in sight. | |
3103 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3104 | |
3105 // Normal deoptimization. Save exec mode for unpack_frames. | |
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3106 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 3107 __ jmp(cont); |
304 | 3108 |
3109 int reexecute_offset = __ pc() - start; | |
3110 | |
3111 // Reexecute case | |
3112 // return address is the pc describes what bci to do re-execute at | |
3113 | |
3114 // No need to update map as each call to save_live_registers will produce identical oopmap | |
3115 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3116 | |
3117 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
3118 __ jmp(cont); | |
3119 | |
0 | 3120 int exception_offset = __ pc() - start; |
3121 | |
3122 // Prolog for exception case | |
3123 | |
304 | 3124 // all registers are dead at this entry point, except for rax, and |
3125 // rdx which contain the exception oop and exception pc | |
3126 // respectively. Set them in TLS and fall thru to the | |
3127 // unpack_with_exception_in_tls entry point. | |
3128 | |
3129 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
3130 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
3131 | |
3132 int exception_in_tls_offset = __ pc() - start; | |
3133 | |
3134 // new implementation because exception oop is now passed in JavaThread | |
3135 | |
3136 // Prolog for exception case | |
3137 // All registers must be preserved because they might be used by LinearScan | |
3138 // Exceptiop oop and throwing PC are passed in JavaThread | |
3139 // tos: stack at point of call to method that threw the exception (i.e. only | |
3140 // args are on the stack, no return address) | |
3141 | |
3142 // make room on stack for the return address | |
3143 // It will be patched later with the throwing pc. The correct value is not | |
3144 // available now because loading it from memory would destroy registers. | |
3145 __ push(0); | |
0 | 3146 |
3147 // Save everything in sight. | |
3148 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3149 | |
304 | 3150 // Now it is safe to overwrite any register |
3151 | |
0 | 3152 // Deopt during an exception. Save exec mode for unpack_frames. |
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3153 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 3154 |
304 | 3155 // load throwing pc from JavaThread and patch it as the return address |
3156 // of the current frame. Then clear the field in JavaThread | |
3157 | |
3158 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3159 __ movptr(Address(rbp, wordSize), rdx); | |
3160 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3161 | |
3162 #ifdef ASSERT | |
3163 // verify that there is really an exception oop in JavaThread | |
3164 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3165 __ verify_oop(rax); | |
3166 | |
3167 // verify that there is no pending exception | |
3168 Label no_pending_exception; | |
3169 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
3170 __ testptr(rax, rax); | |
3171 __ jcc(Assembler::zero, no_pending_exception); | |
3172 __ stop("must not have pending exception here"); | |
3173 __ bind(no_pending_exception); | |
3174 #endif | |
3175 | |
0 | 3176 __ bind(cont); |
3177 | |
3178 // Call C code. Need thread and this frame, but NOT official VM entry | |
3179 // crud. We cannot block on this call, no GC can happen. | |
3180 // | |
3181 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
3182 | |
3183 // fetch_unroll_info needs to call last_java_frame(). | |
3184 | |
3185 __ set_last_Java_frame(noreg, noreg, NULL); | |
3186 #ifdef ASSERT | |
3187 { Label L; | |
304 | 3188 __ cmpptr(Address(r15_thread, |
0 | 3189 JavaThread::last_Java_fp_offset()), |
304 | 3190 (int32_t)0); |
0 | 3191 __ jcc(Assembler::equal, L); |
3192 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
3193 __ bind(L); | |
3194 } | |
3195 #endif // ASSERT | |
304 | 3196 __ mov(c_rarg0, r15_thread); |
0 | 3197 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
3198 | |
3199 // Need to have an oopmap that tells fetch_unroll_info where to | |
3200 // find any register it might need. | |
3201 oop_maps->add_gc_map(__ pc() - start, map); | |
3202 | |
3203 __ reset_last_Java_frame(false, false); | |
3204 | |
3205 // Load UnrollBlock* into rdi | |
304 | 3206 __ mov(rdi, rax); |
3207 | |
3208 Label noException; | |
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3209 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 3210 __ jcc(Assembler::notEqual, noException); |
3211 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3212 // QQQ this is useless it was NULL above | |
3213 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3214 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
3215 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3216 | |
3217 __ verify_oop(rax); | |
3218 | |
3219 // Overwrite the result registers with the exception results. | |
3220 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
3221 // I think this is useless | |
3222 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
3223 | |
3224 __ bind(noException); | |
0 | 3225 |
3226 // Only register save data is on the stack. | |
3227 // Now restore the result registers. Everything else is either dead | |
3228 // or captured in the vframeArray. | |
3229 RegisterSaver::restore_result_registers(masm); | |
3230 | |
3231 // All of the register save area has been popped of the stack. Only the | |
3232 // return address remains. | |
3233 | |
3234 // Pop all the frames we must move/replace. | |
3235 // | |
3236 // Frame picture (youngest to oldest) | |
3237 // 1: self-frame (no frame link) | |
3238 // 2: deopting frame (no frame link) | |
3239 // 3: caller of deopting frame (could be compiled/interpreted). | |
3240 // | |
3241 // Note: by leaving the return address of self-frame on the stack | |
3242 // and using the size of frame 2 to adjust the stack | |
3243 // when we are done the return to frame 3 will still be on the stack. | |
3244 | |
3245 // Pop deoptimized frame | |
3246 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3247 __ addptr(rsp, rcx); |
0 | 3248 |
3249 // rsp should be pointing at the return address to the caller (3) | |
3250 | |
3251 // Stack bang to make sure there's enough room for these interpreter frames. | |
3252 if (UseStackBanging) { | |
3253 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3254 __ bang_stack_size(rbx, rcx); | |
3255 } | |
3256 | |
3257 // Load address of array of frame pcs into rcx | |
304 | 3258 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3259 |
3260 // Trash the old pc | |
304 | 3261 __ addptr(rsp, wordSize); |
0 | 3262 |
3263 // Load address of array of frame sizes into rsi | |
304 | 3264 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3265 |
3266 // Load counter into rdx | |
3267 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3268 | |
3269 // Pick up the initial fp we should save | |
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3270 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3271 |
3272 // Now adjust the caller's stack to make up for the extra locals | |
3273 // but record the original sp so that we can save it in the skeletal interpreter | |
3274 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3275 // value and not the "real" sp value. | |
3276 | |
3277 const Register sender_sp = r8; | |
3278 | |
304 | 3279 __ mov(sender_sp, rsp); |
0 | 3280 __ movl(rbx, Address(rdi, |
3281 Deoptimization::UnrollBlock:: | |
3282 caller_adjustment_offset_in_bytes())); | |
304 | 3283 __ subptr(rsp, rbx); |
0 | 3284 |
3285 // Push interpreter frames in a loop | |
3286 Label loop; | |
3287 __ bind(loop); | |
304 | 3288 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3289 #ifdef CC_INTERP | |
3290 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
3291 #ifdef ASSERT | |
3292 __ push(0xDEADDEAD); // Make a recognizable pattern | |
3293 __ push(0xDEADDEAD); | |
3294 #else /* ASSERT */ | |
3295 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
3296 #endif /* ASSERT */ | |
3297 #else | |
3298 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
3299 #endif // CC_INTERP | |
3300 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 3301 __ enter(); // Save old & set new ebp |
304 | 3302 __ subptr(rsp, rbx); // Prolog |
3303 #ifdef CC_INTERP | |
3304 __ movptr(Address(rbp, | |
3305 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
3306 sender_sp); // Make it walkable | |
3307 #else /* CC_INTERP */ | |
0 | 3308 // This value is corrected by layout_activation_impl |
304 | 3309 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
3310 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
3311 #endif /* CC_INTERP */ | |
3312 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
3313 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3314 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 3315 __ decrementl(rdx); // Decrement counter |
3316 __ jcc(Assembler::notZero, loop); | |
304 | 3317 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3318 |
3319 // Re-push self-frame | |
3320 __ enter(); // Save old & set new ebp | |
3321 | |
3322 // Allocate a full sized register save area. | |
3323 // Return address and rbp are in place, so we allocate two less words. | |
304 | 3324 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 3325 |
3326 // Restore frame locals after moving the frame | |
3327 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 3328 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 3329 |
3330 // Call C code. Need thread but NOT official VM entry | |
3331 // crud. We cannot block on this call, no GC can happen. Call should | |
3332 // restore return values to their stack-slots with the new SP. | |
3333 // | |
3334 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
3335 | |
3336 // Use rbp because the frames look interpreted now | |
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3337 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3338 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3339 address the_pc = __ pc(); |
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3340 __ set_last_Java_frame(noreg, rbp, the_pc); |
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3341 |
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3342 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 3343 __ mov(c_rarg0, r15_thread); |
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3344 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 3345 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
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3346 // Revert SP alignment after call since we're going to do some SP relative addressing below |
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3347 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 3348 |
3349 // Set an oopmap for the call site | |
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3350 // Use the same PC we used for the last java frame |
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3351 oop_maps->add_gc_map(the_pc - start, |
0 | 3352 new OopMap( frame_size_in_words, 0 )); |
3353 | |
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3354 // Clear fp AND pc |
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3355 __ reset_last_Java_frame(true, true); |
0 | 3356 |
3357 // Collect return values | |
3358 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 3359 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
3360 // I think this is useless (throwing pc?) | |
3361 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 3362 |
3363 // Pop self-frame. | |
3364 __ leave(); // Epilog | |
3365 | |
3366 // Jump to interpreter | |
3367 __ ret(0); | |
3368 | |
3369 // Make sure all code is generated | |
3370 masm->flush(); | |
3371 | |
304 | 3372 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
3373 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
0 | 3374 } |
3375 | |
3376 #ifdef COMPILER2 | |
3377 //------------------------------generate_uncommon_trap_blob-------------------- | |
3378 void SharedRuntime::generate_uncommon_trap_blob() { | |
3379 // Allocate space for the code | |
3380 ResourceMark rm; | |
3381 // Setup code generation tools | |
3382 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
3383 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3384 | |
3385 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3386 | |
3387 address start = __ pc(); | |
3388 | |
3389 // Push self-frame. We get here with a return address on the | |
3390 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 3391 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 3392 |
3393 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 3394 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3395 |
3396 // compiler left unloaded_class_index in j_rarg0 move to where the | |
3397 // runtime expects it. | |
3398 __ movl(c_rarg1, j_rarg0); | |
3399 | |
3400 __ set_last_Java_frame(noreg, noreg, NULL); | |
3401 | |
3402 // Call C code. Need thread but NOT official VM entry | |
3403 // crud. We cannot block on this call, no GC can happen. Call should | |
3404 // capture callee-saved registers as well as return values. | |
3405 // Thread is in rdi already. | |
3406 // | |
3407 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
3408 | |
304 | 3409 __ mov(c_rarg0, r15_thread); |
0 | 3410 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
3411 | |
3412 // Set an oopmap for the call site | |
3413 OopMapSet* oop_maps = new OopMapSet(); | |
3414 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
3415 | |
3416 // location of rbp is known implicitly by the frame sender code | |
3417 | |
3418 oop_maps->add_gc_map(__ pc() - start, map); | |
3419 | |
3420 __ reset_last_Java_frame(false, false); | |
3421 | |
3422 // Load UnrollBlock* into rdi | |
304 | 3423 __ mov(rdi, rax); |
0 | 3424 |
3425 // Pop all the frames we must move/replace. | |
3426 // | |
3427 // Frame picture (youngest to oldest) | |
3428 // 1: self-frame (no frame link) | |
3429 // 2: deopting frame (no frame link) | |
3430 // 3: caller of deopting frame (could be compiled/interpreted). | |
3431 | |
3432 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 3433 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 3434 |
3435 // Pop deoptimized frame (int) | |
3436 __ movl(rcx, Address(rdi, | |
3437 Deoptimization::UnrollBlock:: | |
3438 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3439 __ addptr(rsp, rcx); |
0 | 3440 |
3441 // rsp should be pointing at the return address to the caller (3) | |
3442 | |
3443 // Stack bang to make sure there's enough room for these interpreter frames. | |
3444 if (UseStackBanging) { | |
3445 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3446 __ bang_stack_size(rbx, rcx); | |
3447 } | |
3448 | |
3449 // Load address of array of frame pcs into rcx (address*) | |
304 | 3450 __ movptr(rcx, |
3451 Address(rdi, | |
3452 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
0 | 3453 |
3454 // Trash the return pc | |
304 | 3455 __ addptr(rsp, wordSize); |
0 | 3456 |
3457 // Load address of array of frame sizes into rsi (intptr_t*) | |
304 | 3458 __ movptr(rsi, Address(rdi, |
3459 Deoptimization::UnrollBlock:: | |
3460 frame_sizes_offset_in_bytes())); | |
0 | 3461 |
3462 // Counter | |
3463 __ movl(rdx, Address(rdi, | |
3464 Deoptimization::UnrollBlock:: | |
3465 number_of_frames_offset_in_bytes())); // (int) | |
3466 | |
3467 // Pick up the initial fp we should save | |
304 | 3468 __ movptr(rbp, |
3469 Address(rdi, | |
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3470 Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
0 | 3471 |
3472 // Now adjust the caller's stack to make up for the extra locals but | |
3473 // record the original sp so that we can save it in the skeletal | |
3474 // interpreter frame and the stack walking of interpreter_sender | |
3475 // will get the unextended sp value and not the "real" sp value. | |
3476 | |
3477 const Register sender_sp = r8; | |
3478 | |
304 | 3479 __ mov(sender_sp, rsp); |
0 | 3480 __ movl(rbx, Address(rdi, |
3481 Deoptimization::UnrollBlock:: | |
3482 caller_adjustment_offset_in_bytes())); // (int) | |
304 | 3483 __ subptr(rsp, rbx); |
0 | 3484 |
3485 // Push interpreter frames in a loop | |
3486 Label loop; | |
3487 __ bind(loop); | |
304 | 3488 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3489 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3490 __ pushptr(Address(rcx, 0)); // Save return address | |
3491 __ enter(); // Save old & set new rbp | |
3492 __ subptr(rsp, rbx); // Prolog | |
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3493 #ifdef CC_INTERP |
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3494 __ movptr(Address(rbp, |
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3495 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
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3496 sender_sp); // Make it walkable |
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3497 #else // CC_INTERP |
304 | 3498 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3499 sender_sp); // Make it walkable | |
0 | 3500 // This value is corrected by layout_activation_impl |
304 | 3501 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
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3502 #endif // CC_INTERP |
304 | 3503 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3504 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3505 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3506 __ decrementl(rdx); // Decrement counter | |
0 | 3507 __ jcc(Assembler::notZero, loop); |
304 | 3508 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3509 |
3510 // Re-push self-frame | |
3511 __ enter(); // Save old & set new rbp | |
304 | 3512 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3513 // Prolog |
3514 | |
3515 // Use rbp because the frames look interpreted now | |
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3516 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3517 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3518 address the_pc = __ pc(); |
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3519 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3520 |
3521 // Call C code. Need thread but NOT official VM entry | |
3522 // crud. We cannot block on this call, no GC can happen. Call should | |
3523 // restore return values to their stack-slots with the new SP. | |
3524 // Thread is in rdi already. | |
3525 // | |
3526 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3527 | |
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3528 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3529 __ mov(c_rarg0, r15_thread); |
0 | 3530 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3531 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3532 | |
3533 // Set an oopmap for the call site | |
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3534 // Use the same PC we used for the last java frame |
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3535 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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3536 |
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3537 // Clear fp AND pc |
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3538 __ reset_last_Java_frame(true, true); |
0 | 3539 |
3540 // Pop self-frame. | |
3541 __ leave(); // Epilog | |
3542 | |
3543 // Jump to interpreter | |
3544 __ ret(0); | |
3545 | |
3546 // Make sure all code is generated | |
3547 masm->flush(); | |
3548 | |
3549 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3550 SimpleRuntimeFrame::framesize >> 1); | |
3551 } | |
3552 #endif // COMPILER2 | |
3553 | |
3554 | |
3555 //------------------------------generate_handler_blob------ | |
3556 // | |
3557 // Generate a special Compile2Runtime blob that saves all registers, | |
3558 // and setup oopmap. | |
3559 // | |
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3560 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, bool cause_return) { |
0 | 3561 assert(StubRoutines::forward_exception_entry() != NULL, |
3562 "must be generated before"); | |
3563 | |
3564 ResourceMark rm; | |
3565 OopMapSet *oop_maps = new OopMapSet(); | |
3566 OopMap* map; | |
3567 | |
3568 // Allocate space for the code. Setup code generation tools. | |
3569 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3570 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3571 | |
3572 address start = __ pc(); | |
3573 address call_pc = NULL; | |
3574 int frame_size_in_words; | |
3575 | |
3576 // Make room for return address (or push it again) | |
3577 if (!cause_return) { | |
304 | 3578 __ push(rbx); |
0 | 3579 } |
3580 | |
3581 // Save registers, fpu state, and flags | |
3582 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3583 | |
3584 // The following is basically a call_VM. However, we need the precise | |
3585 // address of the call in order to generate an oopmap. Hence, we do all the | |
3586 // work outselves. | |
3587 | |
3588 __ set_last_Java_frame(noreg, noreg, NULL); | |
3589 | |
3590 // The return address must always be correct so that frame constructor never | |
3591 // sees an invalid pc. | |
3592 | |
3593 if (!cause_return) { | |
3594 // overwrite the dummy value we pushed on entry | |
304 | 3595 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3596 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3597 } |
3598 | |
3599 // Do the call | |
304 | 3600 __ mov(c_rarg0, r15_thread); |
0 | 3601 __ call(RuntimeAddress(call_ptr)); |
3602 | |
3603 // Set an oopmap for the call site. This oopmap will map all | |
3604 // oop-registers and debug-info registers as callee-saved. This | |
3605 // will allow deoptimization at this safepoint to find all possible | |
3606 // debug-info recordings, as well as let GC find all oops. | |
3607 | |
3608 oop_maps->add_gc_map( __ pc() - start, map); | |
3609 | |
3610 Label noException; | |
3611 | |
3612 __ reset_last_Java_frame(false, false); | |
3613 | |
304 | 3614 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3615 __ jcc(Assembler::equal, noException); |
3616 | |
3617 // Exception pending | |
3618 | |
3619 RegisterSaver::restore_live_registers(masm); | |
3620 | |
3621 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3622 | |
3623 // No exception case | |
3624 __ bind(noException); | |
3625 | |
3626 // Normal exit, restore registers and exit. | |
3627 RegisterSaver::restore_live_registers(masm); | |
3628 | |
3629 __ ret(0); | |
3630 | |
3631 // Make sure all code is generated | |
3632 masm->flush(); | |
3633 | |
3634 // Fill-out other meta info | |
3635 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3636 } | |
3637 | |
3638 // | |
3639 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3640 // | |
3641 // Generate a stub that calls into vm to find out the proper destination | |
3642 // of a java call. All the argument registers are live at this point | |
3643 // but since this is generic code we don't know what they are and the caller | |
3644 // must do any gc of the args. | |
3645 // | |
3753
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3646 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3647 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3648 | |
3649 // allocate space for the code | |
3650 ResourceMark rm; | |
3651 | |
3652 CodeBuffer buffer(name, 1000, 512); | |
3653 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3654 | |
3655 int frame_size_in_words; | |
3656 | |
3657 OopMapSet *oop_maps = new OopMapSet(); | |
3658 OopMap* map = NULL; | |
3659 | |
3660 int start = __ offset(); | |
3661 | |
3662 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3663 | |
3664 int frame_complete = __ offset(); | |
3665 | |
3666 __ set_last_Java_frame(noreg, noreg, NULL); | |
3667 | |
304 | 3668 __ mov(c_rarg0, r15_thread); |
0 | 3669 |
3670 __ call(RuntimeAddress(destination)); | |
3671 | |
3672 | |
3673 // Set an oopmap for the call site. | |
3674 // We need this not only for callee-saved registers, but also for volatile | |
3675 // registers that the compiler might be keeping live across a safepoint. | |
3676 | |
3677 oop_maps->add_gc_map( __ offset() - start, map); | |
3678 | |
3679 // rax contains the address we are going to jump to assuming no exception got installed | |
3680 | |
3681 // clear last_Java_sp | |
3682 __ reset_last_Java_frame(false, false); | |
3683 // check for pending exceptions | |
3684 Label pending; | |
304 | 3685 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3686 __ jcc(Assembler::notEqual, pending); |
3687 | |
3688 // get the returned methodOop | |
304 | 3689 __ movptr(rbx, Address(r15_thread, JavaThread::vm_result_offset())); |
3690 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); | |
3691 | |
3692 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 3693 |
3694 RegisterSaver::restore_live_registers(masm); | |
3695 | |
3696 // We are back the the original state on entry and ready to go. | |
3697 | |
3698 __ jmp(rax); | |
3699 | |
3700 // Pending exception after the safepoint | |
3701 | |
3702 __ bind(pending); | |
3703 | |
3704 RegisterSaver::restore_live_registers(masm); | |
3705 | |
3706 // exception pending => remove activation and forward to exception handler | |
3707 | |
3708 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
3709 | |
304 | 3710 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 3711 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3712 | |
3713 // ------------- | |
3714 // make sure all code is generated | |
3715 masm->flush(); | |
3716 | |
3717 // return the blob | |
3718 // frame_size_words or bytes?? | |
3719 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
3720 } | |
3721 | |
3722 | |
3723 #ifdef COMPILER2 | |
3724 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
3725 // | |
3726 //------------------------------generate_exception_blob--------------------------- | |
3727 // creates exception blob at the end | |
3728 // Using exception blob, this code is jumped from a compiled method. | |
3729 // (see emit_exception_handler in x86_64.ad file) | |
3730 // | |
3731 // Given an exception pc at a call we call into the runtime for the | |
3732 // handler in this method. This handler might merely restore state | |
3733 // (i.e. callee save registers) unwind the frame and jump to the | |
3734 // exception handler for the nmethod if there is no Java level handler | |
3735 // for the nmethod. | |
3736 // | |
3737 // This code is entered with a jmp. | |
3738 // | |
3739 // Arguments: | |
3740 // rax: exception oop | |
3741 // rdx: exception pc | |
3742 // | |
3743 // Results: | |
3744 // rax: exception oop | |
3745 // rdx: exception pc in caller or ??? | |
3746 // destination: exception handler of caller | |
3747 // | |
3748 // Note: the exception pc MUST be at a call (precise debug information) | |
3749 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
3750 // | |
3751 | |
3752 void OptoRuntime::generate_exception_blob() { | |
3753 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
3754 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
3755 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
3756 | |
3757 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3758 | |
3759 // Allocate space for the code | |
3760 ResourceMark rm; | |
3761 // Setup code generation tools | |
3762 CodeBuffer buffer("exception_blob", 2048, 1024); | |
3763 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3764 | |
3765 | |
3766 address start = __ pc(); | |
3767 | |
3768 // Exception pc is 'return address' for stack walker | |
304 | 3769 __ push(rdx); |
3770 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 3771 |
3772 // Save callee-saved registers. See x86_64.ad. | |
3773 | |
3774 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3775 // convention will save restore it in prolog/epilog) Other than that | |
3776 // there are no callee save registers now that adapter frames are gone. | |
3777 | |
304 | 3778 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3779 |
3780 // Store exception in Thread object. We cannot pass any arguments to the | |
3781 // handle_exception call, since we do not want to make any assumption | |
3782 // about the size of the frame where the exception happened in. | |
3783 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 3784 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
3785 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 3786 |
3787 // This call does all the hard work. It checks if an exception handler | |
3788 // exists in the method. | |
3789 // If so, it returns the handler address. | |
3790 // If not, it prepares for stack-unwinding, restoring the callee-save | |
3791 // registers of the frame being removed. | |
3792 // | |
3793 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
3794 | |
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3795 // At a method handle call, the stack may not be properly aligned |
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3796 // when returning with an exception. |
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3797 address the_pc = __ pc(); |
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3798 __ set_last_Java_frame(noreg, noreg, the_pc); |
304 | 3799 __ mov(c_rarg0, r15_thread); |
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3800 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
0 | 3801 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
3802 | |
3803 // Set an oopmap for the call site. This oopmap will only be used if we | |
3804 // are unwinding the stack. Hence, all locations will be dead. | |
3805 // Callee-saved registers will be the same as the frame above (i.e., | |
3806 // handle_exception_stub), since they were restored when we got the | |
3807 // exception. | |
3808 | |
3809 OopMapSet* oop_maps = new OopMapSet(); | |
3810 | |
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3811 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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3812 |
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3813 __ reset_last_Java_frame(false, true); |
0 | 3814 |
3815 // Restore callee-saved registers | |
3816 | |
3817 // rbp is an implicitly saved callee saved register (i.e. the calling | |
3818 // convention will save restore it in prolog/epilog) Other than that | |
3819 // there are no callee save registers no that adapter frames are gone. | |
3820 | |
304 | 3821 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
3822 | |
3823 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
3824 __ pop(rdx); // No need for exception pc anymore | |
0 | 3825 |
3826 // rax: exception handler | |
3827 | |
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3828 // Restore SP from BP if the exception PC is a MethodHandle call site. |
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3829 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
1567 | 3830 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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3831 |
0 | 3832 // We have a handler in rax (could be deopt blob). |
304 | 3833 __ mov(r8, rax); |
0 | 3834 |
3835 // Get the exception oop | |
304 | 3836 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 3837 // Get the exception pc in case we are deoptimized |
304 | 3838 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 3839 #ifdef ASSERT |
3840 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
3841 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
3842 #endif | |
3843 // Clear the exception oop so GC no longer processes it as a root. | |
3844 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
3845 | |
3846 // rax: exception oop | |
3847 // r8: exception handler | |
3848 // rdx: exception pc | |
3849 // Jump to handler | |
3850 | |
3851 __ jmp(r8); | |
3852 | |
3853 // Make sure all code is generated | |
3854 masm->flush(); | |
3855 | |
3856 // Set exception blob | |
3857 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
3858 } | |
3859 #endif // COMPILER2 |