Mercurial > hg > graal-compiler
comparison src/cpu/x86/vm/x86_32.ad @ 785:2056494941db
6814842: Load shortening optimizations
Summary: 6797305 handles load widening but no shortening which should be covered here.
Reviewed-by: never, kvn
author | twisti |
---|---|
date | Wed, 13 May 2009 00:45:22 -0700 |
parents | 93c14e5562c4 |
children | 18a08a7e16b5 |
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784:b2934faac289 | 785:2056494941db |
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5238 | 5238 |
5239 format %{ %} | 5239 format %{ %} |
5240 interface(CONST_INTER); | 5240 interface(CONST_INTER); |
5241 %} | 5241 %} |
5242 | 5242 |
5243 // Constant for short-wide masking | |
5244 operand immI_65535() %{ | |
5245 predicate(n->get_int() == 65535); | |
5246 match(ConI); | |
5247 | |
5248 format %{ %} | |
5249 interface(CONST_INTER); | |
5250 %} | |
5251 | |
5243 // Register Operands | 5252 // Register Operands |
5244 // Integer Register | 5253 // Integer Register |
5245 operand eRegI() %{ | 5254 operand eRegI() %{ |
5246 constraint(ALLOC_IN_RC(e_reg)); | 5255 constraint(ALLOC_IN_RC(e_reg)); |
5247 match(RegI); | 5256 match(RegI); |
6936 %} | 6945 %} |
6937 | 6946 |
6938 ins_pipe(ialu_reg_mem); | 6947 ins_pipe(ialu_reg_mem); |
6939 %} | 6948 %} |
6940 | 6949 |
6950 // Load Short (16 bit signed) to Byte (8 bit signed) | |
6951 instruct loadS2B(eRegI dst, memory mem, immI_24 twentyfour) %{ | |
6952 match(Set dst (RShiftI (LShiftI (LoadS mem) twentyfour) twentyfour)); | |
6953 | |
6954 ins_cost(125); | |
6955 format %{ "MOVSX $dst, $mem\t# short -> byte" %} | |
6956 ins_encode %{ | |
6957 __ movsbl($dst$$Register, $mem$$Address); | |
6958 %} | |
6959 ins_pipe(ialu_reg_mem); | |
6960 %} | |
6961 | |
6941 // Load Short (16bit signed) into Long Register | 6962 // Load Short (16bit signed) into Long Register |
6942 instruct loadS2L(eRegL dst, memory mem) %{ | 6963 instruct loadS2L(eRegL dst, memory mem) %{ |
6943 match(Set dst (ConvI2L (LoadS mem))); | 6964 match(Set dst (ConvI2L (LoadS mem))); |
6944 | 6965 |
6945 ins_cost(375); | 6966 ins_cost(375); |
6968 %} | 6989 %} |
6969 | 6990 |
6970 ins_pipe(ialu_reg_mem); | 6991 ins_pipe(ialu_reg_mem); |
6971 %} | 6992 %} |
6972 | 6993 |
6994 // Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed) | |
6995 instruct loadUS2B(eRegI dst, memory mem, immI_24 twentyfour) %{ | |
6996 match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour)); | |
6997 | |
6998 ins_cost(125); | |
6999 format %{ "MOVSX $dst, $mem\t# ushort -> byte" %} | |
7000 ins_encode %{ | |
7001 __ movsbl($dst$$Register, $mem$$Address); | |
7002 %} | |
7003 ins_pipe(ialu_reg_mem); | |
7004 %} | |
7005 | |
6973 // Load Unsigned Short/Char (16 bit UNsigned) into Long Register | 7006 // Load Unsigned Short/Char (16 bit UNsigned) into Long Register |
6974 instruct loadUS2L(eRegL dst, memory mem) | 7007 instruct loadUS2L(eRegL dst, memory mem) %{ |
6975 %{ | |
6976 match(Set dst (ConvI2L (LoadUS mem))); | 7008 match(Set dst (ConvI2L (LoadUS mem))); |
6977 | 7009 |
6978 ins_cost(250); | 7010 ins_cost(250); |
6979 format %{ "MOVZX $dst.lo,$mem\t# ushort/char -> long\n\t" | 7011 format %{ "MOVZX $dst.lo,$mem\t# ushort/char -> long\n\t" |
6980 "XOR $dst.hi,$dst.hi" %} | 7012 "XOR $dst.hi,$dst.hi" %} |
6996 | 7028 |
6997 ins_encode %{ | 7029 ins_encode %{ |
6998 __ movl($dst$$Register, $mem$$Address); | 7030 __ movl($dst$$Register, $mem$$Address); |
6999 %} | 7031 %} |
7000 | 7032 |
7033 ins_pipe(ialu_reg_mem); | |
7034 %} | |
7035 | |
7036 // Load Integer (32 bit signed) to Byte (8 bit signed) | |
7037 instruct loadI2B(eRegI dst, memory mem, immI_24 twentyfour) %{ | |
7038 match(Set dst (RShiftI (LShiftI (LoadI mem) twentyfour) twentyfour)); | |
7039 | |
7040 ins_cost(125); | |
7041 format %{ "MOVSX $dst, $mem\t# int -> byte" %} | |
7042 ins_encode %{ | |
7043 __ movsbl($dst$$Register, $mem$$Address); | |
7044 %} | |
7045 ins_pipe(ialu_reg_mem); | |
7046 %} | |
7047 | |
7048 // Load Integer (32 bit signed) to Unsigned Byte (8 bit UNsigned) | |
7049 instruct loadI2UB(eRegI dst, memory mem, immI_255 mask) %{ | |
7050 match(Set dst (AndI (LoadI mem) mask)); | |
7051 | |
7052 ins_cost(125); | |
7053 format %{ "MOVZX $dst, $mem\t# int -> ubyte" %} | |
7054 ins_encode %{ | |
7055 __ movzbl($dst$$Register, $mem$$Address); | |
7056 %} | |
7057 ins_pipe(ialu_reg_mem); | |
7058 %} | |
7059 | |
7060 // Load Integer (32 bit signed) to Short (16 bit signed) | |
7061 instruct loadI2S(eRegI dst, memory mem, immI_16 sixteen) %{ | |
7062 match(Set dst (RShiftI (LShiftI (LoadI mem) sixteen) sixteen)); | |
7063 | |
7064 ins_cost(125); | |
7065 format %{ "MOVSX $dst, $mem\t# int -> short" %} | |
7066 ins_encode %{ | |
7067 __ movswl($dst$$Register, $mem$$Address); | |
7068 %} | |
7069 ins_pipe(ialu_reg_mem); | |
7070 %} | |
7071 | |
7072 // Load Integer (32 bit signed) to Unsigned Short/Char (16 bit UNsigned) | |
7073 instruct loadI2US(eRegI dst, memory mem, immI_65535 mask) %{ | |
7074 match(Set dst (AndI (LoadI mem) mask)); | |
7075 | |
7076 ins_cost(125); | |
7077 format %{ "MOVZX $dst, $mem\t# int -> ushort/char" %} | |
7078 ins_encode %{ | |
7079 __ movzwl($dst$$Register, $mem$$Address); | |
7080 %} | |
7001 ins_pipe(ialu_reg_mem); | 7081 ins_pipe(ialu_reg_mem); |
7002 %} | 7082 %} |
7003 | 7083 |
7004 // Load Integer into Long Register | 7084 // Load Integer into Long Register |
7005 instruct loadI2L(eRegL dst, memory mem) %{ | 7085 instruct loadI2L(eRegL dst, memory mem) %{ |
9032 %} | 9112 %} |
9033 | 9113 |
9034 | 9114 |
9035 // Logical Shift Right by 24, followed by Arithmetic Shift Left by 24. | 9115 // Logical Shift Right by 24, followed by Arithmetic Shift Left by 24. |
9036 // This idiom is used by the compiler for the i2b bytecode. | 9116 // This idiom is used by the compiler for the i2b bytecode. |
9037 instruct i2b(eRegI dst, xRegI src, immI_24 twentyfour, eFlagsReg cr) %{ | 9117 instruct i2b(eRegI dst, xRegI src, immI_24 twentyfour) %{ |
9038 match(Set dst (RShiftI (LShiftI src twentyfour) twentyfour)); | 9118 match(Set dst (RShiftI (LShiftI src twentyfour) twentyfour)); |
9039 effect(KILL cr); | |
9040 | 9119 |
9041 size(3); | 9120 size(3); |
9042 format %{ "MOVSX $dst,$src :8" %} | 9121 format %{ "MOVSX $dst,$src :8" %} |
9043 opcode(0xBE, 0x0F); | 9122 ins_encode %{ |
9044 ins_encode( OpcS, OpcP, RegReg( dst, src)); | 9123 __ movsbl($dst$$Register, $src$$Register); |
9045 ins_pipe( ialu_reg_reg ); | 9124 %} |
9125 ins_pipe(ialu_reg_reg); | |
9046 %} | 9126 %} |
9047 | 9127 |
9048 // Logical Shift Right by 16, followed by Arithmetic Shift Left by 16. | 9128 // Logical Shift Right by 16, followed by Arithmetic Shift Left by 16. |
9049 // This idiom is used by the compiler the i2s bytecode. | 9129 // This idiom is used by the compiler the i2s bytecode. |
9050 instruct i2s(eRegI dst, xRegI src, immI_16 sixteen, eFlagsReg cr) %{ | 9130 instruct i2s(eRegI dst, xRegI src, immI_16 sixteen) %{ |
9051 match(Set dst (RShiftI (LShiftI src sixteen) sixteen)); | 9131 match(Set dst (RShiftI (LShiftI src sixteen) sixteen)); |
9052 effect(KILL cr); | |
9053 | 9132 |
9054 size(3); | 9133 size(3); |
9055 format %{ "MOVSX $dst,$src :16" %} | 9134 format %{ "MOVSX $dst,$src :16" %} |
9056 opcode(0xBF, 0x0F); | 9135 ins_encode %{ |
9057 ins_encode( OpcS, OpcP, RegReg( dst, src)); | 9136 __ movswl($dst$$Register, $src$$Register); |
9058 ins_pipe( ialu_reg_reg ); | 9137 %} |
9138 ins_pipe(ialu_reg_reg); | |
9059 %} | 9139 %} |
9060 | 9140 |
9061 | 9141 |
9062 // Logical Shift Right by variable | 9142 // Logical Shift Right by variable |
9063 instruct shrI_eReg_CL(eRegI dst, eCXRegI shift, eFlagsReg cr) %{ | 9143 instruct shrI_eReg_CL(eRegI dst, eCXRegI shift, eFlagsReg cr) %{ |