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comparison src/cpu/x86/vm/vm_version_x86_64.hpp @ 405:2649e5276dd7

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6532536: Optimize arraycopy stubs for Intel cpus Summary: Use SSE2 movdqu in arraycopy stubs on newest Intel's cpus Reviewed-by: rasbold
author kvn
date Tue, 14 Oct 2008 15:10:26 -0700
parents a61af66fc99e
children ad8c8ca4ab0f
comparison
equal deleted inserted replaced
404:78c058bc5cdc 405:2649e5276dd7
66 cid : 1, 66 cid : 1,
67 : 2, 67 : 2,
68 cmpxchg16: 1, 68 cmpxchg16: 1,
69 : 4, 69 : 4,
70 dca : 1, 70 dca : 1,
71 : 4, 71 sse4_1 : 1,
72 popcnt : 1, 72 sse4_2 : 1,
73 : 8; 73 : 11;
74 } bits; 74 } bits;
75 }; 75 };
76 76
77 union StdCpuid1Edx { 77 union StdCpuid1Edx {
78 uint32_t value; 78 uint32_t value;
175 CPU_3DNOW= (1 << 5), 175 CPU_3DNOW= (1 << 5),
176 CPU_SSE = (1 << 6), 176 CPU_SSE = (1 << 6),
177 CPU_SSE2 = (1 << 7), 177 CPU_SSE2 = (1 << 7),
178 CPU_SSE3 = (1 << 8), 178 CPU_SSE3 = (1 << 8),
179 CPU_SSSE3= (1 << 9), 179 CPU_SSSE3= (1 << 9),
180 CPU_SSE4 = (1 <<10), 180 CPU_SSE4A= (1 <<10),
181 CPU_SSE4A= (1 <<11) 181 CPU_SSE4_1 = (1 << 11),
182 CPU_SSE4_2 = (1 << 12)
182 } cpuFeatureFlags; 183 } cpuFeatureFlags;
183 184
184 // cpuid information block. All info derived from executing cpuid with 185 // cpuid information block. All info derived from executing cpuid with
185 // various function numbers is stored here. Intel and AMD info is 186 // various function numbers is stored here. Intel and AMD info is
186 // merged in this block: accessor methods disentangle it. 187 // merged in this block: accessor methods disentangle it.
238 239
239 // The actual cpuid info block 240 // The actual cpuid info block
240 static CpuidInfo _cpuid_info; 241 static CpuidInfo _cpuid_info;
241 242
242 // Extractors and predicates 243 // Extractors and predicates
243 static bool is_extended_cpu_family() {
244 const uint32_t Extended_Cpu_Family = 0xf;
245 return _cpuid_info.std_cpuid1_eax.bits.family == Extended_Cpu_Family;
246 }
247 static uint32_t extended_cpu_family() { 244 static uint32_t extended_cpu_family() {
248 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.family; 245 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.family;
249 if (is_extended_cpu_family()) { 246 result += _cpuid_info.std_cpuid1_eax.bits.ext_family;
250 result += _cpuid_info.std_cpuid1_eax.bits.ext_family;
251 }
252 return result; 247 return result;
253 } 248 }
254 static uint32_t extended_cpu_model() { 249 static uint32_t extended_cpu_model() {
255 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.model; 250 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.model;
256 if (is_extended_cpu_family()) { 251 result |= _cpuid_info.std_cpuid1_eax.bits.ext_model << 4;
257 result |= _cpuid_info.std_cpuid1_eax.bits.ext_model << 4;
258 }
259 return result; 252 return result;
260 } 253 }
261 static uint32_t cpu_stepping() { 254 static uint32_t cpu_stepping() {
262 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.stepping; 255 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.stepping;
263 return result; 256 return result;
291 result |= CPU_SSE3; 284 result |= CPU_SSE3;
292 if (_cpuid_info.std_cpuid1_ecx.bits.ssse3 != 0) 285 if (_cpuid_info.std_cpuid1_ecx.bits.ssse3 != 0)
293 result |= CPU_SSSE3; 286 result |= CPU_SSSE3;
294 if (is_amd() && _cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0) 287 if (is_amd() && _cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0)
295 result |= CPU_SSE4A; 288 result |= CPU_SSE4A;
289 if (_cpuid_info.std_cpuid1_ecx.bits.sse4_1 != 0)
290 result |= CPU_SSE4_1;
291 if (_cpuid_info.std_cpuid1_ecx.bits.sse4_2 != 0)
292 result |= CPU_SSE4_2;
296 return result; 293 return result;
297 } 294 }
298 295
299 static void get_processor_features(); 296 static void get_processor_features();
300 297
378 static bool supports_mmx() { return (_cpuFeatures & CPU_MMX) != 0; } 375 static bool supports_mmx() { return (_cpuFeatures & CPU_MMX) != 0; }
379 static bool supports_sse() { return (_cpuFeatures & CPU_SSE) != 0; } 376 static bool supports_sse() { return (_cpuFeatures & CPU_SSE) != 0; }
380 static bool supports_sse2() { return (_cpuFeatures & CPU_SSE2) != 0; } 377 static bool supports_sse2() { return (_cpuFeatures & CPU_SSE2) != 0; }
381 static bool supports_sse3() { return (_cpuFeatures & CPU_SSE3) != 0; } 378 static bool supports_sse3() { return (_cpuFeatures & CPU_SSE3) != 0; }
382 static bool supports_ssse3() { return (_cpuFeatures & CPU_SSSE3)!= 0; } 379 static bool supports_ssse3() { return (_cpuFeatures & CPU_SSSE3)!= 0; }
383 static bool supports_sse4() { return (_cpuFeatures & CPU_SSE4) != 0; } 380 static bool supports_sse4_1() { return (_cpuFeatures & CPU_SSE4_1) != 0; }
381 static bool supports_sse4_2() { return (_cpuFeatures & CPU_SSE4_2) != 0; }
384 // 382 //
385 // AMD features 383 // AMD features
386 // 384 //
387 static bool supports_3dnow() { return (_cpuFeatures & CPU_3DNOW) != 0; } 385 static bool supports_3dnow() { return (_cpuFeatures & CPU_3DNOW) != 0; }
388 static bool supports_mmx_ext() { return is_amd() && _cpuid_info.ext_cpuid1_edx.bits.mmx_amd != 0; } 386 static bool supports_mmx_ext() { return is_amd() && _cpuid_info.ext_cpuid1_edx.bits.mmx_amd != 0; }