Mercurial > hg > graal-compiler

comparison graal/com.oracle.jvmci.amd64/src/com/oracle/jvmci/amd64/AMD64.java @ 21673:5024c80224c7

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
moved com.oracle.graal.[amd64|sparc] to com.oracle.jvmci.[amd64|sparc] (JBS:GRAAL-53)
author Doug Simon <doug.simon@oracle.com>
date Tue, 02 Jun 2015 22:11:52 +0200
parents graal/com.oracle.graal.amd64/src/com/oracle/graal/amd64/AMD64.java@48c1ebd24120
children
comparison
equal deleted inserted replaced
21672:476be2a91059 21673:5024c80224c7
1 /*
2 * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23 package com.oracle.jvmci.amd64;
24
25 import com.oracle.jvmci.code.Architecture;
26 import com.oracle.jvmci.code.Register;
27 import com.oracle.jvmci.meta.Kind;
28 import com.oracle.jvmci.meta.PlatformKind;
29 import static com.oracle.jvmci.code.MemoryBarriers.*;
30 import static com.oracle.jvmci.code.Register.*;
31
32 import java.nio.*;
33 import java.util.*;
34
35 import com.oracle.jvmci.code.Register.RegisterCategory;
36
37 /**
38 * Represents the AMD64 architecture.
39 */
40 public class AMD64 extends Architecture {
41
42 public static final RegisterCategory CPU = new RegisterCategory("CPU");
43
44 // @formatter:off
45
46 // General purpose CPU registers
47 public static final Register rax = new Register(0, 0, "rax", CPU);
48 public static final Register rcx = new Register(1, 1, "rcx", CPU);
49 public static final Register rdx = new Register(2, 2, "rdx", CPU);
50 public static final Register rbx = new Register(3, 3, "rbx", CPU);
51 public static final Register rsp = new Register(4, 4, "rsp", CPU);
52 public static final Register rbp = new Register(5, 5, "rbp", CPU);
53 public static final Register rsi = new Register(6, 6, "rsi", CPU);
54 public static final Register rdi = new Register(7, 7, "rdi", CPU);
55
56 public static final Register r8 = new Register(8, 8, "r8", CPU);
57 public static final Register r9 = new Register(9, 9, "r9", CPU);
58 public static final Register r10 = new Register(10, 10, "r10", CPU);
59 public static final Register r11 = new Register(11, 11, "r11", CPU);
60 public static final Register r12 = new Register(12, 12, "r12", CPU);
61 public static final Register r13 = new Register(13, 13, "r13", CPU);
62 public static final Register r14 = new Register(14, 14, "r14", CPU);
63 public static final Register r15 = new Register(15, 15, "r15", CPU);
64
65 public static final Register[] cpuRegisters = {
66 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
67 r8, r9, r10, r11, r12, r13, r14, r15
68 };
69
70 private static final int XMM_REFERENCE_MAP_SHIFT = 2;
71
72 public static final RegisterCategory XMM = new RegisterCategory("XMM", cpuRegisters.length, XMM_REFERENCE_MAP_SHIFT);
73
74 // XMM registers
75 public static final Register xmm0 = new Register(16, 0, "xmm0", XMM);
76 public static final Register xmm1 = new Register(17, 1, "xmm1", XMM);
77 public static final Register xmm2 = new Register(18, 2, "xmm2", XMM);
78 public static final Register xmm3 = new Register(19, 3, "xmm3", XMM);
79 public static final Register xmm4 = new Register(20, 4, "xmm4", XMM);
80 public static final Register xmm5 = new Register(21, 5, "xmm5", XMM);
81 public static final Register xmm6 = new Register(22, 6, "xmm6", XMM);
82 public static final Register xmm7 = new Register(23, 7, "xmm7", XMM);
83
84 public static final Register xmm8 = new Register(24, 8, "xmm8", XMM);
85 public static final Register xmm9 = new Register(25, 9, "xmm9", XMM);
86 public static final Register xmm10 = new Register(26, 10, "xmm10", XMM);
87 public static final Register xmm11 = new Register(27, 11, "xmm11", XMM);
88 public static final Register xmm12 = new Register(28, 12, "xmm12", XMM);
89 public static final Register xmm13 = new Register(29, 13, "xmm13", XMM);
90 public static final Register xmm14 = new Register(30, 14, "xmm14", XMM);
91 public static final Register xmm15 = new Register(31, 15, "xmm15", XMM);
92
93 public static final Register[] xmmRegisters = {
94 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
95 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
96 };
97
98 public static final Register[] cpuxmmRegisters = {
99 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
100 r8, r9, r10, r11, r12, r13, r14, r15,
101 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
102 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
103 };
104
105 /**
106 * Register used to construct an instruction-relative address.
107 */
108 public static final Register rip = new Register(32, -1, "rip", SPECIAL);
109
110 public static final Register[] allRegisters = {
111 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
112 r8, r9, r10, r11, r12, r13, r14, r15,
113 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
114 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
115 rip
116 };
117
118 // @formatter:on
119
120 /**
121 * Basic set of CPU features mirroring what is returned from the cpuid instruction.
122 */
123 public static enum CPUFeature {
124 SSE,
125 SSE2,
126 SSE3,
127 SSE4a,
128 SSE4_1,
129 SSE4_2,
130 SSSE3,
131 POPCNT,
132 LZCNT,
133 AVX,
134 AVX2,
135 ERMS,
136 AMD_3DNOW_PREFETCH,
137 AES,
138 BMI1
139 }
140
141 private final EnumSet<CPUFeature> features;
142
143 /**
144 * Set of flags to control code emission.
145 */
146 public static enum Flag {
147 UseCountLeadingZerosInstruction,
148 UseCountTrailingZerosInstruction
149 }
150
151 private final EnumSet<Flag> flags;
152
153 public AMD64(EnumSet<CPUFeature> features, EnumSet<Flag> flags) {
154 super("AMD64", 8, ByteOrder.LITTLE_ENDIAN, true, allRegisters, LOAD_STORE | STORE_STORE, 1, cpuRegisters.length + (xmmRegisters.length << XMM_REFERENCE_MAP_SHIFT), 8);
155 this.features = features;
156 this.flags = flags;
157 assert features.contains(CPUFeature.SSE2) : "minimum config for x64";
158 }
159
160 public EnumSet<CPUFeature> getFeatures() {
161 return features;
162 }
163
164 public EnumSet<Flag> getFlags() {
165 return flags;
166 }
167
168 @Override
169 public boolean canStoreValue(RegisterCategory category, PlatformKind platformKind) {
170 if (!(platformKind instanceof Kind)) {
171 return false;
172 }
173
174 Kind kind = (Kind) platformKind;
175 if (category.equals(CPU)) {
176 switch (kind) {
177 case Boolean:
178 case Byte:
179 case Char:
180 case Short:
181 case Int:
182 case Long:
183 case Object:
184 return true;
185 }
186 } else if (category.equals(XMM)) {
187 switch (kind) {
188 case Float:
189 case Double:
190 return true;
191 }
192 }
193
194 return false;
195 }
196
197 @Override
198 public PlatformKind getLargestStorableKind(RegisterCategory category) {
199 if (category.equals(CPU)) {
200 return Kind.Long;
201 } else if (category.equals(XMM)) {
202 return Kind.Double;
203 } else {
204 return Kind.Illegal;
205 }
206 }
207 }