Mercurial > hg > graal-compiler
comparison graal/com.oracle.jvmci.sparc/src/com/oracle/jvmci/sparc/SPARC.java @ 21673:5024c80224c7
moved com.oracle.graal.[amd64|sparc] to com.oracle.jvmci.[amd64|sparc] (JBS:GRAAL-53)
author | Doug Simon <doug.simon@oracle.com> |
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date | Tue, 02 Jun 2015 22:11:52 +0200 |
parents | graal/com.oracle.graal.sparc/src/com/oracle/graal/sparc/SPARC.java@48c1ebd24120 |
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21672:476be2a91059 | 21673:5024c80224c7 |
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1 /* | |
2 * Copyright (c) 2013, 2014, Oracle and/or its affiliates. All rights reserved. | |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA | |
20 * or visit www.oracle.com if you need additional information or have any | |
21 * questions. | |
22 */ | |
23 package com.oracle.jvmci.sparc; | |
24 | |
25 import com.oracle.jvmci.code.Architecture; | |
26 import com.oracle.jvmci.code.Register; | |
27 import com.oracle.jvmci.code.TargetDescription; | |
28 import com.oracle.jvmci.meta.Kind; | |
29 import com.oracle.jvmci.meta.PlatformKind; | |
30 import static com.oracle.jvmci.code.MemoryBarriers.*; | |
31 | |
32 import java.nio.*; | |
33 import java.util.*; | |
34 | |
35 import com.oracle.jvmci.code.Register.RegisterCategory; | |
36 | |
37 /** | |
38 * Represents the SPARC architecture. | |
39 */ | |
40 public class SPARC extends Architecture { | |
41 | |
42 public static final RegisterCategory CPU = new RegisterCategory("CPU"); | |
43 | |
44 // General purpose registers | |
45 public static final Register r0 = new Register(0, 0, "g0", CPU); | |
46 public static final Register r1 = new Register(1, 1, "g1", CPU); | |
47 public static final Register r2 = new Register(2, 2, "g2", CPU); | |
48 public static final Register r3 = new Register(3, 3, "g3", CPU); | |
49 public static final Register r4 = new Register(4, 4, "g4", CPU); | |
50 public static final Register r5 = new Register(5, 5, "g5", CPU); | |
51 public static final Register r6 = new Register(6, 6, "g6", CPU); | |
52 public static final Register r7 = new Register(7, 7, "g7", CPU); | |
53 | |
54 public static final Register r8 = new Register(8, 8, "o0", CPU); | |
55 public static final Register r9 = new Register(9, 9, "o1", CPU); | |
56 public static final Register r10 = new Register(10, 10, "o2", CPU); | |
57 public static final Register r11 = new Register(11, 11, "o3", CPU); | |
58 public static final Register r12 = new Register(12, 12, "o4", CPU); | |
59 public static final Register r13 = new Register(13, 13, "o5", CPU); | |
60 public static final Register r14 = new Register(14, 14, "o6", CPU); | |
61 public static final Register r15 = new Register(15, 15, "o7", CPU); | |
62 | |
63 public static final Register r16 = new Register(16, 16, "l0", CPU); | |
64 public static final Register r17 = new Register(17, 17, "l1", CPU); | |
65 public static final Register r18 = new Register(18, 18, "l2", CPU); | |
66 public static final Register r19 = new Register(19, 19, "l3", CPU); | |
67 public static final Register r20 = new Register(20, 20, "l4", CPU); | |
68 public static final Register r21 = new Register(21, 21, "l5", CPU); | |
69 public static final Register r22 = new Register(22, 22, "l6", CPU); | |
70 public static final Register r23 = new Register(23, 23, "l7", CPU); | |
71 | |
72 public static final Register r24 = new Register(24, 24, "i0", CPU); | |
73 public static final Register r25 = new Register(25, 25, "i1", CPU); | |
74 public static final Register r26 = new Register(26, 26, "i2", CPU); | |
75 public static final Register r27 = new Register(27, 27, "i3", CPU); | |
76 public static final Register r28 = new Register(28, 28, "i4", CPU); | |
77 public static final Register r29 = new Register(29, 29, "i5", CPU); | |
78 public static final Register r30 = new Register(30, 30, "i6", CPU); | |
79 public static final Register r31 = new Register(31, 31, "i7", CPU); | |
80 | |
81 public static final Register g0 = r0; | |
82 public static final Register g1 = r1; | |
83 public static final Register g2 = r2; | |
84 public static final Register g3 = r3; | |
85 public static final Register g4 = r4; | |
86 public static final Register g5 = r5; | |
87 public static final Register g6 = r6; | |
88 public static final Register g7 = r7; | |
89 | |
90 public static final Register o0 = r8; | |
91 public static final Register o1 = r9; | |
92 public static final Register o2 = r10; | |
93 public static final Register o3 = r11; | |
94 public static final Register o4 = r12; | |
95 public static final Register o5 = r13; | |
96 public static final Register o6 = r14; | |
97 public static final Register o7 = r15; | |
98 | |
99 public static final Register l0 = r16; | |
100 public static final Register l1 = r17; | |
101 public static final Register l2 = r18; | |
102 public static final Register l3 = r19; | |
103 public static final Register l4 = r20; | |
104 public static final Register l5 = r21; | |
105 public static final Register l6 = r22; | |
106 public static final Register l7 = r23; | |
107 | |
108 public static final Register i0 = r24; | |
109 public static final Register i1 = r25; | |
110 public static final Register i2 = r26; | |
111 public static final Register i3 = r27; | |
112 public static final Register i4 = r28; | |
113 public static final Register i5 = r29; | |
114 public static final Register i6 = r30; | |
115 public static final Register i7 = r31; | |
116 | |
117 public static final Register sp = o6; | |
118 public static final Register fp = i6; | |
119 | |
120 // @formatter:off | |
121 public static final Register[] cpuRegisters = { | |
122 r0, r1, r2, r3, r4, r5, r6, r7, | |
123 r8, r9, r10, r11, r12, r13, r14, r15, | |
124 r16, r17, r18, r19, r20, r21, r22, r23, | |
125 r24, r25, r26, r27, r28, r29, r30, r31 | |
126 }; | |
127 // @formatter:on | |
128 | |
129 public static final RegisterCategory FPUs = new RegisterCategory("FPUs", cpuRegisters.length); | |
130 public static final RegisterCategory FPUd = new RegisterCategory("FPUd", cpuRegisters.length + 32); | |
131 | |
132 // Floating point registers | |
133 public static final Register f0 = new Register(32, 0, "f0", FPUs); | |
134 public static final Register f1 = new Register(33, 1, "f1", FPUs); | |
135 public static final Register f2 = new Register(34, 2, "f2", FPUs); | |
136 public static final Register f3 = new Register(35, 3, "f3", FPUs); | |
137 public static final Register f4 = new Register(36, 4, "f4", FPUs); | |
138 public static final Register f5 = new Register(37, 5, "f5", FPUs); | |
139 public static final Register f6 = new Register(38, 6, "f6", FPUs); | |
140 public static final Register f7 = new Register(39, 7, "f7", FPUs); | |
141 | |
142 public static final Register f8 = new Register(40, 8, "f8", FPUs); | |
143 public static final Register f9 = new Register(41, 9, "f9", FPUs); | |
144 public static final Register f10 = new Register(42, 10, "f10", FPUs); | |
145 public static final Register f11 = new Register(43, 11, "f11", FPUs); | |
146 public static final Register f12 = new Register(44, 12, "f12", FPUs); | |
147 public static final Register f13 = new Register(45, 13, "f13", FPUs); | |
148 public static final Register f14 = new Register(46, 14, "f14", FPUs); | |
149 public static final Register f15 = new Register(47, 15, "f15", FPUs); | |
150 | |
151 public static final Register f16 = new Register(48, 16, "f16", FPUs); | |
152 public static final Register f17 = new Register(49, 17, "f17", FPUs); | |
153 public static final Register f18 = new Register(50, 18, "f18", FPUs); | |
154 public static final Register f19 = new Register(51, 19, "f19", FPUs); | |
155 public static final Register f20 = new Register(52, 20, "f20", FPUs); | |
156 public static final Register f21 = new Register(53, 21, "f21", FPUs); | |
157 public static final Register f22 = new Register(54, 22, "f22", FPUs); | |
158 public static final Register f23 = new Register(55, 23, "f23", FPUs); | |
159 | |
160 public static final Register f24 = new Register(56, 24, "f24", FPUs); | |
161 public static final Register f25 = new Register(57, 25, "f25", FPUs); | |
162 public static final Register f26 = new Register(58, 26, "f26", FPUs); | |
163 public static final Register f27 = new Register(59, 27, "f27", FPUs); | |
164 public static final Register f28 = new Register(60, 28, "f28", FPUs); | |
165 public static final Register f29 = new Register(61, 29, "f29", FPUs); | |
166 public static final Register f30 = new Register(62, 30, "f30", FPUs); | |
167 public static final Register f31 = new Register(63, 31, "f31", FPUs); | |
168 | |
169 public static final Register d0 = new Register(32, getDoubleEncoding(0), "d0", FPUs); | |
170 public static final Register d2 = new Register(34, getDoubleEncoding(2), "d2", FPUs); | |
171 public static final Register d4 = new Register(36, getDoubleEncoding(4), "d4", FPUs); | |
172 public static final Register d6 = new Register(38, getDoubleEncoding(6), "d6", FPUs); | |
173 public static final Register d8 = new Register(40, getDoubleEncoding(8), "d8", FPUs); | |
174 public static final Register d10 = new Register(42, getDoubleEncoding(10), "d10", FPUs); | |
175 public static final Register d12 = new Register(44, getDoubleEncoding(12), "d12", FPUs); | |
176 public static final Register d14 = new Register(46, getDoubleEncoding(14), "d14", FPUs); | |
177 | |
178 public static final Register d16 = new Register(48, getDoubleEncoding(16), "d16", FPUs); | |
179 public static final Register d18 = new Register(50, getDoubleEncoding(18), "d18", FPUs); | |
180 public static final Register d20 = new Register(52, getDoubleEncoding(20), "d20", FPUs); | |
181 public static final Register d22 = new Register(54, getDoubleEncoding(22), "d22", FPUs); | |
182 public static final Register d24 = new Register(56, getDoubleEncoding(24), "d24", FPUs); | |
183 public static final Register d26 = new Register(58, getDoubleEncoding(26), "d26", FPUs); | |
184 public static final Register d28 = new Register(60, getDoubleEncoding(28), "d28", FPUs); | |
185 public static final Register d30 = new Register(62, getDoubleEncoding(28), "d28", FPUs); | |
186 | |
187 public static final Register d32 = new Register(64, getDoubleEncoding(32), "d32", FPUd); | |
188 public static final Register d34 = new Register(65, getDoubleEncoding(34), "d34", FPUd); | |
189 public static final Register d36 = new Register(66, getDoubleEncoding(36), "d36", FPUd); | |
190 public static final Register d38 = new Register(67, getDoubleEncoding(38), "d38", FPUd); | |
191 public static final Register d40 = new Register(68, getDoubleEncoding(40), "d40", FPUd); | |
192 public static final Register d42 = new Register(69, getDoubleEncoding(42), "d42", FPUd); | |
193 public static final Register d44 = new Register(70, getDoubleEncoding(44), "d44", FPUd); | |
194 public static final Register d46 = new Register(71, getDoubleEncoding(46), "d46", FPUd); | |
195 | |
196 public static final Register d48 = new Register(72, getDoubleEncoding(48), "d48", FPUd); | |
197 public static final Register d50 = new Register(73, getDoubleEncoding(50), "d50", FPUd); | |
198 public static final Register d52 = new Register(74, getDoubleEncoding(52), "d52", FPUd); | |
199 public static final Register d54 = new Register(75, getDoubleEncoding(54), "d54", FPUd); | |
200 public static final Register d56 = new Register(76, getDoubleEncoding(56), "d56", FPUd); | |
201 public static final Register d58 = new Register(77, getDoubleEncoding(58), "d58", FPUd); | |
202 public static final Register d60 = new Register(78, getDoubleEncoding(60), "d60", FPUd); | |
203 public static final Register d62 = new Register(79, getDoubleEncoding(62), "d62", FPUd); | |
204 | |
205 // @formatter:off | |
206 public static final Register[] fpuRegisters = { | |
207 f0, f1, f2, f3, f4, f5, f6, f7, | |
208 f8, f9, f10, f11, f12, f13, f14, f15, | |
209 f16, f17, f18, f19, f20, f21, f22, f23, | |
210 f24, f25, f26, f27, f28, f29, f30, f31, | |
211 d32, d34, d36, d38, d40, d42, d44, d46, | |
212 d48, d50, d52, d54, d56, d58, d60, d62 | |
213 }; | |
214 // @formatter:on | |
215 | |
216 // @formatter:off | |
217 public static final Register[] allRegisters = { | |
218 // CPU | |
219 r0, r1, r2, r3, r4, r5, r6, r7, | |
220 r8, r9, r10, r11, r12, r13, r14, r15, | |
221 r16, r17, r18, r19, r20, r21, r22, r23, | |
222 r24, r25, r26, r27, r28, r29, r30, r31, | |
223 // FPU | |
224 f0, f1, f2, f3, f4, f5, f6, f7, | |
225 f8, f9, f10, f11, f12, f13, f14, f15, | |
226 f16, f17, f18, f19, f20, f21, f22, f23, | |
227 f24, f25, f26, f27, f28, f29, f30, f31, | |
228 d32, d34, d36, d38, d40, d42, d44, d46, | |
229 d48, d50, d52, d54, d56, d58, d60, d62 | |
230 }; | |
231 // @formatter:on | |
232 | |
233 /** | |
234 * Stack bias for stack and frame pointer loads. | |
235 */ | |
236 public static final int STACK_BIAS = 0x7ff; | |
237 /** | |
238 * In fact there are 64 single floating point registers, 32 of them could be accessed. TODO: | |
239 * Improve handling of these float registers | |
240 */ | |
241 public static final int FLOAT_REGISTER_COUNT = 64; | |
242 | |
243 /** | |
244 * Alignment for valid memory access. | |
245 */ | |
246 public static final int MEMORY_ACCESS_ALIGN = 4; | |
247 | |
248 public final Set<CPUFeature> features; | |
249 | |
250 public SPARC(Set<CPUFeature> features) { | |
251 super("SPARC", 8, ByteOrder.BIG_ENDIAN, false, allRegisters, LOAD_STORE | STORE_STORE, 1, r31.encoding + FLOAT_REGISTER_COUNT + 1, 8); | |
252 this.features = features; | |
253 } | |
254 | |
255 @Override | |
256 public boolean canStoreValue(RegisterCategory category, PlatformKind lirKind) { | |
257 if (!(lirKind instanceof Kind)) { | |
258 return false; | |
259 } | |
260 | |
261 Kind kind = (Kind) lirKind; | |
262 if (category.equals(CPU)) { | |
263 switch (kind) { | |
264 case Boolean: | |
265 case Byte: | |
266 case Char: | |
267 case Short: | |
268 case Int: | |
269 case Long: | |
270 case Object: | |
271 return true; | |
272 } | |
273 } else if (category.equals(FPUs) && kind.equals(Kind.Float)) { | |
274 return true; | |
275 } else if (category.equals(FPUd) && kind.equals(Kind.Double)) { | |
276 return true; | |
277 } | |
278 return false; | |
279 } | |
280 | |
281 @Override | |
282 public PlatformKind getLargestStorableKind(RegisterCategory category) { | |
283 if (category.equals(CPU)) { | |
284 return Kind.Long; | |
285 } else if (category.equals(FPUs)) { | |
286 return Kind.Double; | |
287 } else { | |
288 return Kind.Illegal; | |
289 } | |
290 } | |
291 | |
292 public static int spillSlotSize(TargetDescription td, PlatformKind kind) { | |
293 return Math.max(td.getSizeInBytes(kind), MEMORY_ACCESS_ALIGN); | |
294 } | |
295 | |
296 public static int getDoubleEncoding(int reg) { | |
297 assert reg < 64 && ((reg & 1) == 0); | |
298 // ignore v8 assertion for now | |
299 return (reg & 0x1e) | ((reg & 0x20) >> 5); | |
300 } | |
301 | |
302 public static boolean isCPURegister(Register r) { | |
303 return r.getRegisterCategory().equals(CPU); | |
304 } | |
305 | |
306 public static boolean isCPURegister(Register... regs) { | |
307 for (Register reg : regs) { | |
308 if (!isCPURegister(reg)) { | |
309 return false; | |
310 } | |
311 } | |
312 return true; | |
313 } | |
314 | |
315 public static boolean isSingleFloatRegister(Register r) { | |
316 return r.name.startsWith("f"); | |
317 } | |
318 | |
319 public static boolean isDoubleFloatRegister(Register r) { | |
320 return r.name.startsWith("d"); | |
321 } | |
322 | |
323 public Set<CPUFeature> getFeatures() { | |
324 return features; | |
325 } | |
326 | |
327 public boolean hasFeature(CPUFeature feature) { | |
328 return features.contains(feature); | |
329 } | |
330 | |
331 public enum CPUFeature { | |
332 VIS1, | |
333 VIS2, | |
334 VIS3, | |
335 CBCOND | |
336 } | |
337 } |