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comparison src/cpu/x86/vm/x86_64.ad @ 1827:52e82a6bedaf

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6968348: Byteswapped memory access can point to wrong location after JIT Reviewed-by: twisti, kvn, iveresov
author never
date Mon, 04 Oct 2010 17:09:18 -0700
parents 3e8fbc61cee8
children ae065c367d93
comparison
equal deleted inserted replaced
1826:56601ef83436 1827:52e82a6bedaf
7347 __ sarl($dst$$Register, 16); 7347 __ sarl($dst$$Register, 16);
7348 %} 7348 %}
7349 ins_pipe( ialu_reg ); 7349 ins_pipe( ialu_reg );
7350 %} 7350 %}
7351 7351
7352 instruct loadI_reversed(rRegI dst, memory src) %{
7353 match(Set dst (ReverseBytesI (LoadI src)));
7354
7355 format %{ "bswap_movl $dst, $src" %}
7356 opcode(0x8B, 0x0F, 0xC8); /* Opcode 8B 0F C8 */
7357 ins_encode(REX_reg_mem(dst, src), OpcP, reg_mem(dst, src), REX_reg(dst), OpcS, opc3_reg(dst));
7358 ins_pipe( ialu_reg_mem );
7359 %}
7360
7361 instruct loadL_reversed(rRegL dst, memory src) %{
7362 match(Set dst (ReverseBytesL (LoadL src)));
7363
7364 format %{ "bswap_movq $dst, $src" %}
7365 opcode(0x8B, 0x0F, 0xC8); /* Opcode 8B 0F C8 */
7366 ins_encode(REX_reg_mem_wide(dst, src), OpcP, reg_mem(dst, src), REX_reg_wide(dst), OpcS, opc3_reg(dst));
7367 ins_pipe( ialu_reg_mem );
7368 %}
7369
7370 instruct storeI_reversed(memory dst, rRegI src) %{
7371 match(Set dst (StoreI dst (ReverseBytesI src)));
7372
7373 format %{ "movl_bswap $dst, $src" %}
7374 opcode(0x0F, 0xC8, 0x89); /* Opcode 0F C8 89 */
7375 ins_encode( REX_reg(src), OpcP, opc2_reg(src), REX_reg_mem(src, dst), OpcT, reg_mem(src, dst) );
7376 ins_pipe( ialu_mem_reg );
7377 %}
7378
7379 instruct storeL_reversed(memory dst, rRegL src) %{
7380 match(Set dst (StoreL dst (ReverseBytesL src)));
7381
7382 format %{ "movq_bswap $dst, $src" %}
7383 opcode(0x0F, 0xC8, 0x89); /* Opcode 0F C8 89 */
7384 ins_encode( REX_reg_wide(src), OpcP, opc2_reg(src), REX_reg_mem_wide(src, dst), OpcT, reg_mem(src, dst) );
7385 ins_pipe( ialu_mem_reg );
7386 %}
7387
7388
7389 //---------- Zeros Count Instructions ------------------------------------------ 7352 //---------- Zeros Count Instructions ------------------------------------------
7390 7353
7391 instruct countLeadingZerosI(rRegI dst, rRegI src, rFlagsReg cr) %{ 7354 instruct countLeadingZerosI(rRegI dst, rRegI src, rFlagsReg cr) %{
7392 predicate(UseCountLeadingZerosInstruction); 7355 predicate(UseCountLeadingZerosInstruction);
7393 match(Set dst (CountLeadingZerosI src)); 7356 match(Set dst (CountLeadingZerosI src));