Mercurial > hg > graal-compiler

comparison src/cpu/ppc/vm/macroAssembler_ppc.inline.hpp @ 14445:67fa91961822

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
8029940: PPC64 (part 122): C2 compiler port Reviewed-by: kvn
author goetz
date Wed, 11 Dec 2013 00:06:11 +0100
parents b0133e4187d3
children e5e8aa897002
comparison
equal deleted inserted replaced
14444:492e67693373 14445:67fa91961822
56 clrrdi(r, r, log2_long((jlong)modulus)); 56 clrrdi(r, r, log2_long((jlong)modulus));
57 } 57 }
58 58
59 // Move register if destination register and target register are different. 59 // Move register if destination register and target register are different.
60 inline void MacroAssembler::mr_if_needed(Register rd, Register rs) { 60 inline void MacroAssembler::mr_if_needed(Register rd, Register rs) {
61 if(rs !=rd) mr(rd, rs); 61 if (rs != rd) mr(rd, rs);
62 } 62 }
63 inline void MacroAssembler::fmr_if_needed(FloatRegister rd, FloatRegister rs) {
64 if (rs != rd) fmr(rd, rs);
65 }
66 inline void MacroAssembler::endgroup_if_needed(bool needed) {
67 if (needed) {
68 endgroup();
69 }
70 }
71
72 inline void MacroAssembler::membar(int bits) {
73 // TODO: use elemental_membar(bits) for Power 8 and disable optimization of acquire-release
74 // (Matcher::post_membar_release where we use PPC64_ONLY(xop == Op_MemBarRelease ||))
75 if (bits & StoreLoad) sync(); else lwsync();
76 }
77 inline void MacroAssembler::release() { membar(LoadStore | StoreStore); }
78 inline void MacroAssembler::acquire() { membar(LoadLoad | LoadStore); }
79 inline void MacroAssembler::fence() { membar(LoadLoad | LoadStore | StoreLoad | StoreStore); }
63 80
64 // Address of the global TOC. 81 // Address of the global TOC.
65 inline address MacroAssembler::global_toc() { 82 inline address MacroAssembler::global_toc() {
66 return CodeCache::low_bound(); 83 return CodeCache::low_bound();
67 } 84 }
115 #ifdef _LP64 132 #ifdef _LP64
116 // Detect narrow oop constants. 133 // Detect narrow oop constants.
117 inline bool MacroAssembler::is_set_narrow_oop(address a, address bound) { 134 inline bool MacroAssembler::is_set_narrow_oop(address a, address bound) {
118 const address inst2_addr = a; 135 const address inst2_addr = a;
119 const int inst2 = *(int *)a; 136 const int inst2 = *(int *)a;
120 137 // The relocation points to the second instruction, the ori.
121 // The relocation points to the second instruction, the addi. 138 if (!is_ori(inst2)) return false;
122 if (!is_addi(inst2)) return false; 139
123 140 // The ori reads and writes the same register dst.
124 // The addi reads and writes the same register dst. 141 const int dst = inv_rta_field(inst2);
125 const int dst = inv_rt_field(inst2); 142 if (inv_rs_field(inst2) != dst) return false;
126 if (inv_ra_field(inst2) != dst) return false;
127 143
128 // Now, find the preceding addis which writes to dst. 144 // Now, find the preceding addis which writes to dst.
129 int inst1 = 0; 145 int inst1 = 0;
130 address inst1_addr = inst2_addr - BytesPerInstWord; 146 address inst1_addr = inst2_addr - BytesPerInstWord;
131 while (inst1_addr >= bound) { 147 while (inst1_addr >= bound) {
264 } 280 }
265 281
266 // Do an explicit null check if access to a+offset will not raise a SIGSEGV. 282 // Do an explicit null check if access to a+offset will not raise a SIGSEGV.
267 // Either issue a trap instruction that raises SIGTRAP, or do a compare that 283 // Either issue a trap instruction that raises SIGTRAP, or do a compare that
268 // branches to exception_entry. 284 // branches to exception_entry.
269 // No support for compressed oops (base page of heap). Does not distinguish 285 // No support for compressed oops (base page of heap). Does not distinguish
270 // loads and stores. 286 // loads and stores.
271 inline void MacroAssembler::null_check_throw(Register a, int offset, Register temp_reg, address exception_entry) { 287 inline void MacroAssembler::null_check_throw(Register a, int offset, Register temp_reg,
288 address exception_entry) {
272 if (!ImplicitNullChecks || needs_explicit_null_check(offset) || !os::zero_page_read_protected()) { 289 if (!ImplicitNullChecks || needs_explicit_null_check(offset) || !os::zero_page_read_protected()) {
273 if (TrapBasedNullChecks) { 290 if (TrapBasedNullChecks) {
274 assert(UseSIGTRAP, "sanity"); 291 assert(UseSIGTRAP, "sanity");
275 trap_null_check(a); 292 trap_null_check(a);
276 } else { 293 } else {
283 bind(ok); 300 bind(ok);
284 } 301 }
285 } 302 }
286 } 303 }
287 304
288 inline void MacroAssembler::ld_with_trap_null_check(Register d, int si16, Register s1) { 305 inline void MacroAssembler::load_with_trap_null_check(Register d, int si16, Register s1) {
289 if (!os::zero_page_read_protected()) { 306 if (!os::zero_page_read_protected()) {
290 if (TrapBasedNullChecks) { 307 if (TrapBasedNullChecks) {
291 trap_null_check(s1); 308 trap_null_check(s1);
292 } 309 }
293 } 310 }
294 ld(d, si16, s1); 311 ld(d, si16, s1);
295 }
296
297 // Attention: No null check for loaded uncompressed OOP. Can be used for loading klass field.
298 inline void MacroAssembler::load_heap_oop_with_trap_null_check(Register d, RegisterOrConstant si16,
299 Register s1) {
300 if ( !os::zero_page_read_protected()) {
301 if (TrapBasedNullChecks) {
302 trap_null_check(s1);
303 }
304 }
305 load_heap_oop_not_null(d, si16, s1);
306 } 312 }
307 313
308 inline void MacroAssembler::load_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1) { 314 inline void MacroAssembler::load_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1) {
309 if (UseCompressedOops) { 315 if (UseCompressedOops) {
310 lwz(d, offs, s1); 316 lwz(d, offs, s1);