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comparison src/cpu/x86/vm/vm_version_x86.hpp @ 11173:6b0fd0964b87

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Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/
author Doug Simon <doug.simon@oracle.com>
date Wed, 31 Jul 2013 11:00:54 +0200
parents 989155e2d07a b800986664f4
children eefb0224149d
comparison
equal deleted inserted replaced
10912:4ea54634f03e 11173:6b0fd0964b87
1 /* 1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
59 59
60 union StdCpuid1Ecx { 60 union StdCpuid1Ecx {
61 uint32_t value; 61 uint32_t value;
62 struct { 62 struct {
63 uint32_t sse3 : 1, 63 uint32_t sse3 : 1,
64 : 2, 64 clmul : 1,
65 : 1,
65 monitor : 1, 66 monitor : 1,
66 : 1, 67 : 1,
67 vmx : 1, 68 vmx : 1,
68 : 1, 69 : 1,
69 est : 1, 70 est : 1,
247 CPU_TSC = (1 << 15), 248 CPU_TSC = (1 << 15),
248 CPU_TSCINV = (1 << 16), 249 CPU_TSCINV = (1 << 16),
249 CPU_AVX = (1 << 17), 250 CPU_AVX = (1 << 17),
250 CPU_AVX2 = (1 << 18), 251 CPU_AVX2 = (1 << 18),
251 CPU_AES = (1 << 19), 252 CPU_AES = (1 << 19),
252 CPU_ERMS = (1 << 20) // enhanced 'rep movsb/stosb' instructions 253 CPU_ERMS = (1 << 20), // enhanced 'rep movsb/stosb' instructions
254 CPU_CLMUL = (1 << 21) // carryless multiply for CRC
253 } cpuFeatureFlags; 255 } cpuFeatureFlags;
254 256
255 enum { 257 enum {
256 // AMD 258 // AMD
257 CPU_FAMILY_AMD_11H = 0x11, 259 CPU_FAMILY_AMD_11H = 0x11,
427 result |= CPU_TSCINV; 429 result |= CPU_TSCINV;
428 if (_cpuid_info.std_cpuid1_ecx.bits.aes != 0) 430 if (_cpuid_info.std_cpuid1_ecx.bits.aes != 0)
429 result |= CPU_AES; 431 result |= CPU_AES;
430 if (_cpuid_info.sef_cpuid7_ebx.bits.erms != 0) 432 if (_cpuid_info.sef_cpuid7_ebx.bits.erms != 0)
431 result |= CPU_ERMS; 433 result |= CPU_ERMS;
434 if (_cpuid_info.std_cpuid1_ecx.bits.clmul != 0)
435 result |= CPU_CLMUL;
432 436
433 // AMD features. 437 // AMD features.
434 if (is_amd()) { 438 if (is_amd()) {
435 if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) || 439 if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) ||
436 (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0)) 440 (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0))
553 static bool supports_avx() { return (_cpuFeatures & CPU_AVX) != 0; } 557 static bool supports_avx() { return (_cpuFeatures & CPU_AVX) != 0; }
554 static bool supports_avx2() { return (_cpuFeatures & CPU_AVX2) != 0; } 558 static bool supports_avx2() { return (_cpuFeatures & CPU_AVX2) != 0; }
555 static bool supports_tsc() { return (_cpuFeatures & CPU_TSC) != 0; } 559 static bool supports_tsc() { return (_cpuFeatures & CPU_TSC) != 0; }
556 static bool supports_aes() { return (_cpuFeatures & CPU_AES) != 0; } 560 static bool supports_aes() { return (_cpuFeatures & CPU_AES) != 0; }
557 static bool supports_erms() { return (_cpuFeatures & CPU_ERMS) != 0; } 561 static bool supports_erms() { return (_cpuFeatures & CPU_ERMS) != 0; }
562 static bool supports_clmul() { return (_cpuFeatures & CPU_CLMUL) != 0; }
558 563
559 // Intel features 564 // Intel features
560 static bool is_intel_family_core() { return is_intel() && 565 static bool is_intel_family_core() { return is_intel() &&
561 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } 566 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; }
562 567