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comparison src/share/vm/c1/c1_LIR.cpp @ 11173:6b0fd0964b87

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Merge with http://hg.openjdk.java.net/hsx/hsx25/hotspot/
author Doug Simon <doug.simon@oracle.com>
date Wed, 31 Jul 2013 11:00:54 +0200
parents b800986664f4
children d13d7aba8c12
comparison
equal deleted inserted replaced
10912:4ea54634f03e 11173:6b0fd0964b87
199 #ifndef PRODUCT 199 #ifndef PRODUCT
200 void LIR_OprDesc::validate_type() const { 200 void LIR_OprDesc::validate_type() const {
201 201
202 #ifdef ASSERT 202 #ifdef ASSERT
203 if (!is_pointer() && !is_illegal()) { 203 if (!is_pointer() && !is_illegal()) {
204 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
204 switch (as_BasicType(type_field())) { 205 switch (as_BasicType(type_field())) {
205 case T_LONG: 206 case T_LONG:
206 assert((kind_field() == cpu_register || kind_field() == stack_value) && 207 assert((kindfield == cpu_register || kindfield == stack_value) &&
207 size_field() == double_size, "must match"); 208 size_field() == double_size, "must match");
208 break; 209 break;
209 case T_FLOAT: 210 case T_FLOAT:
210 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) 211 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
211 assert((kind_field() == fpu_register || kind_field() == stack_value 212 assert((kindfield == fpu_register || kindfield == stack_value
212 ARM_ONLY(|| kind_field() == cpu_register) 213 ARM_ONLY(|| kindfield == cpu_register)
213 PPC_ONLY(|| kind_field() == cpu_register) ) && 214 PPC_ONLY(|| kindfield == cpu_register) ) &&
214 size_field() == single_size, "must match"); 215 size_field() == single_size, "must match");
215 break; 216 break;
216 case T_DOUBLE: 217 case T_DOUBLE:
217 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) 218 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
218 assert((kind_field() == fpu_register || kind_field() == stack_value 219 assert((kindfield == fpu_register || kindfield == stack_value
219 ARM_ONLY(|| kind_field() == cpu_register) 220 ARM_ONLY(|| kindfield == cpu_register)
220 PPC_ONLY(|| kind_field() == cpu_register) ) && 221 PPC_ONLY(|| kindfield == cpu_register) ) &&
221 size_field() == double_size, "must match"); 222 size_field() == double_size, "must match");
222 break; 223 break;
223 case T_BOOLEAN: 224 case T_BOOLEAN:
224 case T_CHAR: 225 case T_CHAR:
225 case T_BYTE: 226 case T_BYTE:
227 case T_INT: 228 case T_INT:
228 case T_ADDRESS: 229 case T_ADDRESS:
229 case T_OBJECT: 230 case T_OBJECT:
230 case T_METADATA: 231 case T_METADATA:
231 case T_ARRAY: 232 case T_ARRAY:
232 assert((kind_field() == cpu_register || kind_field() == stack_value) && 233 assert((kindfield == cpu_register || kindfield == stack_value) &&
233 size_field() == single_size, "must match"); 234 size_field() == single_size, "must match");
234 break; 235 break;
235 236
236 case T_ILLEGAL: 237 case T_ILLEGAL:
237 // XXX TKR also means unknown right now 238 // XXX TKR also means unknown right now
427 , _expected_type(expected_type) 428 , _expected_type(expected_type)
428 , _length(length) { 429 , _length(length) {
429 _stub = new ArrayCopyStub(this); 430 _stub = new ArrayCopyStub(this);
430 } 431 }
431 432
433 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
434 : LIR_Op(lir_updatecrc32, res, NULL)
435 , _crc(crc)
436 , _val(val) {
437 }
432 438
433 //-------------------verify-------------------------- 439 //-------------------verify--------------------------
434 440
435 void LIR_Op1::verify() const { 441 void LIR_Op1::verify() const {
436 switch(code()) { 442 switch(code()) {
873 879
874 break; 880 break;
875 } 881 }
876 882
877 883
884 // LIR_OpUpdateCRC32
885 case lir_updatecrc32: {
886 assert(op->as_OpUpdateCRC32() != NULL, "must be");
887 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
888
889 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
890 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
891 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
892 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
893
894 break;
895 }
896
897
878 // LIR_OpLock 898 // LIR_OpLock
879 case lir_lock: 899 case lir_lock:
880 case lir_unlock: { 900 case lir_unlock: {
881 assert(op->as_OpLock() != NULL, "must be"); 901 assert(op->as_OpLock() != NULL, "must be");
882 LIR_OpLock* opLock = (LIR_OpLock*)op; 902 LIR_OpLock* opLock = (LIR_OpLock*)op;
1051 } 1071 }
1052 1072
1053 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 1073 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
1054 masm->emit_arraycopy(this); 1074 masm->emit_arraycopy(this);
1055 masm->emit_code_stub(stub()); 1075 masm->emit_code_stub(stub());
1076 }
1077
1078 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
1079 masm->emit_updatecrc32(this);
1056 } 1080 }
1057 1081
1058 void LIR_Op0::emit_code(LIR_Assembler* masm) { 1082 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1059 masm->emit_op0(this); 1083 masm->emit_op0(this);
1060 } 1084 }
1760 case lir_icvirtual_call: s = "icvirtual"; break; 1784 case lir_icvirtual_call: s = "icvirtual"; break;
1761 case lir_virtual_call: s = "virtual"; break; 1785 case lir_virtual_call: s = "virtual"; break;
1762 case lir_dynamic_call: s = "dynamic"; break; 1786 case lir_dynamic_call: s = "dynamic"; break;
1763 // LIR_OpArrayCopy 1787 // LIR_OpArrayCopy
1764 case lir_arraycopy: s = "arraycopy"; break; 1788 case lir_arraycopy: s = "arraycopy"; break;
1789 // LIR_OpUpdateCRC32
1790 case lir_updatecrc32: s = "updatecrc32"; break;
1765 // LIR_OpLock 1791 // LIR_OpLock
1766 case lir_lock: s = "lock"; break; 1792 case lir_lock: s = "lock"; break;
1767 case lir_unlock: s = "unlock"; break; 1793 case lir_unlock: s = "unlock"; break;
1768 // LIR_OpDelay 1794 // LIR_OpDelay
1769 case lir_delay_slot: s = "delay"; break; 1795 case lir_delay_slot: s = "delay"; break;
1812 dst_pos()->print(out); out->print(" "); 1838 dst_pos()->print(out); out->print(" ");
1813 length()->print(out); out->print(" "); 1839 length()->print(out); out->print(" ");
1814 tmp()->print(out); out->print(" "); 1840 tmp()->print(out); out->print(" ");
1815 } 1841 }
1816 1842
1843 // LIR_OpUpdateCRC32
1844 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1845 crc()->print(out); out->print(" ");
1846 val()->print(out); out->print(" ");
1847 result_opr()->print(out); out->print(" ");
1848 }
1849
1817 // LIR_OpCompareAndSwap 1850 // LIR_OpCompareAndSwap
1818 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1851 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1819 addr()->print(out); out->print(" "); 1852 addr()->print(out); out->print(" ");
1820 cmp_value()->print(out); out->print(" "); 1853 cmp_value()->print(out); out->print(" ");
1821 new_value()->print(out); out->print(" "); 1854 new_value()->print(out); out->print(" ");