Mercurial > hg > graal-compiler
comparison src/share/vm/opto/superword.cpp @ 6823:859c45fb8cea
7201026: add vector for shift count
Summary: Add generation of vectors for scalar shift count.
Reviewed-by: roland, twisti, dlong
author | kvn |
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date | Tue, 02 Oct 2012 12:25:13 -0700 |
parents | e626685e9f6c |
children | f6badecb7ea7 |
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6822:f6b0eb4e44cf | 6823:859c45fb8cea |
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1434 if (opd->is_Vector() || opd->is_LoadVector()) { | 1434 if (opd->is_Vector() || opd->is_LoadVector()) { |
1435 assert(((opd_idx != 2) || !VectorNode::is_shift(p0)), "shift's count can't be vector"); | 1435 assert(((opd_idx != 2) || !VectorNode::is_shift(p0)), "shift's count can't be vector"); |
1436 return opd; // input is matching vector | 1436 return opd; // input is matching vector |
1437 } | 1437 } |
1438 if ((opd_idx == 2) && VectorNode::is_shift(p0)) { | 1438 if ((opd_idx == 2) && VectorNode::is_shift(p0)) { |
1439 // No vector is needed for shift count. | |
1440 // Vector instructions do not mask shift count, do it here. | |
1441 Compile* C = _phase->C; | 1439 Compile* C = _phase->C; |
1442 Node* cnt = opd; | 1440 Node* cnt = opd; |
1441 // Vector instructions do not mask shift count, do it here. | |
1443 juint mask = (p0->bottom_type() == TypeInt::INT) ? (BitsPerInt - 1) : (BitsPerLong - 1); | 1442 juint mask = (p0->bottom_type() == TypeInt::INT) ? (BitsPerInt - 1) : (BitsPerLong - 1); |
1444 const TypeInt* t = opd->find_int_type(); | 1443 const TypeInt* t = opd->find_int_type(); |
1445 if (t != NULL && t->is_con()) { | 1444 if (t != NULL && t->is_con()) { |
1446 juint shift = t->get_con(); | 1445 juint shift = t->get_con(); |
1447 if (shift > mask) { // Unsigned cmp | 1446 if (shift > mask) { // Unsigned cmp |
1454 cnt = new (C) AndINode(opd, cnt); | 1453 cnt = new (C) AndINode(opd, cnt); |
1455 _igvn.register_new_node_with_optimizer(cnt); | 1454 _igvn.register_new_node_with_optimizer(cnt); |
1456 _phase->set_ctrl(cnt, _phase->get_ctrl(opd)); | 1455 _phase->set_ctrl(cnt, _phase->get_ctrl(opd)); |
1457 } | 1456 } |
1458 assert(opd->bottom_type()->isa_int(), "int type only"); | 1457 assert(opd->bottom_type()->isa_int(), "int type only"); |
1459 // Move non constant shift count into XMM register. | 1458 // Move non constant shift count into vector register. |
1460 cnt = new (C) MoveI2FNode(cnt); | 1459 cnt = VectorNode::shift_count(C, p0, cnt, vlen, velt_basic_type(p0)); |
1461 } | 1460 } |
1462 if (cnt != opd) { | 1461 if (cnt != opd) { |
1463 _igvn.register_new_node_with_optimizer(cnt); | 1462 _igvn.register_new_node_with_optimizer(cnt); |
1464 _phase->set_ctrl(cnt, _phase->get_ctrl(opd)); | 1463 _phase->set_ctrl(cnt, _phase->get_ctrl(opd)); |
1465 } | 1464 } |