Mercurial > hg > graal-compiler
comparison src/share/vm/c1/c1_LIRGenerator.cpp @ 1572:87fc6aca31ab
6955349: C1: Make G1 barriers work with x64
Summary: This fixes G1 barriers in c1 on x64.
Reviewed-by: never
author | iveresov |
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date | Thu, 27 May 2010 22:01:55 -0700 |
parents | 61b2245abf36 |
children | e9ff18c4ace7 |
comparison
equal
deleted
inserted
replaced
1571:2d127394260e | 1572:87fc6aca31ab |
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1307 LIR_Opr pre_val = new_register(T_OBJECT); | 1307 LIR_Opr pre_val = new_register(T_OBJECT); |
1308 | 1308 |
1309 __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0)); | 1309 __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0)); |
1310 if (!addr_opr->is_address()) { | 1310 if (!addr_opr->is_address()) { |
1311 assert(addr_opr->is_register(), "must be"); | 1311 assert(addr_opr->is_register(), "must be"); |
1312 addr_opr = LIR_OprFact::address(new LIR_Address(addr_opr, 0, T_OBJECT)); | 1312 addr_opr = LIR_OprFact::address(new LIR_Address(addr_opr, T_OBJECT)); |
1313 } | 1313 } |
1314 CodeStub* slow = new G1PreBarrierStub(addr_opr, pre_val, pre_val_patch_code, | 1314 CodeStub* slow = new G1PreBarrierStub(addr_opr, pre_val, pre_val_patch_code, |
1315 info); | 1315 info); |
1316 __ branch(lir_cond_notEqual, T_INT, slow); | 1316 __ branch(lir_cond_notEqual, T_INT, slow); |
1317 __ branch_destination(slow->continuation()); | 1317 __ branch_destination(slow->continuation()); |
1323 // If the "new_val" is a constant NULL, no barrier is necessary. | 1323 // If the "new_val" is a constant NULL, no barrier is necessary. |
1324 if (new_val->is_constant() && | 1324 if (new_val->is_constant() && |
1325 new_val->as_constant_ptr()->as_jobject() == NULL) return; | 1325 new_val->as_constant_ptr()->as_jobject() == NULL) return; |
1326 | 1326 |
1327 if (!new_val->is_register()) { | 1327 if (!new_val->is_register()) { |
1328 LIR_Opr new_val_reg = new_pointer_register(); | 1328 LIR_Opr new_val_reg = new_register(T_OBJECT); |
1329 if (new_val->is_constant()) { | 1329 if (new_val->is_constant()) { |
1330 __ move(new_val, new_val_reg); | 1330 __ move(new_val, new_val_reg); |
1331 } else { | 1331 } else { |
1332 __ leal(new_val, new_val_reg); | 1332 __ leal(new_val, new_val_reg); |
1333 } | 1333 } |
1335 } | 1335 } |
1336 assert(new_val->is_register(), "must be a register at this point"); | 1336 assert(new_val->is_register(), "must be a register at this point"); |
1337 | 1337 |
1338 if (addr->is_address()) { | 1338 if (addr->is_address()) { |
1339 LIR_Address* address = addr->as_address_ptr(); | 1339 LIR_Address* address = addr->as_address_ptr(); |
1340 LIR_Opr ptr = new_pointer_register(); | 1340 LIR_Opr ptr = new_register(T_OBJECT); |
1341 if (!address->index()->is_valid() && address->disp() == 0) { | 1341 if (!address->index()->is_valid() && address->disp() == 0) { |
1342 __ move(address->base(), ptr); | 1342 __ move(address->base(), ptr); |
1343 } else { | 1343 } else { |
1344 assert(address->disp() != max_jint, "lea doesn't support patched addresses!"); | 1344 assert(address->disp() != max_jint, "lea doesn't support patched addresses!"); |
1345 __ leal(addr, ptr); | 1345 __ leal(addr, ptr); |
1348 } | 1348 } |
1349 assert(addr->is_register(), "must be a register at this point"); | 1349 assert(addr->is_register(), "must be a register at this point"); |
1350 | 1350 |
1351 LIR_Opr xor_res = new_pointer_register(); | 1351 LIR_Opr xor_res = new_pointer_register(); |
1352 LIR_Opr xor_shift_res = new_pointer_register(); | 1352 LIR_Opr xor_shift_res = new_pointer_register(); |
1353 | |
1354 if (TwoOperandLIRForm ) { | 1353 if (TwoOperandLIRForm ) { |
1355 __ move(addr, xor_res); | 1354 __ move(addr, xor_res); |
1356 __ logical_xor(xor_res, new_val, xor_res); | 1355 __ logical_xor(xor_res, new_val, xor_res); |
1357 __ move(xor_res, xor_shift_res); | 1356 __ move(xor_res, xor_shift_res); |
1358 __ unsigned_shift_right(xor_shift_res, | 1357 __ unsigned_shift_right(xor_shift_res, |
1366 xor_shift_res, | 1365 xor_shift_res, |
1367 LIR_OprDesc::illegalOpr()); | 1366 LIR_OprDesc::illegalOpr()); |
1368 } | 1367 } |
1369 | 1368 |
1370 if (!new_val->is_register()) { | 1369 if (!new_val->is_register()) { |
1371 LIR_Opr new_val_reg = new_pointer_register(); | 1370 LIR_Opr new_val_reg = new_register(T_OBJECT); |
1372 __ leal(new_val, new_val_reg); | 1371 __ leal(new_val, new_val_reg); |
1373 new_val = new_val_reg; | 1372 new_val = new_val_reg; |
1374 } | 1373 } |
1375 assert(new_val->is_register(), "must be a register at this point"); | 1374 assert(new_val->is_register(), "must be a register at this point"); |
1376 | 1375 |
1377 __ cmp(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD)); | 1376 __ cmp(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD)); |
1378 | 1377 |
1379 CodeStub* slow = new G1PostBarrierStub(addr, new_val); | 1378 CodeStub* slow = new G1PostBarrierStub(addr, new_val); |
1380 __ branch(lir_cond_notEqual, T_INT, slow); | 1379 __ branch(lir_cond_notEqual, LP64_ONLY(T_LONG) NOT_LP64(T_INT), slow); |
1381 __ branch_destination(slow->continuation()); | 1380 __ branch_destination(slow->continuation()); |
1382 } | 1381 } |
1383 | 1382 |
1384 #endif // SERIALGC | 1383 #endif // SERIALGC |
1385 //////////////////////////////////////////////////////////////////////// | 1384 //////////////////////////////////////////////////////////////////////// |