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6940726: Use BIS instruction for allocation prefetch on Sparc Summary: Use BIS instruction for allocation prefetch on Sparc Reviewed-by: twisti
author kvn
date Wed, 07 Apr 2010 12:39:27 -0700
parents 2883969d09e7
children d7f654633cfe
comparison
equal deleted inserted replaced
1366:b9d85fcdf743 1367:9e321dcfa5b7
468 468
469 %} 469 %}
470 470
471 source %{ 471 source %{
472 #define __ _masm. 472 #define __ _masm.
473
474 // Block initializing store
475 #define ASI_BLK_INIT_QUAD_LDD_P 0xE2
473 476
474 // tertiary op of a LoadP or StoreP encoding 477 // tertiary op of a LoadP or StoreP encoding
475 #define REGP_OP true 478 #define REGP_OP true
476 479
477 static FloatRegister reg_to_SingleFloatRegister_object(int register_encoding); 480 static FloatRegister reg_to_SingleFloatRegister_object(int register_encoding);
6145 ins_encode( form3_mem_prefetch_read( mem ) ); 6148 ins_encode( form3_mem_prefetch_read( mem ) );
6146 ins_pipe(iload_mem); 6149 ins_pipe(iload_mem);
6147 %} 6150 %}
6148 6151
6149 instruct prefetchw( memory mem ) %{ 6152 instruct prefetchw( memory mem ) %{
6153 predicate(AllocatePrefetchStyle != 3 );
6150 match( PrefetchWrite mem ); 6154 match( PrefetchWrite mem );
6151 ins_cost(MEMORY_REF_COST); 6155 ins_cost(MEMORY_REF_COST);
6152 6156
6153 format %{ "PREFETCH $mem,2\t! Prefetch write-many (and read)" %} 6157 format %{ "PREFETCH $mem,2\t! Prefetch write-many (and read)" %}
6154 opcode(Assembler::prefetch_op3); 6158 opcode(Assembler::prefetch_op3);
6155 ins_encode( form3_mem_prefetch_write( mem ) ); 6159 ins_encode( form3_mem_prefetch_write( mem ) );
6156 ins_pipe(iload_mem); 6160 ins_pipe(iload_mem);
6157 %} 6161 %}
6158 6162
6163 // Use BIS instruction to prefetch.
6164 instruct prefetchw_bis( memory mem ) %{
6165 predicate(AllocatePrefetchStyle == 3);
6166 match( PrefetchWrite mem );
6167 ins_cost(MEMORY_REF_COST);
6168
6169 format %{ "STXA G0,$mem\t! // Block initializing store" %}
6170 ins_encode %{
6171 Register base = as_Register($mem$$base);
6172 int disp = $mem$$disp;
6173 if (disp != 0) {
6174 __ add(base, AllocatePrefetchStepSize, base);
6175 }
6176 __ stxa(G0, base, G0, ASI_BLK_INIT_QUAD_LDD_P);
6177 %}
6178 ins_pipe(istore_mem_reg);
6179 %}
6159 6180
6160 //----------Store Instructions------------------------------------------------- 6181 //----------Store Instructions-------------------------------------------------
6161 // Store Byte 6182 // Store Byte
6162 instruct storeB(memory mem, iRegI src) %{ 6183 instruct storeB(memory mem, iRegI src) %{
6163 match(Set mem (StoreB mem src)); 6184 match(Set mem (StoreB mem src));