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8029668: Kithcensink crashed with guarantee(Assembler::is_simm13(disp)) failed: Do not match large constant offsets Summary: Bailout if we try to reference a stack location that we can't encode Reviewed-by: kvn, twisti
author iveresov
date Thu, 12 Dec 2013 11:25:32 -0800
parents 208ebea980f8
children 00f5eff62d18 f970454708b8 a9becfeecd1b
comparison
equal deleted inserted replaced
13444:62084ffe573b 17453:9ecf408d4568
755 warning("Instruction has ideal_Opcode==Op_%s and op_ld==Op_%s \n", NodeClassNames[ideal_op], NodeClassNames[mem_op]); 755 warning("Instruction has ideal_Opcode==Op_%s and op_ld==Op_%s \n", NodeClassNames[ideal_op], NodeClassNames[mem_op]);
756 } 756 }
757 #endif 757 #endif
758 758
759 759
760 void emit_form3_mem_reg(CodeBuffer &cbuf, const MachNode* n, int primary, int tertiary, 760 void emit_form3_mem_reg(CodeBuffer &cbuf, PhaseRegAlloc* ra, const MachNode* n, int primary, int tertiary,
761 int src1_enc, int disp32, int src2_enc, int dst_enc) { 761 int src1_enc, int disp32, int src2_enc, int dst_enc) {
762 762
763 #ifdef ASSERT 763 #ifdef ASSERT
764 // The following code implements the +VerifyOops feature. 764 // The following code implements the +VerifyOops feature.
765 // It verifies oop values which are loaded into or stored out of 765 // It verifies oop values which are loaded into or stored out of
910 | (src1_enc << 14); 910 | (src1_enc << 14);
911 911
912 uint index = src2_enc; 912 uint index = src2_enc;
913 int disp = disp32; 913 int disp = disp32;
914 914
915 if (src1_enc == R_SP_enc || src1_enc == R_FP_enc) 915 if (src1_enc == R_SP_enc || src1_enc == R_FP_enc) {
916 disp += STACK_BIAS; 916 disp += STACK_BIAS;
917 // Quick fix for JDK-8029668: check that stack offset fits, bailout if not
918 if (!Assembler::is_simm13(disp)) {
919 ra->C->record_method_not_compilable("unable to handle large constant offsets");
920 return;
921 }
922 }
917 923
918 // We should have a compiler bailout here rather than a guarantee. 924 // We should have a compiler bailout here rather than a guarantee.
919 // Better yet would be some mechanism to handle variable-size matches correctly. 925 // Better yet would be some mechanism to handle variable-size matches correctly.
920 guarantee(Assembler::is_simm13(disp), "Do not match large constant offsets" ); 926 guarantee(Assembler::is_simm13(disp), "Do not match large constant offsets" );
921 927
1277 if (r->is_Register()) return rc_int; 1283 if (r->is_Register()) return rc_int;
1278 assert(r->is_FloatRegister(), "must be"); 1284 assert(r->is_FloatRegister(), "must be");
1279 return rc_float; 1285 return rc_float;
1280 } 1286 }
1281 1287
1282 static int impl_helper( const MachNode *mach, CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, bool is_load, int offset, int reg, int opcode, const char *op_str, int size, outputStream* st ) { 1288 static int impl_helper(const MachNode* mach, CodeBuffer* cbuf, PhaseRegAlloc* ra, bool do_size, bool is_load, int offset, int reg, int opcode, const char *op_str, int size, outputStream* st ) {
1283 if( cbuf ) { 1289 if (cbuf) {
1284 // Better yet would be some mechanism to handle variable-size matches correctly 1290 emit_form3_mem_reg(*cbuf, ra, mach, opcode, -1, R_SP_enc, offset, 0, Matcher::_regEncode[reg]);
1285 if (!Assembler::is_simm13(offset + STACK_BIAS)) {
1286 ra_->C->record_method_not_compilable("unable to handle large constant offsets");
1287 } else {
1288 emit_form3_mem_reg(*cbuf, mach, opcode, -1, R_SP_enc, offset, 0, Matcher::_regEncode[reg]);
1289 }
1290 } 1291 }
1291 #ifndef PRODUCT 1292 #ifndef PRODUCT
1292 else if( !do_size ) { 1293 else if (!do_size) {
1293 if( size != 0 ) st->print("\n\t"); 1294 if (size != 0) st->print("\n\t");
1294 if( is_load ) st->print("%s [R_SP + #%d],R_%s\t! spill",op_str,offset,OptoReg::regname(reg)); 1295 if (is_load) st->print("%s [R_SP + #%d],R_%s\t! spill",op_str,offset,OptoReg::regname(reg));
1295 else st->print("%s R_%s,[R_SP + #%d]\t! spill",op_str,OptoReg::regname(reg),offset); 1296 else st->print("%s R_%s,[R_SP + #%d]\t! spill",op_str,OptoReg::regname(reg),offset);
1296 } 1297 }
1297 #endif 1298 #endif
1298 return size+4; 1299 return size+4;
1299 } 1300 }
1300 1301
2085 __ untested("encoding"); 2086 __ untested("encoding");
2086 #endif 2087 #endif
2087 %} 2088 %}
2088 2089
2089 enc_class form3_mem_reg( memory mem, iRegI dst ) %{ 2090 enc_class form3_mem_reg( memory mem, iRegI dst ) %{
2090 emit_form3_mem_reg(cbuf, this, $primary, $tertiary, 2091 emit_form3_mem_reg(cbuf, ra_, this, $primary, $tertiary,
2091 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg); 2092 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg);
2092 %} 2093 %}
2093 2094
2094 enc_class simple_form3_mem_reg( memory mem, iRegI dst ) %{ 2095 enc_class simple_form3_mem_reg( memory mem, iRegI dst ) %{
2095 emit_form3_mem_reg(cbuf, this, $primary, -1, 2096 emit_form3_mem_reg(cbuf, ra_, this, $primary, -1,
2096 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg); 2097 $mem$$base, $mem$$disp, $mem$$index, $dst$$reg);
2097 %} 2098 %}
2098 2099
2099 enc_class form3_mem_prefetch_read( memory mem ) %{ 2100 enc_class form3_mem_prefetch_read( memory mem ) %{
2100 emit_form3_mem_reg(cbuf, this, $primary, -1, 2101 emit_form3_mem_reg(cbuf, ra_, this, $primary, -1,
2101 $mem$$base, $mem$$disp, $mem$$index, 0/*prefetch function many-reads*/); 2102 $mem$$base, $mem$$disp, $mem$$index, 0/*prefetch function many-reads*/);
2102 %} 2103 %}
2103 2104
2104 enc_class form3_mem_prefetch_write( memory mem ) %{ 2105 enc_class form3_mem_prefetch_write( memory mem ) %{
2105 emit_form3_mem_reg(cbuf, this, $primary, -1, 2106 emit_form3_mem_reg(cbuf, ra_, this, $primary, -1,
2106 $mem$$base, $mem$$disp, $mem$$index, 2/*prefetch function many-writes*/); 2107 $mem$$base, $mem$$disp, $mem$$index, 2/*prefetch function many-writes*/);
2107 %} 2108 %}
2108 2109
2109 enc_class form3_mem_reg_long_unaligned_marshal( memory mem, iRegL reg ) %{ 2110 enc_class form3_mem_reg_long_unaligned_marshal( memory mem, iRegL reg ) %{
2110 assert(Assembler::is_simm13($mem$$disp ), "need disp and disp+4"); 2111 assert(Assembler::is_simm13($mem$$disp ), "need disp and disp+4");
2111 assert(Assembler::is_simm13($mem$$disp+4), "need disp and disp+4"); 2112 assert(Assembler::is_simm13($mem$$disp+4), "need disp and disp+4");
2112 guarantee($mem$$index == R_G0_enc, "double index?"); 2113 guarantee($mem$$index == R_G0_enc, "double index?");
2113 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp+4, R_G0_enc, R_O7_enc ); 2114 emit_form3_mem_reg(cbuf, ra_, this, $primary, -1, $mem$$base, $mem$$disp+4, R_G0_enc, R_O7_enc );
2114 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp, R_G0_enc, $reg$$reg ); 2115 emit_form3_mem_reg(cbuf, ra_, this, $primary, -1, $mem$$base, $mem$$disp, R_G0_enc, $reg$$reg );
2115 emit3_simm13( cbuf, Assembler::arith_op, $reg$$reg, Assembler::sllx_op3, $reg$$reg, 0x1020 ); 2116 emit3_simm13( cbuf, Assembler::arith_op, $reg$$reg, Assembler::sllx_op3, $reg$$reg, 0x1020 );
2116 emit3( cbuf, Assembler::arith_op, $reg$$reg, Assembler::or_op3, $reg$$reg, 0, R_O7_enc ); 2117 emit3( cbuf, Assembler::arith_op, $reg$$reg, Assembler::or_op3, $reg$$reg, 0, R_O7_enc );
2117 %} 2118 %}
2118 2119
2119 enc_class form3_mem_reg_double_unaligned( memory mem, RegD_low reg ) %{ 2120 enc_class form3_mem_reg_double_unaligned( memory mem, RegD_low reg ) %{
2120 assert(Assembler::is_simm13($mem$$disp ), "need disp and disp+4"); 2121 assert(Assembler::is_simm13($mem$$disp ), "need disp and disp+4");
2121 assert(Assembler::is_simm13($mem$$disp+4), "need disp and disp+4"); 2122 assert(Assembler::is_simm13($mem$$disp+4), "need disp and disp+4");
2122 guarantee($mem$$index == R_G0_enc, "double index?"); 2123 guarantee($mem$$index == R_G0_enc, "double index?");
2123 // Load long with 2 instructions 2124 // Load long with 2 instructions
2124 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp, R_G0_enc, $reg$$reg+0 ); 2125 emit_form3_mem_reg(cbuf, ra_, this, $primary, -1, $mem$$base, $mem$$disp, R_G0_enc, $reg$$reg+0 );
2125 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp+4, R_G0_enc, $reg$$reg+1 ); 2126 emit_form3_mem_reg(cbuf, ra_, this, $primary, -1, $mem$$base, $mem$$disp+4, R_G0_enc, $reg$$reg+1 );
2126 %} 2127 %}
2127 2128
2128 //%%% form3_mem_plus_4_reg is a hack--get rid of it 2129 //%%% form3_mem_plus_4_reg is a hack--get rid of it
2129 enc_class form3_mem_plus_4_reg( memory mem, iRegI dst ) %{ 2130 enc_class form3_mem_plus_4_reg( memory mem, iRegI dst ) %{
2130 guarantee($mem$$disp, "cannot offset a reg-reg operand by 4"); 2131 guarantee($mem$$disp, "cannot offset a reg-reg operand by 4");
2131 emit_form3_mem_reg(cbuf, this, $primary, -1, $mem$$base, $mem$$disp + 4, $mem$$index, $dst$$reg); 2132 emit_form3_mem_reg(cbuf, ra_, this, $primary, -1, $mem$$base, $mem$$disp + 4, $mem$$index, $dst$$reg);
2132 %} 2133 %}
2133 2134
2134 enc_class form3_g0_rs2_rd_move( iRegI rs2, iRegI rd ) %{ 2135 enc_class form3_g0_rs2_rd_move( iRegI rs2, iRegI rd ) %{
2135 // Encode a reg-reg copy. If it is useless, then empty encoding. 2136 // Encode a reg-reg copy. If it is useless, then empty encoding.
2136 if( $rs2$$reg != $rd$$reg ) 2137 if( $rs2$$reg != $rd$$reg )