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comparison src/cpu/x86/vm/vm_version_x86.cpp @ 6894:a3ecd773a7b9

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7184394: add intrinsics to use AES instructions Summary: Use new x86 AES instructions for AESCrypt. Reviewed-by: twisti, kvn, roland Contributed-by: tom.deneau@amd.com
author kvn
date Wed, 24 Oct 2012 14:33:22 -0700
parents 7eca5de9e0b6
children dbeaeee28bc2
comparison
equal deleted inserted replaced
6893:b2c669fd8114 6894:a3ecd773a7b9
417 _cpuFeatures &= ~CPU_AVX2; 417 _cpuFeatures &= ~CPU_AVX2;
418 418
419 if (UseAVX < 1) 419 if (UseAVX < 1)
420 _cpuFeatures &= ~CPU_AVX; 420 _cpuFeatures &= ~CPU_AVX;
421 421
422 if (!UseAES && !FLAG_IS_DEFAULT(UseAES))
423 _cpuFeatures &= ~CPU_AES;
424
422 if (logical_processors_per_package() == 1) { 425 if (logical_processors_per_package() == 1) {
423 // HT processor could be installed on a system which doesn't support HT. 426 // HT processor could be installed on a system which doesn't support HT.
424 _cpuFeatures &= ~CPU_HT; 427 _cpuFeatures &= ~CPU_HT;
425 } 428 }
426 429
427 char buf[256]; 430 char buf[256];
428 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 431 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
429 cores_per_cpu(), threads_per_core(), 432 cores_per_cpu(), threads_per_core(),
430 cpu_family(), _model, _stepping, 433 cpu_family(), _model, _stepping,
431 (supports_cmov() ? ", cmov" : ""), 434 (supports_cmov() ? ", cmov" : ""),
432 (supports_cmpxchg8() ? ", cx8" : ""), 435 (supports_cmpxchg8() ? ", cx8" : ""),
433 (supports_fxsr() ? ", fxsr" : ""), 436 (supports_fxsr() ? ", fxsr" : ""),
439 (supports_sse4_1() ? ", sse4.1" : ""), 442 (supports_sse4_1() ? ", sse4.1" : ""),
440 (supports_sse4_2() ? ", sse4.2" : ""), 443 (supports_sse4_2() ? ", sse4.2" : ""),
441 (supports_popcnt() ? ", popcnt" : ""), 444 (supports_popcnt() ? ", popcnt" : ""),
442 (supports_avx() ? ", avx" : ""), 445 (supports_avx() ? ", avx" : ""),
443 (supports_avx2() ? ", avx2" : ""), 446 (supports_avx2() ? ", avx2" : ""),
447 (supports_aes() ? ", aes" : ""),
444 (supports_mmx_ext() ? ", mmxext" : ""), 448 (supports_mmx_ext() ? ", mmxext" : ""),
445 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""), 449 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
446 (supports_lzcnt() ? ", lzcnt": ""), 450 (supports_lzcnt() ? ", lzcnt": ""),
447 (supports_sse4a() ? ", sse4a": ""), 451 (supports_sse4a() ? ", sse4a": ""),
448 (supports_ht() ? ", ht": ""), 452 (supports_ht() ? ", ht": ""),
470 if (!supports_avx2()) // Drop to 1 if no AVX2 support 474 if (!supports_avx2()) // Drop to 1 if no AVX2 support
471 UseAVX = MIN2((intx)1,UseAVX); 475 UseAVX = MIN2((intx)1,UseAVX);
472 if (!supports_avx ()) // Drop to 0 if no AVX support 476 if (!supports_avx ()) // Drop to 0 if no AVX support
473 UseAVX = 0; 477 UseAVX = 0;
474 478
479 // Use AES instructions if available.
480 if (supports_aes()) {
481 if (FLAG_IS_DEFAULT(UseAES)) {
482 UseAES = true;
483 }
484 } else if (UseAES) {
485 if (!FLAG_IS_DEFAULT(UseAES))
486 warning("AES instructions not available on this CPU");
487 FLAG_SET_DEFAULT(UseAES, false);
488 }
489
490 // The AES intrinsic stubs require AES instruction support (of course)
491 // but also require AVX mode for misaligned SSE access
492 if (UseAES && (UseAVX > 0)) {
493 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
494 UseAESIntrinsics = true;
495 }
496 } else if (UseAESIntrinsics) {
497 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
498 warning("AES intrinsics not available on this CPU");
499 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
500 }
501
475 #ifdef COMPILER2 502 #ifdef COMPILER2
476 if (UseFPUForSpilling) { 503 if (UseFPUForSpilling) {
477 if (UseSSE < 2) { 504 if (UseSSE < 2) {
478 // Only supported with SSE2+ 505 // Only supported with SSE2+
479 FLAG_SET_DEFAULT(UseFPUForSpilling, false); 506 FLAG_SET_DEFAULT(UseFPUForSpilling, false);
711 tty->print_cr("Logical CPUs per core: %u", 738 tty->print_cr("Logical CPUs per core: %u",
712 logical_processors_per_package()); 739 logical_processors_per_package());
713 tty->print("UseSSE=%d",UseSSE); 740 tty->print("UseSSE=%d",UseSSE);
714 if (UseAVX > 0) { 741 if (UseAVX > 0) {
715 tty->print(" UseAVX=%d",UseAVX); 742 tty->print(" UseAVX=%d",UseAVX);
743 }
744 if (UseAES) {
745 tty->print(" UseAES=1");
716 } 746 }
717 tty->cr(); 747 tty->cr();
718 tty->print("Allocation"); 748 tty->print("Allocation");
719 if (AllocatePrefetchStyle <= 0 || UseSSE == 0 && !supports_3dnow_prefetch()) { 749 if (AllocatePrefetchStyle <= 0 || UseSSE == 0 && !supports_3dnow_prefetch()) {
720 tty->print_cr(": no prefetching"); 750 tty->print_cr(": no prefetching");