Mercurial > hg > graal-compiler
comparison src/cpu/x86/vm/assembler_x86_64.inline.hpp @ 0:a61af66fc99e jdk7-b24
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author | duke |
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date | Sat, 01 Dec 2007 00:00:00 +0000 |
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-1:000000000000 | 0:a61af66fc99e |
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1 /* | |
2 * Copyright 2003-2005 Sun Microsystems, Inc. All Rights Reserved. | |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
21 * have any questions. | |
22 * | |
23 */ | |
24 | |
25 inline void Assembler::emit_long64(jlong x) { | |
26 *(jlong*) _code_pos = x; | |
27 _code_pos += sizeof(jlong); | |
28 code_section()->set_end(_code_pos); | |
29 } | |
30 | |
31 inline void MacroAssembler::pd_patch_instruction(address branch, address target) { | |
32 unsigned char op = branch[0]; | |
33 assert(op == 0xE8 /* call */ || | |
34 op == 0xE9 /* jmp */ || | |
35 op == 0xEB /* short jmp */ || | |
36 (op & 0xF0) == 0x70 /* short jcc */ || | |
37 op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */, | |
38 "Invalid opcode at patch point"); | |
39 | |
40 if (op == 0xEB || (op & 0xF0) == 0x70) { | |
41 // short offset operators (jmp and jcc) | |
42 char* disp = (char*) &branch[1]; | |
43 int imm8 = target - (address) &disp[1]; | |
44 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset"); | |
45 *disp = imm8; | |
46 } else { | |
47 int* disp = (int*) &branch[(op == 0x0F)? 2: 1]; | |
48 int imm32 = target - (address) &disp[1]; | |
49 *disp = imm32; | |
50 } | |
51 } | |
52 | |
53 #ifndef PRODUCT | |
54 inline void MacroAssembler::pd_print_patched_instruction(address branch) { | |
55 const char* s; | |
56 unsigned char op = branch[0]; | |
57 if (op == 0xE8) { | |
58 s = "call"; | |
59 } else if (op == 0xE9 || op == 0xEB) { | |
60 s = "jmp"; | |
61 } else if ((op & 0xF0) == 0x70) { | |
62 s = "jcc"; | |
63 } else if (op == 0x0F) { | |
64 s = "jcc"; | |
65 } else { | |
66 s = "????"; | |
67 } | |
68 tty->print("%s (unresolved)", s); | |
69 } | |
70 #endif // ndef PRODUCT | |
71 | |
72 inline void MacroAssembler::movptr(Address dst, intptr_t src) { | |
73 #ifdef _LP64 | |
74 Assembler::mov64(dst, src); | |
75 #else | |
76 Assembler::movl(dst, src); | |
77 #endif // _LP64 | |
78 } | |
79 | |
80 inline void MacroAssembler::movptr(Register dst, intptr_t src) { | |
81 #ifdef _LP64 | |
82 Assembler::mov64(dst, src); | |
83 #else | |
84 Assembler::movl(dst, src); | |
85 #endif // _LP64 | |
86 } |