Mercurial > hg > graal-compiler
comparison src/share/vm/opto/matcher.cpp @ 0:a61af66fc99e jdk7-b24
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author | duke |
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date | Sat, 01 Dec 2007 00:00:00 +0000 |
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children | eac007780a58 |
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1 /* | |
2 * Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved. | |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
21 * have any questions. | |
22 * | |
23 */ | |
24 | |
25 #include "incls/_precompiled.incl" | |
26 #include "incls/_matcher.cpp.incl" | |
27 | |
28 OptoReg::Name OptoReg::c_frame_pointer; | |
29 | |
30 | |
31 | |
32 const int Matcher::base2reg[Type::lastype] = { | |
33 Node::NotAMachineReg,0,0, Op_RegI, Op_RegL, 0, | |
34 Node::NotAMachineReg, Node::NotAMachineReg, /* tuple, array */ | |
35 Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, /* the pointers */ | |
36 0, 0/*abio*/, | |
37 Op_RegP /* Return address */, 0, /* the memories */ | |
38 Op_RegF, Op_RegF, Op_RegF, Op_RegD, Op_RegD, Op_RegD, | |
39 0 /*bottom*/ | |
40 }; | |
41 | |
42 const RegMask *Matcher::idealreg2regmask[_last_machine_leaf]; | |
43 RegMask Matcher::mreg2regmask[_last_Mach_Reg]; | |
44 RegMask Matcher::STACK_ONLY_mask; | |
45 RegMask Matcher::c_frame_ptr_mask; | |
46 const uint Matcher::_begin_rematerialize = _BEGIN_REMATERIALIZE; | |
47 const uint Matcher::_end_rematerialize = _END_REMATERIALIZE; | |
48 | |
49 //---------------------------Matcher------------------------------------------- | |
50 Matcher::Matcher( Node_List &proj_list ) : | |
51 PhaseTransform( Phase::Ins_Select ), | |
52 #ifdef ASSERT | |
53 _old2new_map(C->comp_arena()), | |
54 #endif | |
55 _shared_constants(C->comp_arena()), | |
56 _reduceOp(reduceOp), _leftOp(leftOp), _rightOp(rightOp), | |
57 _swallowed(swallowed), | |
58 _begin_inst_chain_rule(_BEGIN_INST_CHAIN_RULE), | |
59 _end_inst_chain_rule(_END_INST_CHAIN_RULE), | |
60 _must_clone(must_clone), _proj_list(proj_list), | |
61 _register_save_policy(register_save_policy), | |
62 _c_reg_save_policy(c_reg_save_policy), | |
63 _register_save_type(register_save_type), | |
64 _ruleName(ruleName), | |
65 _allocation_started(false), | |
66 _states_arena(Chunk::medium_size), | |
67 _visited(&_states_arena), | |
68 _shared(&_states_arena), | |
69 _dontcare(&_states_arena) { | |
70 C->set_matcher(this); | |
71 | |
72 idealreg2spillmask[Op_RegI] = NULL; | |
73 idealreg2spillmask[Op_RegL] = NULL; | |
74 idealreg2spillmask[Op_RegF] = NULL; | |
75 idealreg2spillmask[Op_RegD] = NULL; | |
76 idealreg2spillmask[Op_RegP] = NULL; | |
77 | |
78 idealreg2debugmask[Op_RegI] = NULL; | |
79 idealreg2debugmask[Op_RegL] = NULL; | |
80 idealreg2debugmask[Op_RegF] = NULL; | |
81 idealreg2debugmask[Op_RegD] = NULL; | |
82 idealreg2debugmask[Op_RegP] = NULL; | |
83 } | |
84 | |
85 //------------------------------warp_incoming_stk_arg------------------------ | |
86 // This warps a VMReg into an OptoReg::Name | |
87 OptoReg::Name Matcher::warp_incoming_stk_arg( VMReg reg ) { | |
88 OptoReg::Name warped; | |
89 if( reg->is_stack() ) { // Stack slot argument? | |
90 warped = OptoReg::add(_old_SP, reg->reg2stack() ); | |
91 warped = OptoReg::add(warped, C->out_preserve_stack_slots()); | |
92 if( warped >= _in_arg_limit ) | |
93 _in_arg_limit = OptoReg::add(warped, 1); // Bump max stack slot seen | |
94 if (!RegMask::can_represent(warped)) { | |
95 // the compiler cannot represent this method's calling sequence | |
96 C->record_method_not_compilable_all_tiers("unsupported incoming calling sequence"); | |
97 return OptoReg::Bad; | |
98 } | |
99 return warped; | |
100 } | |
101 return OptoReg::as_OptoReg(reg); | |
102 } | |
103 | |
104 //---------------------------compute_old_SP------------------------------------ | |
105 OptoReg::Name Compile::compute_old_SP() { | |
106 int fixed = fixed_slots(); | |
107 int preserve = in_preserve_stack_slots(); | |
108 return OptoReg::stack2reg(round_to(fixed + preserve, Matcher::stack_alignment_in_slots())); | |
109 } | |
110 | |
111 | |
112 | |
113 #ifdef ASSERT | |
114 void Matcher::verify_new_nodes_only(Node* xroot) { | |
115 // Make sure that the new graph only references new nodes | |
116 ResourceMark rm; | |
117 Unique_Node_List worklist; | |
118 VectorSet visited(Thread::current()->resource_area()); | |
119 worklist.push(xroot); | |
120 while (worklist.size() > 0) { | |
121 Node* n = worklist.pop(); | |
122 visited <<= n->_idx; | |
123 assert(C->node_arena()->contains(n), "dead node"); | |
124 for (uint j = 0; j < n->req(); j++) { | |
125 Node* in = n->in(j); | |
126 if (in != NULL) { | |
127 assert(C->node_arena()->contains(in), "dead node"); | |
128 if (!visited.test(in->_idx)) { | |
129 worklist.push(in); | |
130 } | |
131 } | |
132 } | |
133 } | |
134 } | |
135 #endif | |
136 | |
137 | |
138 //---------------------------match--------------------------------------------- | |
139 void Matcher::match( ) { | |
140 // One-time initialization of some register masks. | |
141 init_spill_mask( C->root()->in(1) ); | |
142 _return_addr_mask = return_addr(); | |
143 #ifdef _LP64 | |
144 // Pointers take 2 slots in 64-bit land | |
145 _return_addr_mask.Insert(OptoReg::add(return_addr(),1)); | |
146 #endif | |
147 | |
148 // Map a Java-signature return type into return register-value | |
149 // machine registers for 0, 1 and 2 returned values. | |
150 const TypeTuple *range = C->tf()->range(); | |
151 if( range->cnt() > TypeFunc::Parms ) { // If not a void function | |
152 // Get ideal-register return type | |
153 int ireg = base2reg[range->field_at(TypeFunc::Parms)->base()]; | |
154 // Get machine return register | |
155 uint sop = C->start()->Opcode(); | |
156 OptoRegPair regs = return_value(ireg, false); | |
157 | |
158 // And mask for same | |
159 _return_value_mask = RegMask(regs.first()); | |
160 if( OptoReg::is_valid(regs.second()) ) | |
161 _return_value_mask.Insert(regs.second()); | |
162 } | |
163 | |
164 // --------------- | |
165 // Frame Layout | |
166 | |
167 // Need the method signature to determine the incoming argument types, | |
168 // because the types determine which registers the incoming arguments are | |
169 // in, and this affects the matched code. | |
170 const TypeTuple *domain = C->tf()->domain(); | |
171 uint argcnt = domain->cnt() - TypeFunc::Parms; | |
172 BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); | |
173 VMRegPair *vm_parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); | |
174 _parm_regs = NEW_RESOURCE_ARRAY( OptoRegPair, argcnt ); | |
175 _calling_convention_mask = NEW_RESOURCE_ARRAY( RegMask, argcnt ); | |
176 uint i; | |
177 for( i = 0; i<argcnt; i++ ) { | |
178 sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); | |
179 } | |
180 | |
181 // Pass array of ideal registers and length to USER code (from the AD file) | |
182 // that will convert this to an array of register numbers. | |
183 const StartNode *start = C->start(); | |
184 start->calling_convention( sig_bt, vm_parm_regs, argcnt ); | |
185 #ifdef ASSERT | |
186 // Sanity check users' calling convention. Real handy while trying to | |
187 // get the initial port correct. | |
188 { for (uint i = 0; i<argcnt; i++) { | |
189 if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { | |
190 assert(domain->field_at(i+TypeFunc::Parms)==Type::HALF, "only allowed on halve" ); | |
191 _parm_regs[i].set_bad(); | |
192 continue; | |
193 } | |
194 VMReg parm_reg = vm_parm_regs[i].first(); | |
195 assert(parm_reg->is_valid(), "invalid arg?"); | |
196 if (parm_reg->is_reg()) { | |
197 OptoReg::Name opto_parm_reg = OptoReg::as_OptoReg(parm_reg); | |
198 assert(can_be_java_arg(opto_parm_reg) || | |
199 C->stub_function() == CAST_FROM_FN_PTR(address, OptoRuntime::rethrow_C) || | |
200 opto_parm_reg == inline_cache_reg(), | |
201 "parameters in register must be preserved by runtime stubs"); | |
202 } | |
203 for (uint j = 0; j < i; j++) { | |
204 assert(parm_reg != vm_parm_regs[j].first(), | |
205 "calling conv. must produce distinct regs"); | |
206 } | |
207 } | |
208 } | |
209 #endif | |
210 | |
211 // Do some initial frame layout. | |
212 | |
213 // Compute the old incoming SP (may be called FP) as | |
214 // OptoReg::stack0() + locks + in_preserve_stack_slots + pad2. | |
215 _old_SP = C->compute_old_SP(); | |
216 assert( is_even(_old_SP), "must be even" ); | |
217 | |
218 // Compute highest incoming stack argument as | |
219 // _old_SP + out_preserve_stack_slots + incoming argument size. | |
220 _in_arg_limit = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); | |
221 assert( is_even(_in_arg_limit), "out_preserve must be even" ); | |
222 for( i = 0; i < argcnt; i++ ) { | |
223 // Permit args to have no register | |
224 _calling_convention_mask[i].Clear(); | |
225 if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { | |
226 continue; | |
227 } | |
228 // calling_convention returns stack arguments as a count of | |
229 // slots beyond OptoReg::stack0()/VMRegImpl::stack0. We need to convert this to | |
230 // the allocators point of view, taking into account all the | |
231 // preserve area, locks & pad2. | |
232 | |
233 OptoReg::Name reg1 = warp_incoming_stk_arg(vm_parm_regs[i].first()); | |
234 if( OptoReg::is_valid(reg1)) | |
235 _calling_convention_mask[i].Insert(reg1); | |
236 | |
237 OptoReg::Name reg2 = warp_incoming_stk_arg(vm_parm_regs[i].second()); | |
238 if( OptoReg::is_valid(reg2)) | |
239 _calling_convention_mask[i].Insert(reg2); | |
240 | |
241 // Saved biased stack-slot register number | |
242 _parm_regs[i].set_pair(reg2, reg1); | |
243 } | |
244 | |
245 // Finally, make sure the incoming arguments take up an even number of | |
246 // words, in case the arguments or locals need to contain doubleword stack | |
247 // slots. The rest of the system assumes that stack slot pairs (in | |
248 // particular, in the spill area) which look aligned will in fact be | |
249 // aligned relative to the stack pointer in the target machine. Double | |
250 // stack slots will always be allocated aligned. | |
251 _new_SP = OptoReg::Name(round_to(_in_arg_limit, RegMask::SlotsPerLong)); | |
252 | |
253 // Compute highest outgoing stack argument as | |
254 // _new_SP + out_preserve_stack_slots + max(outgoing argument size). | |
255 _out_arg_limit = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); | |
256 assert( is_even(_out_arg_limit), "out_preserve must be even" ); | |
257 | |
258 if (!RegMask::can_represent(OptoReg::add(_out_arg_limit,-1))) { | |
259 // the compiler cannot represent this method's calling sequence | |
260 C->record_method_not_compilable("must be able to represent all call arguments in reg mask"); | |
261 } | |
262 | |
263 if (C->failing()) return; // bailed out on incoming arg failure | |
264 | |
265 // --------------- | |
266 // Collect roots of matcher trees. Every node for which | |
267 // _shared[_idx] is cleared is guaranteed to not be shared, and thus | |
268 // can be a valid interior of some tree. | |
269 find_shared( C->root() ); | |
270 find_shared( C->top() ); | |
271 | |
272 C->print_method("Before Matching", 2); | |
273 | |
274 // Swap out to old-space; emptying new-space | |
275 Arena *old = C->node_arena()->move_contents(C->old_arena()); | |
276 | |
277 // Save debug and profile information for nodes in old space: | |
278 _old_node_note_array = C->node_note_array(); | |
279 if (_old_node_note_array != NULL) { | |
280 C->set_node_note_array(new(C->comp_arena()) GrowableArray<Node_Notes*> | |
281 (C->comp_arena(), _old_node_note_array->length(), | |
282 0, NULL)); | |
283 } | |
284 | |
285 // Pre-size the new_node table to avoid the need for range checks. | |
286 grow_new_node_array(C->unique()); | |
287 | |
288 // Reset node counter so MachNodes start with _idx at 0 | |
289 int nodes = C->unique(); // save value | |
290 C->set_unique(0); | |
291 | |
292 // Recursively match trees from old space into new space. | |
293 // Correct leaves of new-space Nodes; they point to old-space. | |
294 _visited.Clear(); // Clear visit bits for xform call | |
295 C->set_cached_top_node(xform( C->top(), nodes )); | |
296 if (!C->failing()) { | |
297 Node* xroot = xform( C->root(), 1 ); | |
298 if (xroot == NULL) { | |
299 Matcher::soft_match_failure(); // recursive matching process failed | |
300 C->record_method_not_compilable("instruction match failed"); | |
301 } else { | |
302 // During matching shared constants were attached to C->root() | |
303 // because xroot wasn't available yet, so transfer the uses to | |
304 // the xroot. | |
305 for( DUIterator_Fast jmax, j = C->root()->fast_outs(jmax); j < jmax; j++ ) { | |
306 Node* n = C->root()->fast_out(j); | |
307 if (C->node_arena()->contains(n)) { | |
308 assert(n->in(0) == C->root(), "should be control user"); | |
309 n->set_req(0, xroot); | |
310 --j; | |
311 --jmax; | |
312 } | |
313 } | |
314 | |
315 C->set_root(xroot->is_Root() ? xroot->as_Root() : NULL); | |
316 #ifdef ASSERT | |
317 verify_new_nodes_only(xroot); | |
318 #endif | |
319 } | |
320 } | |
321 if (C->top() == NULL || C->root() == NULL) { | |
322 C->record_method_not_compilable("graph lost"); // %%% cannot happen? | |
323 } | |
324 if (C->failing()) { | |
325 // delete old; | |
326 old->destruct_contents(); | |
327 return; | |
328 } | |
329 assert( C->top(), "" ); | |
330 assert( C->root(), "" ); | |
331 validate_null_checks(); | |
332 | |
333 // Now smoke old-space | |
334 NOT_DEBUG( old->destruct_contents() ); | |
335 | |
336 // ------------------------ | |
337 // Set up save-on-entry registers | |
338 Fixup_Save_On_Entry( ); | |
339 } | |
340 | |
341 | |
342 //------------------------------Fixup_Save_On_Entry---------------------------- | |
343 // The stated purpose of this routine is to take care of save-on-entry | |
344 // registers. However, the overall goal of the Match phase is to convert into | |
345 // machine-specific instructions which have RegMasks to guide allocation. | |
346 // So what this procedure really does is put a valid RegMask on each input | |
347 // to the machine-specific variations of all Return, TailCall and Halt | |
348 // instructions. It also adds edgs to define the save-on-entry values (and of | |
349 // course gives them a mask). | |
350 | |
351 static RegMask *init_input_masks( uint size, RegMask &ret_adr, RegMask &fp ) { | |
352 RegMask *rms = NEW_RESOURCE_ARRAY( RegMask, size ); | |
353 // Do all the pre-defined register masks | |
354 rms[TypeFunc::Control ] = RegMask::Empty; | |
355 rms[TypeFunc::I_O ] = RegMask::Empty; | |
356 rms[TypeFunc::Memory ] = RegMask::Empty; | |
357 rms[TypeFunc::ReturnAdr] = ret_adr; | |
358 rms[TypeFunc::FramePtr ] = fp; | |
359 return rms; | |
360 } | |
361 | |
362 //---------------------------init_first_stack_mask----------------------------- | |
363 // Create the initial stack mask used by values spilling to the stack. | |
364 // Disallow any debug info in outgoing argument areas by setting the | |
365 // initial mask accordingly. | |
366 void Matcher::init_first_stack_mask() { | |
367 | |
368 // Allocate storage for spill masks as masks for the appropriate load type. | |
369 RegMask *rms = (RegMask*)C->comp_arena()->Amalloc_D(sizeof(RegMask)*10); | |
370 idealreg2spillmask[Op_RegI] = &rms[0]; | |
371 idealreg2spillmask[Op_RegL] = &rms[1]; | |
372 idealreg2spillmask[Op_RegF] = &rms[2]; | |
373 idealreg2spillmask[Op_RegD] = &rms[3]; | |
374 idealreg2spillmask[Op_RegP] = &rms[4]; | |
375 idealreg2debugmask[Op_RegI] = &rms[5]; | |
376 idealreg2debugmask[Op_RegL] = &rms[6]; | |
377 idealreg2debugmask[Op_RegF] = &rms[7]; | |
378 idealreg2debugmask[Op_RegD] = &rms[8]; | |
379 idealreg2debugmask[Op_RegP] = &rms[9]; | |
380 | |
381 OptoReg::Name i; | |
382 | |
383 // At first, start with the empty mask | |
384 C->FIRST_STACK_mask().Clear(); | |
385 | |
386 // Add in the incoming argument area | |
387 OptoReg::Name init = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); | |
388 for (i = init; i < _in_arg_limit; i = OptoReg::add(i,1)) | |
389 C->FIRST_STACK_mask().Insert(i); | |
390 | |
391 // Add in all bits past the outgoing argument area | |
392 guarantee(RegMask::can_represent(OptoReg::add(_out_arg_limit,-1)), | |
393 "must be able to represent all call arguments in reg mask"); | |
394 init = _out_arg_limit; | |
395 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) | |
396 C->FIRST_STACK_mask().Insert(i); | |
397 | |
398 // Finally, set the "infinite stack" bit. | |
399 C->FIRST_STACK_mask().set_AllStack(); | |
400 | |
401 // Make spill masks. Registers for their class, plus FIRST_STACK_mask. | |
402 *idealreg2spillmask[Op_RegI] = *idealreg2regmask[Op_RegI]; | |
403 idealreg2spillmask[Op_RegI]->OR(C->FIRST_STACK_mask()); | |
404 *idealreg2spillmask[Op_RegL] = *idealreg2regmask[Op_RegL]; | |
405 idealreg2spillmask[Op_RegL]->OR(C->FIRST_STACK_mask()); | |
406 *idealreg2spillmask[Op_RegF] = *idealreg2regmask[Op_RegF]; | |
407 idealreg2spillmask[Op_RegF]->OR(C->FIRST_STACK_mask()); | |
408 *idealreg2spillmask[Op_RegD] = *idealreg2regmask[Op_RegD]; | |
409 idealreg2spillmask[Op_RegD]->OR(C->FIRST_STACK_mask()); | |
410 *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP]; | |
411 idealreg2spillmask[Op_RegP]->OR(C->FIRST_STACK_mask()); | |
412 | |
413 // Make up debug masks. Any spill slot plus callee-save registers. | |
414 // Caller-save registers are assumed to be trashable by the various | |
415 // inline-cache fixup routines. | |
416 *idealreg2debugmask[Op_RegI]= *idealreg2spillmask[Op_RegI]; | |
417 *idealreg2debugmask[Op_RegL]= *idealreg2spillmask[Op_RegL]; | |
418 *idealreg2debugmask[Op_RegF]= *idealreg2spillmask[Op_RegF]; | |
419 *idealreg2debugmask[Op_RegD]= *idealreg2spillmask[Op_RegD]; | |
420 *idealreg2debugmask[Op_RegP]= *idealreg2spillmask[Op_RegP]; | |
421 | |
422 // Prevent stub compilations from attempting to reference | |
423 // callee-saved registers from debug info | |
424 bool exclude_soe = !Compile::current()->is_method_compilation(); | |
425 | |
426 for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { | |
427 // registers the caller has to save do not work | |
428 if( _register_save_policy[i] == 'C' || | |
429 _register_save_policy[i] == 'A' || | |
430 (_register_save_policy[i] == 'E' && exclude_soe) ) { | |
431 idealreg2debugmask[Op_RegI]->Remove(i); // Exclude save-on-call | |
432 idealreg2debugmask[Op_RegL]->Remove(i); // registers from debug | |
433 idealreg2debugmask[Op_RegF]->Remove(i); // masks | |
434 idealreg2debugmask[Op_RegD]->Remove(i); | |
435 idealreg2debugmask[Op_RegP]->Remove(i); | |
436 } | |
437 } | |
438 } | |
439 | |
440 //---------------------------is_save_on_entry---------------------------------- | |
441 bool Matcher::is_save_on_entry( int reg ) { | |
442 return | |
443 _register_save_policy[reg] == 'E' || | |
444 _register_save_policy[reg] == 'A' || // Save-on-entry register? | |
445 // Also save argument registers in the trampolining stubs | |
446 (C->save_argument_registers() && is_spillable_arg(reg)); | |
447 } | |
448 | |
449 //---------------------------Fixup_Save_On_Entry------------------------------- | |
450 void Matcher::Fixup_Save_On_Entry( ) { | |
451 init_first_stack_mask(); | |
452 | |
453 Node *root = C->root(); // Short name for root | |
454 // Count number of save-on-entry registers. | |
455 uint soe_cnt = number_of_saved_registers(); | |
456 uint i; | |
457 | |
458 // Find the procedure Start Node | |
459 StartNode *start = C->start(); | |
460 assert( start, "Expect a start node" ); | |
461 | |
462 // Save argument registers in the trampolining stubs | |
463 if( C->save_argument_registers() ) | |
464 for( i = 0; i < _last_Mach_Reg; i++ ) | |
465 if( is_spillable_arg(i) ) | |
466 soe_cnt++; | |
467 | |
468 // Input RegMask array shared by all Returns. | |
469 // The type for doubles and longs has a count of 2, but | |
470 // there is only 1 returned value | |
471 uint ret_edge_cnt = TypeFunc::Parms + ((C->tf()->range()->cnt() == TypeFunc::Parms) ? 0 : 1); | |
472 RegMask *ret_rms = init_input_masks( ret_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
473 // Returns have 0 or 1 returned values depending on call signature. | |
474 // Return register is specified by return_value in the AD file. | |
475 if (ret_edge_cnt > TypeFunc::Parms) | |
476 ret_rms[TypeFunc::Parms+0] = _return_value_mask; | |
477 | |
478 // Input RegMask array shared by all Rethrows. | |
479 uint reth_edge_cnt = TypeFunc::Parms+1; | |
480 RegMask *reth_rms = init_input_masks( reth_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
481 // Rethrow takes exception oop only, but in the argument 0 slot. | |
482 reth_rms[TypeFunc::Parms] = mreg2regmask[find_receiver(false)]; | |
483 #ifdef _LP64 | |
484 // Need two slots for ptrs in 64-bit land | |
485 reth_rms[TypeFunc::Parms].Insert(OptoReg::add(OptoReg::Name(find_receiver(false)),1)); | |
486 #endif | |
487 | |
488 // Input RegMask array shared by all TailCalls | |
489 uint tail_call_edge_cnt = TypeFunc::Parms+2; | |
490 RegMask *tail_call_rms = init_input_masks( tail_call_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
491 | |
492 // Input RegMask array shared by all TailJumps | |
493 uint tail_jump_edge_cnt = TypeFunc::Parms+2; | |
494 RegMask *tail_jump_rms = init_input_masks( tail_jump_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
495 | |
496 // TailCalls have 2 returned values (target & moop), whose masks come | |
497 // from the usual MachNode/MachOper mechanism. Find a sample | |
498 // TailCall to extract these masks and put the correct masks into | |
499 // the tail_call_rms array. | |
500 for( i=1; i < root->req(); i++ ) { | |
501 MachReturnNode *m = root->in(i)->as_MachReturn(); | |
502 if( m->ideal_Opcode() == Op_TailCall ) { | |
503 tail_call_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); | |
504 tail_call_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); | |
505 break; | |
506 } | |
507 } | |
508 | |
509 // TailJumps have 2 returned values (target & ex_oop), whose masks come | |
510 // from the usual MachNode/MachOper mechanism. Find a sample | |
511 // TailJump to extract these masks and put the correct masks into | |
512 // the tail_jump_rms array. | |
513 for( i=1; i < root->req(); i++ ) { | |
514 MachReturnNode *m = root->in(i)->as_MachReturn(); | |
515 if( m->ideal_Opcode() == Op_TailJump ) { | |
516 tail_jump_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); | |
517 tail_jump_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); | |
518 break; | |
519 } | |
520 } | |
521 | |
522 // Input RegMask array shared by all Halts | |
523 uint halt_edge_cnt = TypeFunc::Parms; | |
524 RegMask *halt_rms = init_input_masks( halt_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
525 | |
526 // Capture the return input masks into each exit flavor | |
527 for( i=1; i < root->req(); i++ ) { | |
528 MachReturnNode *exit = root->in(i)->as_MachReturn(); | |
529 switch( exit->ideal_Opcode() ) { | |
530 case Op_Return : exit->_in_rms = ret_rms; break; | |
531 case Op_Rethrow : exit->_in_rms = reth_rms; break; | |
532 case Op_TailCall : exit->_in_rms = tail_call_rms; break; | |
533 case Op_TailJump : exit->_in_rms = tail_jump_rms; break; | |
534 case Op_Halt : exit->_in_rms = halt_rms; break; | |
535 default : ShouldNotReachHere(); | |
536 } | |
537 } | |
538 | |
539 // Next unused projection number from Start. | |
540 int proj_cnt = C->tf()->domain()->cnt(); | |
541 | |
542 // Do all the save-on-entry registers. Make projections from Start for | |
543 // them, and give them a use at the exit points. To the allocator, they | |
544 // look like incoming register arguments. | |
545 for( i = 0; i < _last_Mach_Reg; i++ ) { | |
546 if( is_save_on_entry(i) ) { | |
547 | |
548 // Add the save-on-entry to the mask array | |
549 ret_rms [ ret_edge_cnt] = mreg2regmask[i]; | |
550 reth_rms [ reth_edge_cnt] = mreg2regmask[i]; | |
551 tail_call_rms[tail_call_edge_cnt] = mreg2regmask[i]; | |
552 tail_jump_rms[tail_jump_edge_cnt] = mreg2regmask[i]; | |
553 // Halts need the SOE registers, but only in the stack as debug info. | |
554 // A just-prior uncommon-trap or deoptimization will use the SOE regs. | |
555 halt_rms [ halt_edge_cnt] = *idealreg2spillmask[_register_save_type[i]]; | |
556 | |
557 Node *mproj; | |
558 | |
559 // Is this a RegF low half of a RegD? Double up 2 adjacent RegF's | |
560 // into a single RegD. | |
561 if( (i&1) == 0 && | |
562 _register_save_type[i ] == Op_RegF && | |
563 _register_save_type[i+1] == Op_RegF && | |
564 is_save_on_entry(i+1) ) { | |
565 // Add other bit for double | |
566 ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); | |
567 reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); | |
568 tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); | |
569 tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); | |
570 halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); | |
571 mproj = new (C, 1) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegD ); | |
572 proj_cnt += 2; // Skip 2 for doubles | |
573 } | |
574 else if( (i&1) == 1 && // Else check for high half of double | |
575 _register_save_type[i-1] == Op_RegF && | |
576 _register_save_type[i ] == Op_RegF && | |
577 is_save_on_entry(i-1) ) { | |
578 ret_rms [ ret_edge_cnt] = RegMask::Empty; | |
579 reth_rms [ reth_edge_cnt] = RegMask::Empty; | |
580 tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; | |
581 tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; | |
582 halt_rms [ halt_edge_cnt] = RegMask::Empty; | |
583 mproj = C->top(); | |
584 } | |
585 // Is this a RegI low half of a RegL? Double up 2 adjacent RegI's | |
586 // into a single RegL. | |
587 else if( (i&1) == 0 && | |
588 _register_save_type[i ] == Op_RegI && | |
589 _register_save_type[i+1] == Op_RegI && | |
590 is_save_on_entry(i+1) ) { | |
591 // Add other bit for long | |
592 ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); | |
593 reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); | |
594 tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); | |
595 tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); | |
596 halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); | |
597 mproj = new (C, 1) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegL ); | |
598 proj_cnt += 2; // Skip 2 for longs | |
599 } | |
600 else if( (i&1) == 1 && // Else check for high half of long | |
601 _register_save_type[i-1] == Op_RegI && | |
602 _register_save_type[i ] == Op_RegI && | |
603 is_save_on_entry(i-1) ) { | |
604 ret_rms [ ret_edge_cnt] = RegMask::Empty; | |
605 reth_rms [ reth_edge_cnt] = RegMask::Empty; | |
606 tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; | |
607 tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; | |
608 halt_rms [ halt_edge_cnt] = RegMask::Empty; | |
609 mproj = C->top(); | |
610 } else { | |
611 // Make a projection for it off the Start | |
612 mproj = new (C, 1) MachProjNode( start, proj_cnt++, ret_rms[ret_edge_cnt], _register_save_type[i] ); | |
613 } | |
614 | |
615 ret_edge_cnt ++; | |
616 reth_edge_cnt ++; | |
617 tail_call_edge_cnt ++; | |
618 tail_jump_edge_cnt ++; | |
619 halt_edge_cnt ++; | |
620 | |
621 // Add a use of the SOE register to all exit paths | |
622 for( uint j=1; j < root->req(); j++ ) | |
623 root->in(j)->add_req(mproj); | |
624 } // End of if a save-on-entry register | |
625 } // End of for all machine registers | |
626 } | |
627 | |
628 //------------------------------init_spill_mask-------------------------------- | |
629 void Matcher::init_spill_mask( Node *ret ) { | |
630 if( idealreg2regmask[Op_RegI] ) return; // One time only init | |
631 | |
632 OptoReg::c_frame_pointer = c_frame_pointer(); | |
633 c_frame_ptr_mask = c_frame_pointer(); | |
634 #ifdef _LP64 | |
635 // pointers are twice as big | |
636 c_frame_ptr_mask.Insert(OptoReg::add(c_frame_pointer(),1)); | |
637 #endif | |
638 | |
639 // Start at OptoReg::stack0() | |
640 STACK_ONLY_mask.Clear(); | |
641 OptoReg::Name init = OptoReg::stack2reg(0); | |
642 // STACK_ONLY_mask is all stack bits | |
643 OptoReg::Name i; | |
644 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) | |
645 STACK_ONLY_mask.Insert(i); | |
646 // Also set the "infinite stack" bit. | |
647 STACK_ONLY_mask.set_AllStack(); | |
648 | |
649 // Copy the register names over into the shared world | |
650 for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { | |
651 // SharedInfo::regName[i] = regName[i]; | |
652 // Handy RegMasks per machine register | |
653 mreg2regmask[i].Insert(i); | |
654 } | |
655 | |
656 // Grab the Frame Pointer | |
657 Node *fp = ret->in(TypeFunc::FramePtr); | |
658 Node *mem = ret->in(TypeFunc::Memory); | |
659 const TypePtr* atp = TypePtr::BOTTOM; | |
660 // Share frame pointer while making spill ops | |
661 set_shared(fp); | |
662 | |
663 // Compute generic short-offset Loads | |
664 MachNode *spillI = match_tree(new (C, 3) LoadINode(NULL,mem,fp,atp)); | |
665 MachNode *spillL = match_tree(new (C, 3) LoadLNode(NULL,mem,fp,atp)); | |
666 MachNode *spillF = match_tree(new (C, 3) LoadFNode(NULL,mem,fp,atp)); | |
667 MachNode *spillD = match_tree(new (C, 3) LoadDNode(NULL,mem,fp,atp)); | |
668 MachNode *spillP = match_tree(new (C, 3) LoadPNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM)); | |
669 assert(spillI != NULL && spillL != NULL && spillF != NULL && | |
670 spillD != NULL && spillP != NULL, ""); | |
671 | |
672 // Get the ADLC notion of the right regmask, for each basic type. | |
673 idealreg2regmask[Op_RegI] = &spillI->out_RegMask(); | |
674 idealreg2regmask[Op_RegL] = &spillL->out_RegMask(); | |
675 idealreg2regmask[Op_RegF] = &spillF->out_RegMask(); | |
676 idealreg2regmask[Op_RegD] = &spillD->out_RegMask(); | |
677 idealreg2regmask[Op_RegP] = &spillP->out_RegMask(); | |
678 } | |
679 | |
680 #ifdef ASSERT | |
681 static void match_alias_type(Compile* C, Node* n, Node* m) { | |
682 if (!VerifyAliases) return; // do not go looking for trouble by default | |
683 const TypePtr* nat = n->adr_type(); | |
684 const TypePtr* mat = m->adr_type(); | |
685 int nidx = C->get_alias_index(nat); | |
686 int midx = C->get_alias_index(mat); | |
687 // Detune the assert for cases like (AndI 0xFF (LoadB p)). | |
688 if (nidx == Compile::AliasIdxTop && midx >= Compile::AliasIdxRaw) { | |
689 for (uint i = 1; i < n->req(); i++) { | |
690 Node* n1 = n->in(i); | |
691 const TypePtr* n1at = n1->adr_type(); | |
692 if (n1at != NULL) { | |
693 nat = n1at; | |
694 nidx = C->get_alias_index(n1at); | |
695 } | |
696 } | |
697 } | |
698 // %%% Kludgery. Instead, fix ideal adr_type methods for all these cases: | |
699 if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxRaw) { | |
700 switch (n->Opcode()) { | |
701 case Op_PrefetchRead: | |
702 case Op_PrefetchWrite: | |
703 nidx = Compile::AliasIdxRaw; | |
704 nat = TypeRawPtr::BOTTOM; | |
705 break; | |
706 } | |
707 } | |
708 if (nidx == Compile::AliasIdxRaw && midx == Compile::AliasIdxTop) { | |
709 switch (n->Opcode()) { | |
710 case Op_ClearArray: | |
711 midx = Compile::AliasIdxRaw; | |
712 mat = TypeRawPtr::BOTTOM; | |
713 break; | |
714 } | |
715 } | |
716 if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxBot) { | |
717 switch (n->Opcode()) { | |
718 case Op_Return: | |
719 case Op_Rethrow: | |
720 case Op_Halt: | |
721 case Op_TailCall: | |
722 case Op_TailJump: | |
723 nidx = Compile::AliasIdxBot; | |
724 nat = TypePtr::BOTTOM; | |
725 break; | |
726 } | |
727 } | |
728 if (nidx == Compile::AliasIdxBot && midx == Compile::AliasIdxTop) { | |
729 switch (n->Opcode()) { | |
730 case Op_StrComp: | |
731 case Op_MemBarVolatile: | |
732 case Op_MemBarCPUOrder: // %%% these ideals should have narrower adr_type? | |
733 nidx = Compile::AliasIdxTop; | |
734 nat = NULL; | |
735 break; | |
736 } | |
737 } | |
738 if (nidx != midx) { | |
739 if (PrintOpto || (PrintMiscellaneous && (WizardMode || Verbose))) { | |
740 tty->print_cr("==== Matcher alias shift %d => %d", nidx, midx); | |
741 n->dump(); | |
742 m->dump(); | |
743 } | |
744 assert(C->subsume_loads() && C->must_alias(nat, midx), | |
745 "must not lose alias info when matching"); | |
746 } | |
747 } | |
748 #endif | |
749 | |
750 | |
751 //------------------------------MStack----------------------------------------- | |
752 // State and MStack class used in xform() and find_shared() iterative methods. | |
753 enum Node_State { Pre_Visit, // node has to be pre-visited | |
754 Visit, // visit node | |
755 Post_Visit, // post-visit node | |
756 Alt_Post_Visit // alternative post-visit path | |
757 }; | |
758 | |
759 class MStack: public Node_Stack { | |
760 public: | |
761 MStack(int size) : Node_Stack(size) { } | |
762 | |
763 void push(Node *n, Node_State ns) { | |
764 Node_Stack::push(n, (uint)ns); | |
765 } | |
766 void push(Node *n, Node_State ns, Node *parent, int indx) { | |
767 ++_inode_top; | |
768 if ((_inode_top + 1) >= _inode_max) grow(); | |
769 _inode_top->node = parent; | |
770 _inode_top->indx = (uint)indx; | |
771 ++_inode_top; | |
772 _inode_top->node = n; | |
773 _inode_top->indx = (uint)ns; | |
774 } | |
775 Node *parent() { | |
776 pop(); | |
777 return node(); | |
778 } | |
779 Node_State state() const { | |
780 return (Node_State)index(); | |
781 } | |
782 void set_state(Node_State ns) { | |
783 set_index((uint)ns); | |
784 } | |
785 }; | |
786 | |
787 | |
788 //------------------------------xform------------------------------------------ | |
789 // Given a Node in old-space, Match him (Label/Reduce) to produce a machine | |
790 // Node in new-space. Given a new-space Node, recursively walk his children. | |
791 Node *Matcher::transform( Node *n ) { ShouldNotCallThis(); return n; } | |
792 Node *Matcher::xform( Node *n, int max_stack ) { | |
793 // Use one stack to keep both: child's node/state and parent's node/index | |
794 MStack mstack(max_stack * 2 * 2); // C->unique() * 2 * 2 | |
795 mstack.push(n, Visit, NULL, -1); // set NULL as parent to indicate root | |
796 | |
797 while (mstack.is_nonempty()) { | |
798 n = mstack.node(); // Leave node on stack | |
799 Node_State nstate = mstack.state(); | |
800 if (nstate == Visit) { | |
801 mstack.set_state(Post_Visit); | |
802 Node *oldn = n; | |
803 // Old-space or new-space check | |
804 if (!C->node_arena()->contains(n)) { | |
805 // Old space! | |
806 Node* m; | |
807 if (has_new_node(n)) { // Not yet Label/Reduced | |
808 m = new_node(n); | |
809 } else { | |
810 if (!is_dontcare(n)) { // Matcher can match this guy | |
811 // Calls match special. They match alone with no children. | |
812 // Their children, the incoming arguments, match normally. | |
813 m = n->is_SafePoint() ? match_sfpt(n->as_SafePoint()):match_tree(n); | |
814 if (C->failing()) return NULL; | |
815 if (m == NULL) { Matcher::soft_match_failure(); return NULL; } | |
816 } else { // Nothing the matcher cares about | |
817 if( n->is_Proj() && n->in(0)->is_Multi()) { // Projections? | |
818 // Convert to machine-dependent projection | |
819 m = n->in(0)->as_Multi()->match( n->as_Proj(), this ); | |
820 if (m->in(0) != NULL) // m might be top | |
821 collect_null_checks(m); | |
822 } else { // Else just a regular 'ol guy | |
823 m = n->clone(); // So just clone into new-space | |
824 // Def-Use edges will be added incrementally as Uses | |
825 // of this node are matched. | |
826 assert(m->outcnt() == 0, "no Uses of this clone yet"); | |
827 } | |
828 } | |
829 | |
830 set_new_node(n, m); // Map old to new | |
831 if (_old_node_note_array != NULL) { | |
832 Node_Notes* nn = C->locate_node_notes(_old_node_note_array, | |
833 n->_idx); | |
834 C->set_node_notes_at(m->_idx, nn); | |
835 } | |
836 debug_only(match_alias_type(C, n, m)); | |
837 } | |
838 n = m; // n is now a new-space node | |
839 mstack.set_node(n); | |
840 } | |
841 | |
842 // New space! | |
843 if (_visited.test_set(n->_idx)) continue; // while(mstack.is_nonempty()) | |
844 | |
845 int i; | |
846 // Put precedence edges on stack first (match them last). | |
847 for (i = oldn->req(); (uint)i < oldn->len(); i++) { | |
848 Node *m = oldn->in(i); | |
849 if (m == NULL) break; | |
850 // set -1 to call add_prec() instead of set_req() during Step1 | |
851 mstack.push(m, Visit, n, -1); | |
852 } | |
853 | |
854 // For constant debug info, I'd rather have unmatched constants. | |
855 int cnt = n->req(); | |
856 JVMState* jvms = n->jvms(); | |
857 int debug_cnt = jvms ? jvms->debug_start() : cnt; | |
858 | |
859 // Now do only debug info. Clone constants rather than matching. | |
860 // Constants are represented directly in the debug info without | |
861 // the need for executable machine instructions. | |
862 // Monitor boxes are also represented directly. | |
863 for (i = cnt - 1; i >= debug_cnt; --i) { // For all debug inputs do | |
864 Node *m = n->in(i); // Get input | |
865 int op = m->Opcode(); | |
866 assert((op == Op_BoxLock) == jvms->is_monitor_use(i), "boxes only at monitor sites"); | |
867 if( op == Op_ConI || op == Op_ConP || | |
868 op == Op_ConF || op == Op_ConD || op == Op_ConL | |
869 // || op == Op_BoxLock // %%%% enable this and remove (+++) in chaitin.cpp | |
870 ) { | |
871 m = m->clone(); | |
872 mstack.push(m, Post_Visit, n, i); // Don't neet to visit | |
873 mstack.push(m->in(0), Visit, m, 0); | |
874 } else { | |
875 mstack.push(m, Visit, n, i); | |
876 } | |
877 } | |
878 | |
879 // And now walk his children, and convert his inputs to new-space. | |
880 for( ; i >= 0; --i ) { // For all normal inputs do | |
881 Node *m = n->in(i); // Get input | |
882 if(m != NULL) | |
883 mstack.push(m, Visit, n, i); | |
884 } | |
885 | |
886 } | |
887 else if (nstate == Post_Visit) { | |
888 // Set xformed input | |
889 Node *p = mstack.parent(); | |
890 if (p != NULL) { // root doesn't have parent | |
891 int i = (int)mstack.index(); | |
892 if (i >= 0) | |
893 p->set_req(i, n); // required input | |
894 else if (i == -1) | |
895 p->add_prec(n); // precedence input | |
896 else | |
897 ShouldNotReachHere(); | |
898 } | |
899 mstack.pop(); // remove processed node from stack | |
900 } | |
901 else { | |
902 ShouldNotReachHere(); | |
903 } | |
904 } // while (mstack.is_nonempty()) | |
905 return n; // Return new-space Node | |
906 } | |
907 | |
908 //------------------------------warp_outgoing_stk_arg------------------------ | |
909 OptoReg::Name Matcher::warp_outgoing_stk_arg( VMReg reg, OptoReg::Name begin_out_arg_area, OptoReg::Name &out_arg_limit_per_call ) { | |
910 // Convert outgoing argument location to a pre-biased stack offset | |
911 if (reg->is_stack()) { | |
912 OptoReg::Name warped = reg->reg2stack(); | |
913 // Adjust the stack slot offset to be the register number used | |
914 // by the allocator. | |
915 warped = OptoReg::add(begin_out_arg_area, warped); | |
916 // Keep track of the largest numbered stack slot used for an arg. | |
917 // Largest used slot per call-site indicates the amount of stack | |
918 // that is killed by the call. | |
919 if( warped >= out_arg_limit_per_call ) | |
920 out_arg_limit_per_call = OptoReg::add(warped,1); | |
921 if (!RegMask::can_represent(warped)) { | |
922 C->record_method_not_compilable_all_tiers("unsupported calling sequence"); | |
923 return OptoReg::Bad; | |
924 } | |
925 return warped; | |
926 } | |
927 return OptoReg::as_OptoReg(reg); | |
928 } | |
929 | |
930 | |
931 //------------------------------match_sfpt------------------------------------- | |
932 // Helper function to match call instructions. Calls match special. | |
933 // They match alone with no children. Their children, the incoming | |
934 // arguments, match normally. | |
935 MachNode *Matcher::match_sfpt( SafePointNode *sfpt ) { | |
936 MachSafePointNode *msfpt = NULL; | |
937 MachCallNode *mcall = NULL; | |
938 uint cnt; | |
939 // Split out case for SafePoint vs Call | |
940 CallNode *call; | |
941 const TypeTuple *domain; | |
942 ciMethod* method = NULL; | |
943 if( sfpt->is_Call() ) { | |
944 call = sfpt->as_Call(); | |
945 domain = call->tf()->domain(); | |
946 cnt = domain->cnt(); | |
947 | |
948 // Match just the call, nothing else | |
949 MachNode *m = match_tree(call); | |
950 if (C->failing()) return NULL; | |
951 if( m == NULL ) { Matcher::soft_match_failure(); return NULL; } | |
952 | |
953 // Copy data from the Ideal SafePoint to the machine version | |
954 mcall = m->as_MachCall(); | |
955 | |
956 mcall->set_tf( call->tf()); | |
957 mcall->set_entry_point(call->entry_point()); | |
958 mcall->set_cnt( call->cnt()); | |
959 | |
960 if( mcall->is_MachCallJava() ) { | |
961 MachCallJavaNode *mcall_java = mcall->as_MachCallJava(); | |
962 const CallJavaNode *call_java = call->as_CallJava(); | |
963 method = call_java->method(); | |
964 mcall_java->_method = method; | |
965 mcall_java->_bci = call_java->_bci; | |
966 mcall_java->_optimized_virtual = call_java->is_optimized_virtual(); | |
967 if( mcall_java->is_MachCallStaticJava() ) | |
968 mcall_java->as_MachCallStaticJava()->_name = | |
969 call_java->as_CallStaticJava()->_name; | |
970 if( mcall_java->is_MachCallDynamicJava() ) | |
971 mcall_java->as_MachCallDynamicJava()->_vtable_index = | |
972 call_java->as_CallDynamicJava()->_vtable_index; | |
973 } | |
974 else if( mcall->is_MachCallRuntime() ) { | |
975 mcall->as_MachCallRuntime()->_name = call->as_CallRuntime()->_name; | |
976 } | |
977 msfpt = mcall; | |
978 } | |
979 // This is a non-call safepoint | |
980 else { | |
981 call = NULL; | |
982 domain = NULL; | |
983 MachNode *mn = match_tree(sfpt); | |
984 if (C->failing()) return NULL; | |
985 msfpt = mn->as_MachSafePoint(); | |
986 cnt = TypeFunc::Parms; | |
987 } | |
988 | |
989 // Advertise the correct memory effects (for anti-dependence computation). | |
990 msfpt->set_adr_type(sfpt->adr_type()); | |
991 | |
992 // Allocate a private array of RegMasks. These RegMasks are not shared. | |
993 msfpt->_in_rms = NEW_RESOURCE_ARRAY( RegMask, cnt ); | |
994 // Empty them all. | |
995 memset( msfpt->_in_rms, 0, sizeof(RegMask)*cnt ); | |
996 | |
997 // Do all the pre-defined non-Empty register masks | |
998 msfpt->_in_rms[TypeFunc::ReturnAdr] = _return_addr_mask; | |
999 msfpt->_in_rms[TypeFunc::FramePtr ] = c_frame_ptr_mask; | |
1000 | |
1001 // Place first outgoing argument can possibly be put. | |
1002 OptoReg::Name begin_out_arg_area = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); | |
1003 assert( is_even(begin_out_arg_area), "" ); | |
1004 // Compute max outgoing register number per call site. | |
1005 OptoReg::Name out_arg_limit_per_call = begin_out_arg_area; | |
1006 // Calls to C may hammer extra stack slots above and beyond any arguments. | |
1007 // These are usually backing store for register arguments for varargs. | |
1008 if( call != NULL && call->is_CallRuntime() ) | |
1009 out_arg_limit_per_call = OptoReg::add(out_arg_limit_per_call,C->varargs_C_out_slots_killed()); | |
1010 | |
1011 | |
1012 // Do the normal argument list (parameters) register masks | |
1013 int argcnt = cnt - TypeFunc::Parms; | |
1014 if( argcnt > 0 ) { // Skip it all if we have no args | |
1015 BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); | |
1016 VMRegPair *parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); | |
1017 int i; | |
1018 for( i = 0; i < argcnt; i++ ) { | |
1019 sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); | |
1020 } | |
1021 // V-call to pick proper calling convention | |
1022 call->calling_convention( sig_bt, parm_regs, argcnt ); | |
1023 | |
1024 #ifdef ASSERT | |
1025 // Sanity check users' calling convention. Really handy during | |
1026 // the initial porting effort. Fairly expensive otherwise. | |
1027 { for (int i = 0; i<argcnt; i++) { | |
1028 if( !parm_regs[i].first()->is_valid() && | |
1029 !parm_regs[i].second()->is_valid() ) continue; | |
1030 VMReg reg1 = parm_regs[i].first(); | |
1031 VMReg reg2 = parm_regs[i].second(); | |
1032 for (int j = 0; j < i; j++) { | |
1033 if( !parm_regs[j].first()->is_valid() && | |
1034 !parm_regs[j].second()->is_valid() ) continue; | |
1035 VMReg reg3 = parm_regs[j].first(); | |
1036 VMReg reg4 = parm_regs[j].second(); | |
1037 if( !reg1->is_valid() ) { | |
1038 assert( !reg2->is_valid(), "valid halvsies" ); | |
1039 } else if( !reg3->is_valid() ) { | |
1040 assert( !reg4->is_valid(), "valid halvsies" ); | |
1041 } else { | |
1042 assert( reg1 != reg2, "calling conv. must produce distinct regs"); | |
1043 assert( reg1 != reg3, "calling conv. must produce distinct regs"); | |
1044 assert( reg1 != reg4, "calling conv. must produce distinct regs"); | |
1045 assert( reg2 != reg3, "calling conv. must produce distinct regs"); | |
1046 assert( reg2 != reg4 || !reg2->is_valid(), "calling conv. must produce distinct regs"); | |
1047 assert( reg3 != reg4, "calling conv. must produce distinct regs"); | |
1048 } | |
1049 } | |
1050 } | |
1051 } | |
1052 #endif | |
1053 | |
1054 // Visit each argument. Compute its outgoing register mask. | |
1055 // Return results now can have 2 bits returned. | |
1056 // Compute max over all outgoing arguments both per call-site | |
1057 // and over the entire method. | |
1058 for( i = 0; i < argcnt; i++ ) { | |
1059 // Address of incoming argument mask to fill in | |
1060 RegMask *rm = &mcall->_in_rms[i+TypeFunc::Parms]; | |
1061 if( !parm_regs[i].first()->is_valid() && | |
1062 !parm_regs[i].second()->is_valid() ) { | |
1063 continue; // Avoid Halves | |
1064 } | |
1065 // Grab first register, adjust stack slots and insert in mask. | |
1066 OptoReg::Name reg1 = warp_outgoing_stk_arg(parm_regs[i].first(), begin_out_arg_area, out_arg_limit_per_call ); | |
1067 if (OptoReg::is_valid(reg1)) | |
1068 rm->Insert( reg1 ); | |
1069 // Grab second register (if any), adjust stack slots and insert in mask. | |
1070 OptoReg::Name reg2 = warp_outgoing_stk_arg(parm_regs[i].second(), begin_out_arg_area, out_arg_limit_per_call ); | |
1071 if (OptoReg::is_valid(reg2)) | |
1072 rm->Insert( reg2 ); | |
1073 } // End of for all arguments | |
1074 | |
1075 // Compute number of stack slots needed to restore stack in case of | |
1076 // Pascal-style argument popping. | |
1077 mcall->_argsize = out_arg_limit_per_call - begin_out_arg_area; | |
1078 } | |
1079 | |
1080 // Compute the max stack slot killed by any call. These will not be | |
1081 // available for debug info, and will be used to adjust FIRST_STACK_mask | |
1082 // after all call sites have been visited. | |
1083 if( _out_arg_limit < out_arg_limit_per_call) | |
1084 _out_arg_limit = out_arg_limit_per_call; | |
1085 | |
1086 if (mcall) { | |
1087 // Kill the outgoing argument area, including any non-argument holes and | |
1088 // any legacy C-killed slots. Use Fat-Projections to do the killing. | |
1089 // Since the max-per-method covers the max-per-call-site and debug info | |
1090 // is excluded on the max-per-method basis, debug info cannot land in | |
1091 // this killed area. | |
1092 uint r_cnt = mcall->tf()->range()->cnt(); | |
1093 MachProjNode *proj = new (C, 1) MachProjNode( mcall, r_cnt+10000, RegMask::Empty, MachProjNode::fat_proj ); | |
1094 if (!RegMask::can_represent(OptoReg::Name(out_arg_limit_per_call-1))) { | |
1095 C->record_method_not_compilable_all_tiers("unsupported outgoing calling sequence"); | |
1096 } else { | |
1097 for (int i = begin_out_arg_area; i < out_arg_limit_per_call; i++) | |
1098 proj->_rout.Insert(OptoReg::Name(i)); | |
1099 } | |
1100 if( proj->_rout.is_NotEmpty() ) | |
1101 _proj_list.push(proj); | |
1102 } | |
1103 // Transfer the safepoint information from the call to the mcall | |
1104 // Move the JVMState list | |
1105 msfpt->set_jvms(sfpt->jvms()); | |
1106 for (JVMState* jvms = msfpt->jvms(); jvms; jvms = jvms->caller()) { | |
1107 jvms->set_map(sfpt); | |
1108 } | |
1109 | |
1110 // Debug inputs begin just after the last incoming parameter | |
1111 assert( (mcall == NULL) || (mcall->jvms() == NULL) || | |
1112 (mcall->jvms()->debug_start() + mcall->_jvmadj == mcall->tf()->domain()->cnt()), "" ); | |
1113 | |
1114 // Move the OopMap | |
1115 msfpt->_oop_map = sfpt->_oop_map; | |
1116 | |
1117 // Registers killed by the call are set in the local scheduling pass | |
1118 // of Global Code Motion. | |
1119 return msfpt; | |
1120 } | |
1121 | |
1122 //---------------------------match_tree---------------------------------------- | |
1123 // Match a Ideal Node DAG - turn it into a tree; Label & Reduce. Used as part | |
1124 // of the whole-sale conversion from Ideal to Mach Nodes. Also used for | |
1125 // making GotoNodes while building the CFG and in init_spill_mask() to identify | |
1126 // a Load's result RegMask for memoization in idealreg2regmask[] | |
1127 MachNode *Matcher::match_tree( const Node *n ) { | |
1128 assert( n->Opcode() != Op_Phi, "cannot match" ); | |
1129 assert( !n->is_block_start(), "cannot match" ); | |
1130 // Set the mark for all locally allocated State objects. | |
1131 // When this call returns, the _states_arena arena will be reset | |
1132 // freeing all State objects. | |
1133 ResourceMark rm( &_states_arena ); | |
1134 | |
1135 LabelRootDepth = 0; | |
1136 | |
1137 // StoreNodes require their Memory input to match any LoadNodes | |
1138 Node *mem = n->is_Store() ? n->in(MemNode::Memory) : (Node*)1 ; | |
1139 | |
1140 // State object for root node of match tree | |
1141 // Allocate it on _states_arena - stack allocation can cause stack overflow. | |
1142 State *s = new (&_states_arena) State; | |
1143 s->_kids[0] = NULL; | |
1144 s->_kids[1] = NULL; | |
1145 s->_leaf = (Node*)n; | |
1146 // Label the input tree, allocating labels from top-level arena | |
1147 Label_Root( n, s, n->in(0), mem ); | |
1148 if (C->failing()) return NULL; | |
1149 | |
1150 // The minimum cost match for the whole tree is found at the root State | |
1151 uint mincost = max_juint; | |
1152 uint cost = max_juint; | |
1153 uint i; | |
1154 for( i = 0; i < NUM_OPERANDS; i++ ) { | |
1155 if( s->valid(i) && // valid entry and | |
1156 s->_cost[i] < cost && // low cost and | |
1157 s->_rule[i] >= NUM_OPERANDS ) // not an operand | |
1158 cost = s->_cost[mincost=i]; | |
1159 } | |
1160 if (mincost == max_juint) { | |
1161 #ifndef PRODUCT | |
1162 tty->print("No matching rule for:"); | |
1163 s->dump(); | |
1164 #endif | |
1165 Matcher::soft_match_failure(); | |
1166 return NULL; | |
1167 } | |
1168 // Reduce input tree based upon the state labels to machine Nodes | |
1169 MachNode *m = ReduceInst( s, s->_rule[mincost], mem ); | |
1170 #ifdef ASSERT | |
1171 _old2new_map.map(n->_idx, m); | |
1172 #endif | |
1173 | |
1174 // Add any Matcher-ignored edges | |
1175 uint cnt = n->req(); | |
1176 uint start = 1; | |
1177 if( mem != (Node*)1 ) start = MemNode::Memory+1; | |
1178 if( n->Opcode() == Op_AddP ) { | |
1179 assert( mem == (Node*)1, "" ); | |
1180 start = AddPNode::Base+1; | |
1181 } | |
1182 for( i = start; i < cnt; i++ ) { | |
1183 if( !n->match_edge(i) ) { | |
1184 if( i < m->req() ) | |
1185 m->ins_req( i, n->in(i) ); | |
1186 else | |
1187 m->add_req( n->in(i) ); | |
1188 } | |
1189 } | |
1190 | |
1191 return m; | |
1192 } | |
1193 | |
1194 | |
1195 //------------------------------match_into_reg--------------------------------- | |
1196 // Choose to either match this Node in a register or part of the current | |
1197 // match tree. Return true for requiring a register and false for matching | |
1198 // as part of the current match tree. | |
1199 static bool match_into_reg( const Node *n, Node *m, Node *control, int i, bool shared ) { | |
1200 | |
1201 const Type *t = m->bottom_type(); | |
1202 | |
1203 if( t->singleton() ) { | |
1204 // Never force constants into registers. Allow them to match as | |
1205 // constants or registers. Copies of the same value will share | |
1206 // the same register. See find_shared_constant. | |
1207 return false; | |
1208 } else { // Not a constant | |
1209 // Stop recursion if they have different Controls. | |
1210 // Slot 0 of constants is not really a Control. | |
1211 if( control && m->in(0) && control != m->in(0) ) { | |
1212 | |
1213 // Actually, we can live with the most conservative control we | |
1214 // find, if it post-dominates the others. This allows us to | |
1215 // pick up load/op/store trees where the load can float a little | |
1216 // above the store. | |
1217 Node *x = control; | |
1218 const uint max_scan = 6; // Arbitrary scan cutoff | |
1219 uint j; | |
1220 for( j=0; j<max_scan; j++ ) { | |
1221 if( x->is_Region() ) // Bail out at merge points | |
1222 return true; | |
1223 x = x->in(0); | |
1224 if( x == m->in(0) ) // Does 'control' post-dominate | |
1225 break; // m->in(0)? If so, we can use it | |
1226 } | |
1227 if( j == max_scan ) // No post-domination before scan end? | |
1228 return true; // Then break the match tree up | |
1229 } | |
1230 } | |
1231 | |
1232 // Not forceably cloning. If shared, put it into a register. | |
1233 return shared; | |
1234 } | |
1235 | |
1236 | |
1237 //------------------------------Instruction Selection-------------------------- | |
1238 // Label method walks a "tree" of nodes, using the ADLC generated DFA to match | |
1239 // ideal nodes to machine instructions. Trees are delimited by shared Nodes, | |
1240 // things the Matcher does not match (e.g., Memory), and things with different | |
1241 // Controls (hence forced into different blocks). We pass in the Control | |
1242 // selected for this entire State tree. | |
1243 | |
1244 // The Matcher works on Trees, but an Intel add-to-memory requires a DAG: the | |
1245 // Store and the Load must have identical Memories (as well as identical | |
1246 // pointers). Since the Matcher does not have anything for Memory (and | |
1247 // does not handle DAGs), I have to match the Memory input myself. If the | |
1248 // Tree root is a Store, I require all Loads to have the identical memory. | |
1249 Node *Matcher::Label_Root( const Node *n, State *svec, Node *control, const Node *mem){ | |
1250 // Since Label_Root is a recursive function, its possible that we might run | |
1251 // out of stack space. See bugs 6272980 & 6227033 for more info. | |
1252 LabelRootDepth++; | |
1253 if (LabelRootDepth > MaxLabelRootDepth) { | |
1254 C->record_method_not_compilable_all_tiers("Out of stack space, increase MaxLabelRootDepth"); | |
1255 return NULL; | |
1256 } | |
1257 uint care = 0; // Edges matcher cares about | |
1258 uint cnt = n->req(); | |
1259 uint i = 0; | |
1260 | |
1261 // Examine children for memory state | |
1262 // Can only subsume a child into your match-tree if that child's memory state | |
1263 // is not modified along the path to another input. | |
1264 // It is unsafe even if the other inputs are separate roots. | |
1265 Node *input_mem = NULL; | |
1266 for( i = 1; i < cnt; i++ ) { | |
1267 if( !n->match_edge(i) ) continue; | |
1268 Node *m = n->in(i); // Get ith input | |
1269 assert( m, "expect non-null children" ); | |
1270 if( m->is_Load() ) { | |
1271 if( input_mem == NULL ) { | |
1272 input_mem = m->in(MemNode::Memory); | |
1273 } else if( input_mem != m->in(MemNode::Memory) ) { | |
1274 input_mem = NodeSentinel; | |
1275 } | |
1276 } | |
1277 } | |
1278 | |
1279 for( i = 1; i < cnt; i++ ){// For my children | |
1280 if( !n->match_edge(i) ) continue; | |
1281 Node *m = n->in(i); // Get ith input | |
1282 // Allocate states out of a private arena | |
1283 State *s = new (&_states_arena) State; | |
1284 svec->_kids[care++] = s; | |
1285 assert( care <= 2, "binary only for now" ); | |
1286 | |
1287 // Recursively label the State tree. | |
1288 s->_kids[0] = NULL; | |
1289 s->_kids[1] = NULL; | |
1290 s->_leaf = m; | |
1291 | |
1292 // Check for leaves of the State Tree; things that cannot be a part of | |
1293 // the current tree. If it finds any, that value is matched as a | |
1294 // register operand. If not, then the normal matching is used. | |
1295 if( match_into_reg(n, m, control, i, is_shared(m)) || | |
1296 // | |
1297 // Stop recursion if this is LoadNode and the root of this tree is a | |
1298 // StoreNode and the load & store have different memories. | |
1299 ((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) || | |
1300 // Can NOT include the match of a subtree when its memory state | |
1301 // is used by any of the other subtrees | |
1302 (input_mem == NodeSentinel) ) { | |
1303 #ifndef PRODUCT | |
1304 // Print when we exclude matching due to different memory states at input-loads | |
1305 if( PrintOpto && (Verbose && WizardMode) && (input_mem == NodeSentinel) | |
1306 && !((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) ) { | |
1307 tty->print_cr("invalid input_mem"); | |
1308 } | |
1309 #endif | |
1310 // Switch to a register-only opcode; this value must be in a register | |
1311 // and cannot be subsumed as part of a larger instruction. | |
1312 s->DFA( m->ideal_reg(), m ); | |
1313 | |
1314 } else { | |
1315 // If match tree has no control and we do, adopt it for entire tree | |
1316 if( control == NULL && m->in(0) != NULL && m->req() > 1 ) | |
1317 control = m->in(0); // Pick up control | |
1318 // Else match as a normal part of the match tree. | |
1319 control = Label_Root(m,s,control,mem); | |
1320 if (C->failing()) return NULL; | |
1321 } | |
1322 } | |
1323 | |
1324 | |
1325 // Call DFA to match this node, and return | |
1326 svec->DFA( n->Opcode(), n ); | |
1327 | |
1328 #ifdef ASSERT | |
1329 uint x; | |
1330 for( x = 0; x < _LAST_MACH_OPER; x++ ) | |
1331 if( svec->valid(x) ) | |
1332 break; | |
1333 | |
1334 if (x >= _LAST_MACH_OPER) { | |
1335 n->dump(); | |
1336 svec->dump(); | |
1337 assert( false, "bad AD file" ); | |
1338 } | |
1339 #endif | |
1340 return control; | |
1341 } | |
1342 | |
1343 | |
1344 // Con nodes reduced using the same rule can share their MachNode | |
1345 // which reduces the number of copies of a constant in the final | |
1346 // program. The register allocator is free to split uses later to | |
1347 // split live ranges. | |
1348 MachNode* Matcher::find_shared_constant(Node* leaf, uint rule) { | |
1349 if (!leaf->is_Con()) return NULL; | |
1350 | |
1351 // See if this Con has already been reduced using this rule. | |
1352 if (_shared_constants.Size() <= leaf->_idx) return NULL; | |
1353 MachNode* last = (MachNode*)_shared_constants.at(leaf->_idx); | |
1354 if (last != NULL && rule == last->rule()) { | |
1355 // Get the new space root. | |
1356 Node* xroot = new_node(C->root()); | |
1357 if (xroot == NULL) { | |
1358 // This shouldn't happen give the order of matching. | |
1359 return NULL; | |
1360 } | |
1361 | |
1362 // Shared constants need to have their control be root so they | |
1363 // can be scheduled properly. | |
1364 Node* control = last->in(0); | |
1365 if (control != xroot) { | |
1366 if (control == NULL || control == C->root()) { | |
1367 last->set_req(0, xroot); | |
1368 } else { | |
1369 assert(false, "unexpected control"); | |
1370 return NULL; | |
1371 } | |
1372 } | |
1373 return last; | |
1374 } | |
1375 return NULL; | |
1376 } | |
1377 | |
1378 | |
1379 //------------------------------ReduceInst------------------------------------- | |
1380 // Reduce a State tree (with given Control) into a tree of MachNodes. | |
1381 // This routine (and it's cohort ReduceOper) convert Ideal Nodes into | |
1382 // complicated machine Nodes. Each MachNode covers some tree of Ideal Nodes. | |
1383 // Each MachNode has a number of complicated MachOper operands; each | |
1384 // MachOper also covers a further tree of Ideal Nodes. | |
1385 | |
1386 // The root of the Ideal match tree is always an instruction, so we enter | |
1387 // the recursion here. After building the MachNode, we need to recurse | |
1388 // the tree checking for these cases: | |
1389 // (1) Child is an instruction - | |
1390 // Build the instruction (recursively), add it as an edge. | |
1391 // Build a simple operand (register) to hold the result of the instruction. | |
1392 // (2) Child is an interior part of an instruction - | |
1393 // Skip over it (do nothing) | |
1394 // (3) Child is the start of a operand - | |
1395 // Build the operand, place it inside the instruction | |
1396 // Call ReduceOper. | |
1397 MachNode *Matcher::ReduceInst( State *s, int rule, Node *&mem ) { | |
1398 assert( rule >= NUM_OPERANDS, "called with operand rule" ); | |
1399 | |
1400 MachNode* shared_con = find_shared_constant(s->_leaf, rule); | |
1401 if (shared_con != NULL) { | |
1402 return shared_con; | |
1403 } | |
1404 | |
1405 // Build the object to represent this state & prepare for recursive calls | |
1406 MachNode *mach = s->MachNodeGenerator( rule, C ); | |
1407 mach->_opnds[0] = s->MachOperGenerator( _reduceOp[rule], C ); | |
1408 assert( mach->_opnds[0] != NULL, "Missing result operand" ); | |
1409 Node *leaf = s->_leaf; | |
1410 // Check for instruction or instruction chain rule | |
1411 if( rule >= _END_INST_CHAIN_RULE || rule < _BEGIN_INST_CHAIN_RULE ) { | |
1412 // Instruction | |
1413 mach->add_req( leaf->in(0) ); // Set initial control | |
1414 // Reduce interior of complex instruction | |
1415 ReduceInst_Interior( s, rule, mem, mach, 1 ); | |
1416 } else { | |
1417 // Instruction chain rules are data-dependent on their inputs | |
1418 mach->add_req(0); // Set initial control to none | |
1419 ReduceInst_Chain_Rule( s, rule, mem, mach ); | |
1420 } | |
1421 | |
1422 // If a Memory was used, insert a Memory edge | |
1423 if( mem != (Node*)1 ) | |
1424 mach->ins_req(MemNode::Memory,mem); | |
1425 | |
1426 // If the _leaf is an AddP, insert the base edge | |
1427 if( leaf->Opcode() == Op_AddP ) | |
1428 mach->ins_req(AddPNode::Base,leaf->in(AddPNode::Base)); | |
1429 | |
1430 uint num_proj = _proj_list.size(); | |
1431 | |
1432 // Perform any 1-to-many expansions required | |
1433 MachNode *ex = mach->Expand(s,_proj_list); | |
1434 if( ex != mach ) { | |
1435 assert(ex->ideal_reg() == mach->ideal_reg(), "ideal types should match"); | |
1436 if( ex->in(1)->is_Con() ) | |
1437 ex->in(1)->set_req(0, C->root()); | |
1438 // Remove old node from the graph | |
1439 for( uint i=0; i<mach->req(); i++ ) { | |
1440 mach->set_req(i,NULL); | |
1441 } | |
1442 } | |
1443 | |
1444 // PhaseChaitin::fixup_spills will sometimes generate spill code | |
1445 // via the matcher. By the time, nodes have been wired into the CFG, | |
1446 // and any further nodes generated by expand rules will be left hanging | |
1447 // in space, and will not get emitted as output code. Catch this. | |
1448 // Also, catch any new register allocation constraints ("projections") | |
1449 // generated belatedly during spill code generation. | |
1450 if (_allocation_started) { | |
1451 guarantee(ex == mach, "no expand rules during spill generation"); | |
1452 guarantee(_proj_list.size() == num_proj, "no allocation during spill generation"); | |
1453 } | |
1454 | |
1455 if (leaf->is_Con()) { | |
1456 // Record the con for sharing | |
1457 _shared_constants.map(leaf->_idx, ex); | |
1458 } | |
1459 | |
1460 return ex; | |
1461 } | |
1462 | |
1463 void Matcher::ReduceInst_Chain_Rule( State *s, int rule, Node *&mem, MachNode *mach ) { | |
1464 // 'op' is what I am expecting to receive | |
1465 int op = _leftOp[rule]; | |
1466 // Operand type to catch childs result | |
1467 // This is what my child will give me. | |
1468 int opnd_class_instance = s->_rule[op]; | |
1469 // Choose between operand class or not. | |
1470 // This is what I will recieve. | |
1471 int catch_op = (FIRST_OPERAND_CLASS <= op && op < NUM_OPERANDS) ? opnd_class_instance : op; | |
1472 // New rule for child. Chase operand classes to get the actual rule. | |
1473 int newrule = s->_rule[catch_op]; | |
1474 | |
1475 if( newrule < NUM_OPERANDS ) { | |
1476 // Chain from operand or operand class, may be output of shared node | |
1477 assert( 0 <= opnd_class_instance && opnd_class_instance < NUM_OPERANDS, | |
1478 "Bad AD file: Instruction chain rule must chain from operand"); | |
1479 // Insert operand into array of operands for this instruction | |
1480 mach->_opnds[1] = s->MachOperGenerator( opnd_class_instance, C ); | |
1481 | |
1482 ReduceOper( s, newrule, mem, mach ); | |
1483 } else { | |
1484 // Chain from the result of an instruction | |
1485 assert( newrule >= _LAST_MACH_OPER, "Do NOT chain from internal operand"); | |
1486 mach->_opnds[1] = s->MachOperGenerator( _reduceOp[catch_op], C ); | |
1487 Node *mem1 = (Node*)1; | |
1488 mach->add_req( ReduceInst(s, newrule, mem1) ); | |
1489 } | |
1490 return; | |
1491 } | |
1492 | |
1493 | |
1494 uint Matcher::ReduceInst_Interior( State *s, int rule, Node *&mem, MachNode *mach, uint num_opnds ) { | |
1495 if( s->_leaf->is_Load() ) { | |
1496 Node *mem2 = s->_leaf->in(MemNode::Memory); | |
1497 assert( mem == (Node*)1 || mem == mem2, "multiple Memories being matched at once?" ); | |
1498 mem = mem2; | |
1499 } | |
1500 if( s->_leaf->in(0) != NULL && s->_leaf->req() > 1) { | |
1501 if( mach->in(0) == NULL ) | |
1502 mach->set_req(0, s->_leaf->in(0)); | |
1503 } | |
1504 | |
1505 // Now recursively walk the state tree & add operand list. | |
1506 for( uint i=0; i<2; i++ ) { // binary tree | |
1507 State *newstate = s->_kids[i]; | |
1508 if( newstate == NULL ) break; // Might only have 1 child | |
1509 // 'op' is what I am expecting to receive | |
1510 int op; | |
1511 if( i == 0 ) { | |
1512 op = _leftOp[rule]; | |
1513 } else { | |
1514 op = _rightOp[rule]; | |
1515 } | |
1516 // Operand type to catch childs result | |
1517 // This is what my child will give me. | |
1518 int opnd_class_instance = newstate->_rule[op]; | |
1519 // Choose between operand class or not. | |
1520 // This is what I will receive. | |
1521 int catch_op = (op >= FIRST_OPERAND_CLASS && op < NUM_OPERANDS) ? opnd_class_instance : op; | |
1522 // New rule for child. Chase operand classes to get the actual rule. | |
1523 int newrule = newstate->_rule[catch_op]; | |
1524 | |
1525 if( newrule < NUM_OPERANDS ) { // Operand/operandClass or internalOp/instruction? | |
1526 // Operand/operandClass | |
1527 // Insert operand into array of operands for this instruction | |
1528 mach->_opnds[num_opnds++] = newstate->MachOperGenerator( opnd_class_instance, C ); | |
1529 ReduceOper( newstate, newrule, mem, mach ); | |
1530 | |
1531 } else { // Child is internal operand or new instruction | |
1532 if( newrule < _LAST_MACH_OPER ) { // internal operand or instruction? | |
1533 // internal operand --> call ReduceInst_Interior | |
1534 // Interior of complex instruction. Do nothing but recurse. | |
1535 num_opnds = ReduceInst_Interior( newstate, newrule, mem, mach, num_opnds ); | |
1536 } else { | |
1537 // instruction --> call build operand( ) to catch result | |
1538 // --> ReduceInst( newrule ) | |
1539 mach->_opnds[num_opnds++] = s->MachOperGenerator( _reduceOp[catch_op], C ); | |
1540 Node *mem1 = (Node*)1; | |
1541 mach->add_req( ReduceInst( newstate, newrule, mem1 ) ); | |
1542 } | |
1543 } | |
1544 assert( mach->_opnds[num_opnds-1], "" ); | |
1545 } | |
1546 return num_opnds; | |
1547 } | |
1548 | |
1549 // This routine walks the interior of possible complex operands. | |
1550 // At each point we check our children in the match tree: | |
1551 // (1) No children - | |
1552 // We are a leaf; add _leaf field as an input to the MachNode | |
1553 // (2) Child is an internal operand - | |
1554 // Skip over it ( do nothing ) | |
1555 // (3) Child is an instruction - | |
1556 // Call ReduceInst recursively and | |
1557 // and instruction as an input to the MachNode | |
1558 void Matcher::ReduceOper( State *s, int rule, Node *&mem, MachNode *mach ) { | |
1559 assert( rule < _LAST_MACH_OPER, "called with operand rule" ); | |
1560 State *kid = s->_kids[0]; | |
1561 assert( kid == NULL || s->_leaf->in(0) == NULL, "internal operands have no control" ); | |
1562 | |
1563 // Leaf? And not subsumed? | |
1564 if( kid == NULL && !_swallowed[rule] ) { | |
1565 mach->add_req( s->_leaf ); // Add leaf pointer | |
1566 return; // Bail out | |
1567 } | |
1568 | |
1569 if( s->_leaf->is_Load() ) { | |
1570 assert( mem == (Node*)1, "multiple Memories being matched at once?" ); | |
1571 mem = s->_leaf->in(MemNode::Memory); | |
1572 } | |
1573 if( s->_leaf->in(0) && s->_leaf->req() > 1) { | |
1574 if( !mach->in(0) ) | |
1575 mach->set_req(0,s->_leaf->in(0)); | |
1576 else { | |
1577 assert( s->_leaf->in(0) == mach->in(0), "same instruction, differing controls?" ); | |
1578 } | |
1579 } | |
1580 | |
1581 for( uint i=0; kid != NULL && i<2; kid = s->_kids[1], i++ ) { // binary tree | |
1582 int newrule; | |
1583 if( i == 0 ) | |
1584 newrule = kid->_rule[_leftOp[rule]]; | |
1585 else | |
1586 newrule = kid->_rule[_rightOp[rule]]; | |
1587 | |
1588 if( newrule < _LAST_MACH_OPER ) { // Operand or instruction? | |
1589 // Internal operand; recurse but do nothing else | |
1590 ReduceOper( kid, newrule, mem, mach ); | |
1591 | |
1592 } else { // Child is a new instruction | |
1593 // Reduce the instruction, and add a direct pointer from this | |
1594 // machine instruction to the newly reduced one. | |
1595 Node *mem1 = (Node*)1; | |
1596 mach->add_req( ReduceInst( kid, newrule, mem1 ) ); | |
1597 } | |
1598 } | |
1599 } | |
1600 | |
1601 | |
1602 // ------------------------------------------------------------------------- | |
1603 // Java-Java calling convention | |
1604 // (what you use when Java calls Java) | |
1605 | |
1606 //------------------------------find_receiver---------------------------------- | |
1607 // For a given signature, return the OptoReg for parameter 0. | |
1608 OptoReg::Name Matcher::find_receiver( bool is_outgoing ) { | |
1609 VMRegPair regs; | |
1610 BasicType sig_bt = T_OBJECT; | |
1611 calling_convention(&sig_bt, ®s, 1, is_outgoing); | |
1612 // Return argument 0 register. In the LP64 build pointers | |
1613 // take 2 registers, but the VM wants only the 'main' name. | |
1614 return OptoReg::as_OptoReg(regs.first()); | |
1615 } | |
1616 | |
1617 // A method-klass-holder may be passed in the inline_cache_reg | |
1618 // and then expanded into the inline_cache_reg and a method_oop register | |
1619 // defined in ad_<arch>.cpp | |
1620 | |
1621 | |
1622 //------------------------------find_shared------------------------------------ | |
1623 // Set bits if Node is shared or otherwise a root | |
1624 void Matcher::find_shared( Node *n ) { | |
1625 // Allocate stack of size C->unique() * 2 to avoid frequent realloc | |
1626 MStack mstack(C->unique() * 2); | |
1627 mstack.push(n, Visit); // Don't need to pre-visit root node | |
1628 while (mstack.is_nonempty()) { | |
1629 n = mstack.node(); // Leave node on stack | |
1630 Node_State nstate = mstack.state(); | |
1631 if (nstate == Pre_Visit) { | |
1632 if (is_visited(n)) { // Visited already? | |
1633 // Node is shared and has no reason to clone. Flag it as shared. | |
1634 // This causes it to match into a register for the sharing. | |
1635 set_shared(n); // Flag as shared and | |
1636 mstack.pop(); // remove node from stack | |
1637 continue; | |
1638 } | |
1639 nstate = Visit; // Not already visited; so visit now | |
1640 } | |
1641 if (nstate == Visit) { | |
1642 mstack.set_state(Post_Visit); | |
1643 set_visited(n); // Flag as visited now | |
1644 bool mem_op = false; | |
1645 | |
1646 switch( n->Opcode() ) { // Handle some opcodes special | |
1647 case Op_Phi: // Treat Phis as shared roots | |
1648 case Op_Parm: | |
1649 case Op_Proj: // All handled specially during matching | |
1650 set_shared(n); | |
1651 set_dontcare(n); | |
1652 break; | |
1653 case Op_If: | |
1654 case Op_CountedLoopEnd: | |
1655 mstack.set_state(Alt_Post_Visit); // Alternative way | |
1656 // Convert (If (Bool (CmpX A B))) into (If (Bool) (CmpX A B)). Helps | |
1657 // with matching cmp/branch in 1 instruction. The Matcher needs the | |
1658 // Bool and CmpX side-by-side, because it can only get at constants | |
1659 // that are at the leaves of Match trees, and the Bool's condition acts | |
1660 // as a constant here. | |
1661 mstack.push(n->in(1), Visit); // Clone the Bool | |
1662 mstack.push(n->in(0), Pre_Visit); // Visit control input | |
1663 continue; // while (mstack.is_nonempty()) | |
1664 case Op_ConvI2D: // These forms efficiently match with a prior | |
1665 case Op_ConvI2F: // Load but not a following Store | |
1666 if( n->in(1)->is_Load() && // Prior load | |
1667 n->outcnt() == 1 && // Not already shared | |
1668 n->unique_out()->is_Store() ) // Following store | |
1669 set_shared(n); // Force it to be a root | |
1670 break; | |
1671 case Op_ReverseBytesI: | |
1672 case Op_ReverseBytesL: | |
1673 if( n->in(1)->is_Load() && // Prior load | |
1674 n->outcnt() == 1 ) // Not already shared | |
1675 set_shared(n); // Force it to be a root | |
1676 break; | |
1677 case Op_BoxLock: // Cant match until we get stack-regs in ADLC | |
1678 case Op_IfFalse: | |
1679 case Op_IfTrue: | |
1680 case Op_MachProj: | |
1681 case Op_MergeMem: | |
1682 case Op_Catch: | |
1683 case Op_CatchProj: | |
1684 case Op_CProj: | |
1685 case Op_JumpProj: | |
1686 case Op_JProj: | |
1687 case Op_NeverBranch: | |
1688 set_dontcare(n); | |
1689 break; | |
1690 case Op_Jump: | |
1691 mstack.push(n->in(1), Visit); // Switch Value | |
1692 mstack.push(n->in(0), Pre_Visit); // Visit Control input | |
1693 continue; // while (mstack.is_nonempty()) | |
1694 case Op_StrComp: | |
1695 set_shared(n); // Force result into register (it will be anyways) | |
1696 break; | |
1697 case Op_ConP: { // Convert pointers above the centerline to NUL | |
1698 TypeNode *tn = n->as_Type(); // Constants derive from type nodes | |
1699 const TypePtr* tp = tn->type()->is_ptr(); | |
1700 if (tp->_ptr == TypePtr::AnyNull) { | |
1701 tn->set_type(TypePtr::NULL_PTR); | |
1702 } | |
1703 break; | |
1704 } | |
1705 case Op_Binary: // These are introduced in the Post_Visit state. | |
1706 ShouldNotReachHere(); | |
1707 break; | |
1708 case Op_StoreB: // Do match these, despite no ideal reg | |
1709 case Op_StoreC: | |
1710 case Op_StoreCM: | |
1711 case Op_StoreD: | |
1712 case Op_StoreF: | |
1713 case Op_StoreI: | |
1714 case Op_StoreL: | |
1715 case Op_StoreP: | |
1716 case Op_Store16B: | |
1717 case Op_Store8B: | |
1718 case Op_Store4B: | |
1719 case Op_Store8C: | |
1720 case Op_Store4C: | |
1721 case Op_Store2C: | |
1722 case Op_Store4I: | |
1723 case Op_Store2I: | |
1724 case Op_Store2L: | |
1725 case Op_Store4F: | |
1726 case Op_Store2F: | |
1727 case Op_Store2D: | |
1728 case Op_ClearArray: | |
1729 case Op_SafePoint: | |
1730 mem_op = true; | |
1731 break; | |
1732 case Op_LoadB: | |
1733 case Op_LoadC: | |
1734 case Op_LoadD: | |
1735 case Op_LoadF: | |
1736 case Op_LoadI: | |
1737 case Op_LoadKlass: | |
1738 case Op_LoadL: | |
1739 case Op_LoadS: | |
1740 case Op_LoadP: | |
1741 case Op_LoadRange: | |
1742 case Op_LoadD_unaligned: | |
1743 case Op_LoadL_unaligned: | |
1744 case Op_Load16B: | |
1745 case Op_Load8B: | |
1746 case Op_Load4B: | |
1747 case Op_Load4C: | |
1748 case Op_Load2C: | |
1749 case Op_Load8C: | |
1750 case Op_Load8S: | |
1751 case Op_Load4S: | |
1752 case Op_Load2S: | |
1753 case Op_Load4I: | |
1754 case Op_Load2I: | |
1755 case Op_Load2L: | |
1756 case Op_Load4F: | |
1757 case Op_Load2F: | |
1758 case Op_Load2D: | |
1759 mem_op = true; | |
1760 // Must be root of match tree due to prior load conflict | |
1761 if( C->subsume_loads() == false ) { | |
1762 set_shared(n); | |
1763 } | |
1764 // Fall into default case | |
1765 default: | |
1766 if( !n->ideal_reg() ) | |
1767 set_dontcare(n); // Unmatchable Nodes | |
1768 } // end_switch | |
1769 | |
1770 for(int i = n->req() - 1; i >= 0; --i) { // For my children | |
1771 Node *m = n->in(i); // Get ith input | |
1772 if (m == NULL) continue; // Ignore NULLs | |
1773 uint mop = m->Opcode(); | |
1774 | |
1775 // Must clone all producers of flags, or we will not match correctly. | |
1776 // Suppose a compare setting int-flags is shared (e.g., a switch-tree) | |
1777 // then it will match into an ideal Op_RegFlags. Alas, the fp-flags | |
1778 // are also there, so we may match a float-branch to int-flags and | |
1779 // expect the allocator to haul the flags from the int-side to the | |
1780 // fp-side. No can do. | |
1781 if( _must_clone[mop] ) { | |
1782 mstack.push(m, Visit); | |
1783 continue; // for(int i = ...) | |
1784 } | |
1785 | |
1786 // Clone addressing expressions as they are "free" in most instructions | |
1787 if( mem_op && i == MemNode::Address && mop == Op_AddP ) { | |
1788 Node *off = m->in(AddPNode::Offset); | |
1789 if( off->is_Con() ) { | |
1790 set_visited(m); // Flag as visited now | |
1791 Node *adr = m->in(AddPNode::Address); | |
1792 | |
1793 // Intel, ARM and friends can handle 2 adds in addressing mode | |
1794 if( clone_shift_expressions && adr->Opcode() == Op_AddP && | |
1795 // AtomicAdd is not an addressing expression. | |
1796 // Cheap to find it by looking for screwy base. | |
1797 !adr->in(AddPNode::Base)->is_top() ) { | |
1798 set_visited(adr); // Flag as visited now | |
1799 Node *shift = adr->in(AddPNode::Offset); | |
1800 // Check for shift by small constant as well | |
1801 if( shift->Opcode() == Op_LShiftX && shift->in(2)->is_Con() && | |
1802 shift->in(2)->get_int() <= 3 ) { | |
1803 set_visited(shift); // Flag as visited now | |
1804 mstack.push(shift->in(2), Visit); | |
1805 #ifdef _LP64 | |
1806 // Allow Matcher to match the rule which bypass | |
1807 // ConvI2L operation for an array index on LP64 | |
1808 // if the index value is positive. | |
1809 if( shift->in(1)->Opcode() == Op_ConvI2L && | |
1810 shift->in(1)->as_Type()->type()->is_long()->_lo >= 0 ) { | |
1811 set_visited(shift->in(1)); // Flag as visited now | |
1812 mstack.push(shift->in(1)->in(1), Pre_Visit); | |
1813 } else | |
1814 #endif | |
1815 mstack.push(shift->in(1), Pre_Visit); | |
1816 } else { | |
1817 mstack.push(shift, Pre_Visit); | |
1818 } | |
1819 mstack.push(adr->in(AddPNode::Address), Pre_Visit); | |
1820 mstack.push(adr->in(AddPNode::Base), Pre_Visit); | |
1821 } else { // Sparc, Alpha, PPC and friends | |
1822 mstack.push(adr, Pre_Visit); | |
1823 } | |
1824 | |
1825 // Clone X+offset as it also folds into most addressing expressions | |
1826 mstack.push(off, Visit); | |
1827 mstack.push(m->in(AddPNode::Base), Pre_Visit); | |
1828 continue; // for(int i = ...) | |
1829 } // if( off->is_Con() ) | |
1830 } // if( mem_op && | |
1831 mstack.push(m, Pre_Visit); | |
1832 } // for(int i = ...) | |
1833 } | |
1834 else if (nstate == Alt_Post_Visit) { | |
1835 mstack.pop(); // Remove node from stack | |
1836 // We cannot remove the Cmp input from the Bool here, as the Bool may be | |
1837 // shared and all users of the Bool need to move the Cmp in parallel. | |
1838 // This leaves both the Bool and the If pointing at the Cmp. To | |
1839 // prevent the Matcher from trying to Match the Cmp along both paths | |
1840 // BoolNode::match_edge always returns a zero. | |
1841 | |
1842 // We reorder the Op_If in a pre-order manner, so we can visit without | |
1843 // accidently sharing the Cmp (the Bool and the If make 2 users). | |
1844 n->add_req( n->in(1)->in(1) ); // Add the Cmp next to the Bool | |
1845 } | |
1846 else if (nstate == Post_Visit) { | |
1847 mstack.pop(); // Remove node from stack | |
1848 | |
1849 // Now hack a few special opcodes | |
1850 switch( n->Opcode() ) { // Handle some opcodes special | |
1851 case Op_StorePConditional: | |
1852 case Op_StoreLConditional: | |
1853 case Op_CompareAndSwapI: | |
1854 case Op_CompareAndSwapL: | |
1855 case Op_CompareAndSwapP: { // Convert trinary to binary-tree | |
1856 Node *newval = n->in(MemNode::ValueIn ); | |
1857 Node *oldval = n->in(LoadStoreNode::ExpectedIn); | |
1858 Node *pair = new (C, 3) BinaryNode( oldval, newval ); | |
1859 n->set_req(MemNode::ValueIn,pair); | |
1860 n->del_req(LoadStoreNode::ExpectedIn); | |
1861 break; | |
1862 } | |
1863 case Op_CMoveD: // Convert trinary to binary-tree | |
1864 case Op_CMoveF: | |
1865 case Op_CMoveI: | |
1866 case Op_CMoveL: | |
1867 case Op_CMoveP: { | |
1868 // Restructure into a binary tree for Matching. It's possible that | |
1869 // we could move this code up next to the graph reshaping for IfNodes | |
1870 // or vice-versa, but I do not want to debug this for Ladybird. | |
1871 // 10/2/2000 CNC. | |
1872 Node *pair1 = new (C, 3) BinaryNode(n->in(1),n->in(1)->in(1)); | |
1873 n->set_req(1,pair1); | |
1874 Node *pair2 = new (C, 3) BinaryNode(n->in(2),n->in(3)); | |
1875 n->set_req(2,pair2); | |
1876 n->del_req(3); | |
1877 break; | |
1878 } | |
1879 default: | |
1880 break; | |
1881 } | |
1882 } | |
1883 else { | |
1884 ShouldNotReachHere(); | |
1885 } | |
1886 } // end of while (mstack.is_nonempty()) | |
1887 } | |
1888 | |
1889 #ifdef ASSERT | |
1890 // machine-independent root to machine-dependent root | |
1891 void Matcher::dump_old2new_map() { | |
1892 _old2new_map.dump(); | |
1893 } | |
1894 #endif | |
1895 | |
1896 //---------------------------collect_null_checks------------------------------- | |
1897 // Find null checks in the ideal graph; write a machine-specific node for | |
1898 // it. Used by later implicit-null-check handling. Actually collects | |
1899 // either an IfTrue or IfFalse for the common NOT-null path, AND the ideal | |
1900 // value being tested. | |
1901 void Matcher::collect_null_checks( Node *proj ) { | |
1902 Node *iff = proj->in(0); | |
1903 if( iff->Opcode() == Op_If ) { | |
1904 // During matching If's have Bool & Cmp side-by-side | |
1905 BoolNode *b = iff->in(1)->as_Bool(); | |
1906 Node *cmp = iff->in(2); | |
1907 if( cmp->Opcode() == Op_CmpP ) { | |
1908 if( cmp->in(2)->bottom_type() == TypePtr::NULL_PTR ) { | |
1909 | |
1910 if( proj->Opcode() == Op_IfTrue ) { | |
1911 extern int all_null_checks_found; | |
1912 all_null_checks_found++; | |
1913 if( b->_test._test == BoolTest::ne ) { | |
1914 _null_check_tests.push(proj); | |
1915 _null_check_tests.push(cmp->in(1)); | |
1916 } | |
1917 } else { | |
1918 assert( proj->Opcode() == Op_IfFalse, "" ); | |
1919 if( b->_test._test == BoolTest::eq ) { | |
1920 _null_check_tests.push(proj); | |
1921 _null_check_tests.push(cmp->in(1)); | |
1922 } | |
1923 } | |
1924 } | |
1925 } | |
1926 } | |
1927 } | |
1928 | |
1929 //---------------------------validate_null_checks------------------------------ | |
1930 // Its possible that the value being NULL checked is not the root of a match | |
1931 // tree. If so, I cannot use the value in an implicit null check. | |
1932 void Matcher::validate_null_checks( ) { | |
1933 uint cnt = _null_check_tests.size(); | |
1934 for( uint i=0; i < cnt; i+=2 ) { | |
1935 Node *test = _null_check_tests[i]; | |
1936 Node *val = _null_check_tests[i+1]; | |
1937 if (has_new_node(val)) { | |
1938 // Is a match-tree root, so replace with the matched value | |
1939 _null_check_tests.map(i+1, new_node(val)); | |
1940 } else { | |
1941 // Yank from candidate list | |
1942 _null_check_tests.map(i+1,_null_check_tests[--cnt]); | |
1943 _null_check_tests.map(i,_null_check_tests[--cnt]); | |
1944 _null_check_tests.pop(); | |
1945 _null_check_tests.pop(); | |
1946 i-=2; | |
1947 } | |
1948 } | |
1949 } | |
1950 | |
1951 | |
1952 // Used by the DFA in dfa_sparc.cpp. Check for a prior FastLock | |
1953 // acting as an Acquire and thus we don't need an Acquire here. We | |
1954 // retain the Node to act as a compiler ordering barrier. | |
1955 bool Matcher::prior_fast_lock( const Node *acq ) { | |
1956 Node *r = acq->in(0); | |
1957 if( !r->is_Region() || r->req() <= 1 ) return false; | |
1958 Node *proj = r->in(1); | |
1959 if( !proj->is_Proj() ) return false; | |
1960 Node *call = proj->in(0); | |
1961 if( !call->is_Call() || call->as_Call()->entry_point() != OptoRuntime::complete_monitor_locking_Java() ) | |
1962 return false; | |
1963 | |
1964 return true; | |
1965 } | |
1966 | |
1967 // Used by the DFA in dfa_sparc.cpp. Check for a following FastUnLock | |
1968 // acting as a Release and thus we don't need a Release here. We | |
1969 // retain the Node to act as a compiler ordering barrier. | |
1970 bool Matcher::post_fast_unlock( const Node *rel ) { | |
1971 Compile *C = Compile::current(); | |
1972 assert( rel->Opcode() == Op_MemBarRelease, "" ); | |
1973 const MemBarReleaseNode *mem = (const MemBarReleaseNode*)rel; | |
1974 DUIterator_Fast imax, i = mem->fast_outs(imax); | |
1975 Node *ctrl = NULL; | |
1976 while( true ) { | |
1977 ctrl = mem->fast_out(i); // Throw out-of-bounds if proj not found | |
1978 assert( ctrl->is_Proj(), "only projections here" ); | |
1979 ProjNode *proj = (ProjNode*)ctrl; | |
1980 if( proj->_con == TypeFunc::Control && | |
1981 !C->node_arena()->contains(ctrl) ) // Unmatched old-space only | |
1982 break; | |
1983 i++; | |
1984 } | |
1985 Node *iff = NULL; | |
1986 for( DUIterator_Fast jmax, j = ctrl->fast_outs(jmax); j < jmax; j++ ) { | |
1987 Node *x = ctrl->fast_out(j); | |
1988 if( x->is_If() && x->req() > 1 && | |
1989 !C->node_arena()->contains(x) ) { // Unmatched old-space only | |
1990 iff = x; | |
1991 break; | |
1992 } | |
1993 } | |
1994 if( !iff ) return false; | |
1995 Node *bol = iff->in(1); | |
1996 // The iff might be some random subclass of If or bol might be Con-Top | |
1997 if (!bol->is_Bool()) return false; | |
1998 assert( bol->req() > 1, "" ); | |
1999 return (bol->in(1)->Opcode() == Op_FastUnlock); | |
2000 } | |
2001 | |
2002 // Used by the DFA in dfa_xxx.cpp. Check for a following barrier or | |
2003 // atomic instruction acting as a store_load barrier without any | |
2004 // intervening volatile load, and thus we don't need a barrier here. | |
2005 // We retain the Node to act as a compiler ordering barrier. | |
2006 bool Matcher::post_store_load_barrier(const Node *vmb) { | |
2007 Compile *C = Compile::current(); | |
2008 assert( vmb->is_MemBar(), "" ); | |
2009 assert( vmb->Opcode() != Op_MemBarAcquire, "" ); | |
2010 const MemBarNode *mem = (const MemBarNode*)vmb; | |
2011 | |
2012 // Get the Proj node, ctrl, that can be used to iterate forward | |
2013 Node *ctrl = NULL; | |
2014 DUIterator_Fast imax, i = mem->fast_outs(imax); | |
2015 while( true ) { | |
2016 ctrl = mem->fast_out(i); // Throw out-of-bounds if proj not found | |
2017 assert( ctrl->is_Proj(), "only projections here" ); | |
2018 ProjNode *proj = (ProjNode*)ctrl; | |
2019 if( proj->_con == TypeFunc::Control && | |
2020 !C->node_arena()->contains(ctrl) ) // Unmatched old-space only | |
2021 break; | |
2022 i++; | |
2023 } | |
2024 | |
2025 for( DUIterator_Fast jmax, j = ctrl->fast_outs(jmax); j < jmax; j++ ) { | |
2026 Node *x = ctrl->fast_out(j); | |
2027 int xop = x->Opcode(); | |
2028 | |
2029 // We don't need current barrier if we see another or a lock | |
2030 // before seeing volatile load. | |
2031 // | |
2032 // Op_Fastunlock previously appeared in the Op_* list below. | |
2033 // With the advent of 1-0 lock operations we're no longer guaranteed | |
2034 // that a monitor exit operation contains a serializing instruction. | |
2035 | |
2036 if (xop == Op_MemBarVolatile || | |
2037 xop == Op_FastLock || | |
2038 xop == Op_CompareAndSwapL || | |
2039 xop == Op_CompareAndSwapP || | |
2040 xop == Op_CompareAndSwapI) | |
2041 return true; | |
2042 | |
2043 if (x->is_MemBar()) { | |
2044 // We must retain this membar if there is an upcoming volatile | |
2045 // load, which will be preceded by acquire membar. | |
2046 if (xop == Op_MemBarAcquire) | |
2047 return false; | |
2048 // For other kinds of barriers, check by pretending we | |
2049 // are them, and seeing if we can be removed. | |
2050 else | |
2051 return post_store_load_barrier((const MemBarNode*)x); | |
2052 } | |
2053 | |
2054 // Delicate code to detect case of an upcoming fastlock block | |
2055 if( x->is_If() && x->req() > 1 && | |
2056 !C->node_arena()->contains(x) ) { // Unmatched old-space only | |
2057 Node *iff = x; | |
2058 Node *bol = iff->in(1); | |
2059 // The iff might be some random subclass of If or bol might be Con-Top | |
2060 if (!bol->is_Bool()) return false; | |
2061 assert( bol->req() > 1, "" ); | |
2062 return (bol->in(1)->Opcode() == Op_FastUnlock); | |
2063 } | |
2064 // probably not necessary to check for these | |
2065 if (x->is_Call() || x->is_SafePoint() || x->is_block_proj()) | |
2066 return false; | |
2067 } | |
2068 return false; | |
2069 } | |
2070 | |
2071 //============================================================================= | |
2072 //---------------------------State--------------------------------------------- | |
2073 State::State(void) { | |
2074 #ifdef ASSERT | |
2075 _id = 0; | |
2076 _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); | |
2077 _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); | |
2078 //memset(_cost, -1, sizeof(_cost)); | |
2079 //memset(_rule, -1, sizeof(_rule)); | |
2080 #endif | |
2081 memset(_valid, 0, sizeof(_valid)); | |
2082 } | |
2083 | |
2084 #ifdef ASSERT | |
2085 State::~State() { | |
2086 _id = 99; | |
2087 _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); | |
2088 _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); | |
2089 memset(_cost, -3, sizeof(_cost)); | |
2090 memset(_rule, -3, sizeof(_rule)); | |
2091 } | |
2092 #endif | |
2093 | |
2094 #ifndef PRODUCT | |
2095 //---------------------------dump---------------------------------------------- | |
2096 void State::dump() { | |
2097 tty->print("\n"); | |
2098 dump(0); | |
2099 } | |
2100 | |
2101 void State::dump(int depth) { | |
2102 for( int j = 0; j < depth; j++ ) | |
2103 tty->print(" "); | |
2104 tty->print("--N: "); | |
2105 _leaf->dump(); | |
2106 uint i; | |
2107 for( i = 0; i < _LAST_MACH_OPER; i++ ) | |
2108 // Check for valid entry | |
2109 if( valid(i) ) { | |
2110 for( int j = 0; j < depth; j++ ) | |
2111 tty->print(" "); | |
2112 assert(_cost[i] != max_juint, "cost must be a valid value"); | |
2113 assert(_rule[i] < _last_Mach_Node, "rule[i] must be valid rule"); | |
2114 tty->print_cr("%s %d %s", | |
2115 ruleName[i], _cost[i], ruleName[_rule[i]] ); | |
2116 } | |
2117 tty->print_cr(""); | |
2118 | |
2119 for( i=0; i<2; i++ ) | |
2120 if( _kids[i] ) | |
2121 _kids[i]->dump(depth+1); | |
2122 } | |
2123 #endif |