Mercurial > hg > graal-compiler
comparison src/share/vm/opto/mulnode.cpp @ 0:a61af66fc99e jdk7-b24
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author | duke |
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date | Sat, 01 Dec 2007 00:00:00 +0000 |
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children | f3de1255b035 |
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1 /* | |
2 * Copyright 1997-2006 Sun Microsystems, Inc. All Rights Reserved. | |
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
21 * have any questions. | |
22 * | |
23 */ | |
24 | |
25 // Portions of code courtesy of Clifford Click | |
26 | |
27 #include "incls/_precompiled.incl" | |
28 #include "incls/_mulnode.cpp.incl" | |
29 | |
30 | |
31 //============================================================================= | |
32 //------------------------------hash------------------------------------------- | |
33 // Hash function over MulNodes. Needs to be commutative; i.e., I swap | |
34 // (commute) inputs to MulNodes willy-nilly so the hash function must return | |
35 // the same value in the presence of edge swapping. | |
36 uint MulNode::hash() const { | |
37 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode(); | |
38 } | |
39 | |
40 //------------------------------Identity--------------------------------------- | |
41 // Multiplying a one preserves the other argument | |
42 Node *MulNode::Identity( PhaseTransform *phase ) { | |
43 register const Type *one = mul_id(); // The multiplicative identity | |
44 if( phase->type( in(1) )->higher_equal( one ) ) return in(2); | |
45 if( phase->type( in(2) )->higher_equal( one ) ) return in(1); | |
46 | |
47 return this; | |
48 } | |
49 | |
50 //------------------------------Ideal------------------------------------------ | |
51 // We also canonicalize the Node, moving constants to the right input, | |
52 // and flatten expressions (so that 1+x+2 becomes x+3). | |
53 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
54 const Type *t1 = phase->type( in(1) ); | |
55 const Type *t2 = phase->type( in(2) ); | |
56 Node *progress = NULL; // Progress flag | |
57 // We are OK if right is a constant, or right is a load and | |
58 // left is a non-constant. | |
59 if( !(t2->singleton() || | |
60 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) { | |
61 if( t1->singleton() || // Left input is a constant? | |
62 // Otherwise, sort inputs (commutativity) to help value numbering. | |
63 (in(1)->_idx > in(2)->_idx) ) { | |
64 swap_edges(1, 2); | |
65 const Type *t = t1; | |
66 t1 = t2; | |
67 t2 = t; | |
68 progress = this; // Made progress | |
69 } | |
70 } | |
71 | |
72 // If the right input is a constant, and the left input is a product of a | |
73 // constant, flatten the expression tree. | |
74 uint op = Opcode(); | |
75 if( t2->singleton() && // Right input is a constant? | |
76 op != Op_MulF && // Float & double cannot reassociate | |
77 op != Op_MulD ) { | |
78 if( t2 == Type::TOP ) return NULL; | |
79 Node *mul1 = in(1); | |
80 #ifdef ASSERT | |
81 // Check for dead loop | |
82 int op1 = mul1->Opcode(); | |
83 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) || | |
84 ( op1 == mul_opcode() || op1 == add_opcode() ) && | |
85 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) || | |
86 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) ) | |
87 assert(false, "dead loop in MulNode::Ideal"); | |
88 #endif | |
89 | |
90 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply? | |
91 // Mul of a constant? | |
92 const Type *t12 = phase->type( mul1->in(2) ); | |
93 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant? | |
94 // Compute new constant; check for overflow | |
95 const Type *tcon01 = mul1->as_Mul()->mul_ring(t2,t12); | |
96 if( tcon01->singleton() ) { | |
97 // The Mul of the flattened expression | |
98 set_req(1, mul1->in(1)); | |
99 set_req(2, phase->makecon( tcon01 )); | |
100 t2 = tcon01; | |
101 progress = this; // Made progress | |
102 } | |
103 } | |
104 } | |
105 // If the right input is a constant, and the left input is an add of a | |
106 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0 | |
107 const Node *add1 = in(1); | |
108 if( add1->Opcode() == add_opcode() ) { // Left input is an add? | |
109 // Add of a constant? | |
110 const Type *t12 = phase->type( add1->in(2) ); | |
111 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant? | |
112 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" ); | |
113 // Compute new constant; check for overflow | |
114 const Type *tcon01 = mul_ring(t2,t12); | |
115 if( tcon01->singleton() ) { | |
116 | |
117 // Convert (X+con1)*con0 into X*con0 | |
118 Node *mul = clone(); // mul = ()*con0 | |
119 mul->set_req(1,add1->in(1)); // mul = X*con0 | |
120 mul = phase->transform(mul); | |
121 | |
122 Node *add2 = add1->clone(); | |
123 add2->set_req(1, mul); // X*con0 + con0*con1 | |
124 add2->set_req(2, phase->makecon(tcon01) ); | |
125 progress = add2; | |
126 } | |
127 } | |
128 } // End of is left input an add | |
129 } // End of is right input a Mul | |
130 | |
131 return progress; | |
132 } | |
133 | |
134 //------------------------------Value----------------------------------------- | |
135 const Type *MulNode::Value( PhaseTransform *phase ) const { | |
136 const Type *t1 = phase->type( in(1) ); | |
137 const Type *t2 = phase->type( in(2) ); | |
138 // Either input is TOP ==> the result is TOP | |
139 if( t1 == Type::TOP ) return Type::TOP; | |
140 if( t2 == Type::TOP ) return Type::TOP; | |
141 | |
142 // Either input is ZERO ==> the result is ZERO. | |
143 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0 | |
144 int op = Opcode(); | |
145 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) { | |
146 const Type *zero = add_id(); // The multiplicative zero | |
147 if( t1->higher_equal( zero ) ) return zero; | |
148 if( t2->higher_equal( zero ) ) return zero; | |
149 } | |
150 | |
151 // Either input is BOTTOM ==> the result is the local BOTTOM | |
152 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM ) | |
153 return bottom_type(); | |
154 | |
155 return mul_ring(t1,t2); // Local flavor of type multiplication | |
156 } | |
157 | |
158 | |
159 //============================================================================= | |
160 //------------------------------Ideal------------------------------------------ | |
161 // Check for power-of-2 multiply, then try the regular MulNode::Ideal | |
162 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
163 // Swap constant to right | |
164 jint con; | |
165 if ((con = in(1)->find_int_con(0)) != 0) { | |
166 swap_edges(1, 2); | |
167 // Finish rest of method to use info in 'con' | |
168 } else if ((con = in(2)->find_int_con(0)) == 0) { | |
169 return MulNode::Ideal(phase, can_reshape); | |
170 } | |
171 | |
172 // Now we have a constant Node on the right and the constant in con | |
173 if( con == 0 ) return NULL; // By zero is handled by Value call | |
174 if( con == 1 ) return NULL; // By one is handled by Identity call | |
175 | |
176 // Check for negative constant; if so negate the final result | |
177 bool sign_flip = false; | |
178 if( con < 0 ) { | |
179 con = -con; | |
180 sign_flip = true; | |
181 } | |
182 | |
183 // Get low bit; check for being the only bit | |
184 Node *res = NULL; | |
185 jint bit1 = con & -con; // Extract low bit | |
186 if( bit1 == con ) { // Found a power of 2? | |
187 res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ); | |
188 } else { | |
189 | |
190 // Check for constant with 2 bits set | |
191 jint bit2 = con-bit1; | |
192 bit2 = bit2 & -bit2; // Extract 2nd bit | |
193 if( bit2 + bit1 == con ) { // Found all bits in con? | |
194 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) ); | |
195 Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) ); | |
196 res = new (phase->C, 3) AddINode( n2, n1 ); | |
197 | |
198 } else if (is_power_of_2(con+1)) { | |
199 // Sleezy: power-of-2 -1. Next time be generic. | |
200 jint temp = (jint) (con + 1); | |
201 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) ); | |
202 res = new (phase->C, 3) SubINode( n1, in(1) ); | |
203 } else { | |
204 return MulNode::Ideal(phase, can_reshape); | |
205 } | |
206 } | |
207 | |
208 if( sign_flip ) { // Need to negate result? | |
209 res = phase->transform(res);// Transform, before making the zero con | |
210 res = new (phase->C, 3) SubINode(phase->intcon(0),res); | |
211 } | |
212 | |
213 return res; // Return final result | |
214 } | |
215 | |
216 //------------------------------mul_ring--------------------------------------- | |
217 // Compute the product type of two integer ranges into this node. | |
218 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const { | |
219 const TypeInt *r0 = t0->is_int(); // Handy access | |
220 const TypeInt *r1 = t1->is_int(); | |
221 | |
222 // Fetch endpoints of all ranges | |
223 int32 lo0 = r0->_lo; | |
224 double a = (double)lo0; | |
225 int32 hi0 = r0->_hi; | |
226 double b = (double)hi0; | |
227 int32 lo1 = r1->_lo; | |
228 double c = (double)lo1; | |
229 int32 hi1 = r1->_hi; | |
230 double d = (double)hi1; | |
231 | |
232 // Compute all endpoints & check for overflow | |
233 int32 A = lo0*lo1; | |
234 if( (double)A != a*c ) return TypeInt::INT; // Overflow? | |
235 int32 B = lo0*hi1; | |
236 if( (double)B != a*d ) return TypeInt::INT; // Overflow? | |
237 int32 C = hi0*lo1; | |
238 if( (double)C != b*c ) return TypeInt::INT; // Overflow? | |
239 int32 D = hi0*hi1; | |
240 if( (double)D != b*d ) return TypeInt::INT; // Overflow? | |
241 | |
242 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints | |
243 else { lo0 = B; hi0 = A; } | |
244 if( C < D ) { | |
245 if( C < lo0 ) lo0 = C; | |
246 if( D > hi0 ) hi0 = D; | |
247 } else { | |
248 if( D < lo0 ) lo0 = D; | |
249 if( C > hi0 ) hi0 = C; | |
250 } | |
251 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen)); | |
252 } | |
253 | |
254 | |
255 //============================================================================= | |
256 //------------------------------Ideal------------------------------------------ | |
257 // Check for power-of-2 multiply, then try the regular MulNode::Ideal | |
258 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
259 // Swap constant to right | |
260 jlong con; | |
261 if ((con = in(1)->find_long_con(0)) != 0) { | |
262 swap_edges(1, 2); | |
263 // Finish rest of method to use info in 'con' | |
264 } else if ((con = in(2)->find_long_con(0)) == 0) { | |
265 return MulNode::Ideal(phase, can_reshape); | |
266 } | |
267 | |
268 // Now we have a constant Node on the right and the constant in con | |
269 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call | |
270 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call | |
271 | |
272 // Check for negative constant; if so negate the final result | |
273 bool sign_flip = false; | |
274 if( con < 0 ) { | |
275 con = -con; | |
276 sign_flip = true; | |
277 } | |
278 | |
279 // Get low bit; check for being the only bit | |
280 Node *res = NULL; | |
281 jlong bit1 = con & -con; // Extract low bit | |
282 if( bit1 == con ) { // Found a power of 2? | |
283 res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ); | |
284 } else { | |
285 | |
286 // Check for constant with 2 bits set | |
287 jlong bit2 = con-bit1; | |
288 bit2 = bit2 & -bit2; // Extract 2nd bit | |
289 if( bit2 + bit1 == con ) { // Found all bits in con? | |
290 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) ); | |
291 Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) ); | |
292 res = new (phase->C, 3) AddLNode( n2, n1 ); | |
293 | |
294 } else if (is_power_of_2_long(con+1)) { | |
295 // Sleezy: power-of-2 -1. Next time be generic. | |
296 jlong temp = (jlong) (con + 1); | |
297 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) ); | |
298 res = new (phase->C, 3) SubLNode( n1, in(1) ); | |
299 } else { | |
300 return MulNode::Ideal(phase, can_reshape); | |
301 } | |
302 } | |
303 | |
304 if( sign_flip ) { // Need to negate result? | |
305 res = phase->transform(res);// Transform, before making the zero con | |
306 res = new (phase->C, 3) SubLNode(phase->longcon(0),res); | |
307 } | |
308 | |
309 return res; // Return final result | |
310 } | |
311 | |
312 //------------------------------mul_ring--------------------------------------- | |
313 // Compute the product type of two integer ranges into this node. | |
314 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const { | |
315 const TypeLong *r0 = t0->is_long(); // Handy access | |
316 const TypeLong *r1 = t1->is_long(); | |
317 | |
318 // Fetch endpoints of all ranges | |
319 jlong lo0 = r0->_lo; | |
320 double a = (double)lo0; | |
321 jlong hi0 = r0->_hi; | |
322 double b = (double)hi0; | |
323 jlong lo1 = r1->_lo; | |
324 double c = (double)lo1; | |
325 jlong hi1 = r1->_hi; | |
326 double d = (double)hi1; | |
327 | |
328 // Compute all endpoints & check for overflow | |
329 jlong A = lo0*lo1; | |
330 if( (double)A != a*c ) return TypeLong::LONG; // Overflow? | |
331 jlong B = lo0*hi1; | |
332 if( (double)B != a*d ) return TypeLong::LONG; // Overflow? | |
333 jlong C = hi0*lo1; | |
334 if( (double)C != b*c ) return TypeLong::LONG; // Overflow? | |
335 jlong D = hi0*hi1; | |
336 if( (double)D != b*d ) return TypeLong::LONG; // Overflow? | |
337 | |
338 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints | |
339 else { lo0 = B; hi0 = A; } | |
340 if( C < D ) { | |
341 if( C < lo0 ) lo0 = C; | |
342 if( D > hi0 ) hi0 = D; | |
343 } else { | |
344 if( D < lo0 ) lo0 = D; | |
345 if( C > hi0 ) hi0 = C; | |
346 } | |
347 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen)); | |
348 } | |
349 | |
350 //============================================================================= | |
351 //------------------------------mul_ring--------------------------------------- | |
352 // Compute the product type of two double ranges into this node. | |
353 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const { | |
354 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT; | |
355 return TypeF::make( t0->getf() * t1->getf() ); | |
356 } | |
357 | |
358 //============================================================================= | |
359 //------------------------------mul_ring--------------------------------------- | |
360 // Compute the product type of two double ranges into this node. | |
361 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const { | |
362 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE; | |
363 // We must be adding 2 double constants. | |
364 return TypeD::make( t0->getd() * t1->getd() ); | |
365 } | |
366 | |
367 //============================================================================= | |
368 //------------------------------mul_ring--------------------------------------- | |
369 // Supplied function returns the product of the inputs IN THE CURRENT RING. | |
370 // For the logical operations the ring's MUL is really a logical AND function. | |
371 // This also type-checks the inputs for sanity. Guaranteed never to | |
372 // be passed a TOP or BOTTOM type, these are filtered out by pre-check. | |
373 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const { | |
374 const TypeInt *r0 = t0->is_int(); // Handy access | |
375 const TypeInt *r1 = t1->is_int(); | |
376 int widen = MAX2(r0->_widen,r1->_widen); | |
377 | |
378 // If either input is a constant, might be able to trim cases | |
379 if( !r0->is_con() && !r1->is_con() ) | |
380 return TypeInt::INT; // No constants to be had | |
381 | |
382 // Both constants? Return bits | |
383 if( r0->is_con() && r1->is_con() ) | |
384 return TypeInt::make( r0->get_con() & r1->get_con() ); | |
385 | |
386 if( r0->is_con() && r0->get_con() > 0 ) | |
387 return TypeInt::make(0, r0->get_con(), widen); | |
388 | |
389 if( r1->is_con() && r1->get_con() > 0 ) | |
390 return TypeInt::make(0, r1->get_con(), widen); | |
391 | |
392 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) { | |
393 return TypeInt::BOOL; | |
394 } | |
395 | |
396 return TypeInt::INT; // No constants to be had | |
397 } | |
398 | |
399 //------------------------------Identity--------------------------------------- | |
400 // Masking off the high bits of an unsigned load is not required | |
401 Node *AndINode::Identity( PhaseTransform *phase ) { | |
402 | |
403 // x & x => x | |
404 if (phase->eqv(in(1), in(2))) return in(1); | |
405 | |
406 Node *load = in(1); | |
407 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
408 if( t2 && t2->is_con() ) { | |
409 int con = t2->get_con(); | |
410 // Masking off high bits which are always zero is useless. | |
411 const TypeInt* t1 = phase->type( in(1) )->isa_int(); | |
412 if (t1 != NULL && t1->_lo >= 0) { | |
413 jint t1_support = ((jint)1 << (1 + log2_intptr(t1->_hi))) - 1; | |
414 if ((t1_support & con) == t1_support) | |
415 return load; | |
416 } | |
417 uint lop = load->Opcode(); | |
418 if( lop == Op_LoadC && | |
419 con == 0x0000FFFF ) // Already zero-extended | |
420 return load; | |
421 // Masking off the high bits of a unsigned-shift-right is not | |
422 // needed either. | |
423 if( lop == Op_URShiftI ) { | |
424 const TypeInt *t12 = phase->type( load->in(2) )->isa_int(); | |
425 if( t12 && t12->is_con() ) { | |
426 int shift_con = t12->get_con(); | |
427 int mask = max_juint >> shift_con; | |
428 if( (mask&con) == mask ) // If AND is useless, skip it | |
429 return load; | |
430 } | |
431 } | |
432 } | |
433 return MulNode::Identity(phase); | |
434 } | |
435 | |
436 //------------------------------Ideal------------------------------------------ | |
437 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
438 // Special case constant AND mask | |
439 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
440 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape); | |
441 const int mask = t2->get_con(); | |
442 Node *load = in(1); | |
443 uint lop = load->Opcode(); | |
444 | |
445 // Masking bits off of a Character? Hi bits are already zero. | |
446 if( lop == Op_LoadC && | |
447 (mask & 0xFFFF0000) ) // Can we make a smaller mask? | |
448 return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF)); | |
449 | |
450 // Masking bits off of a Short? Loading a Character does some masking | |
451 if( lop == Op_LoadS && | |
452 (mask & 0xFFFF0000) == 0 ) { | |
453 Node *ldc = new (phase->C, 3) LoadCNode(load->in(MemNode::Control), | |
454 load->in(MemNode::Memory), | |
455 load->in(MemNode::Address), | |
456 load->adr_type()); | |
457 ldc = phase->transform(ldc); | |
458 return new (phase->C, 3) AndINode(ldc,phase->intcon(mask&0xFFFF)); | |
459 } | |
460 | |
461 // Masking sign bits off of a Byte? Let the matcher use an unsigned load | |
462 if( lop == Op_LoadB && | |
463 (!in(0) && load->in(0)) && | |
464 (mask == 0x000000FF) ) { | |
465 // Associate this node with the LoadB, so the matcher can see them together. | |
466 // If we don't do this, it is common for the LoadB to have one control | |
467 // edge, and the store or call containing this AndI to have a different | |
468 // control edge. This will cause Label_Root to group the AndI with | |
469 // the encoding store or call, so the matcher has no chance to match | |
470 // this AndI together with the LoadB. Setting the control edge here | |
471 // prevents Label_Root from grouping the AndI with the store or call, | |
472 // if it has a control edge that is inconsistent with the LoadB. | |
473 set_req(0, load->in(0)); | |
474 return this; | |
475 } | |
476 | |
477 // Masking off sign bits? Dont make them! | |
478 if( lop == Op_RShiftI ) { | |
479 const TypeInt *t12 = phase->type(load->in(2))->isa_int(); | |
480 if( t12 && t12->is_con() ) { // Shift is by a constant | |
481 int shift = t12->get_con(); | |
482 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
483 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift); | |
484 // If the AND'ing of the 2 masks has no bits, then only original shifted | |
485 // bits survive. NO sign-extension bits survive the maskings. | |
486 if( (sign_bits_mask & mask) == 0 ) { | |
487 // Use zero-fill shift instead | |
488 Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2))); | |
489 return new (phase->C, 3) AndINode( zshift, in(2) ); | |
490 } | |
491 } | |
492 } | |
493 | |
494 // Check for 'negate/and-1', a pattern emitted when someone asks for | |
495 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement | |
496 // plus 1) and the mask is of the low order bit. Skip the negate. | |
497 if( lop == Op_SubI && mask == 1 && load->in(1) && | |
498 phase->type(load->in(1)) == TypeInt::ZERO ) | |
499 return new (phase->C, 3) AndINode( load->in(2), in(2) ); | |
500 | |
501 return MulNode::Ideal(phase, can_reshape); | |
502 } | |
503 | |
504 //============================================================================= | |
505 //------------------------------mul_ring--------------------------------------- | |
506 // Supplied function returns the product of the inputs IN THE CURRENT RING. | |
507 // For the logical operations the ring's MUL is really a logical AND function. | |
508 // This also type-checks the inputs for sanity. Guaranteed never to | |
509 // be passed a TOP or BOTTOM type, these are filtered out by pre-check. | |
510 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const { | |
511 const TypeLong *r0 = t0->is_long(); // Handy access | |
512 const TypeLong *r1 = t1->is_long(); | |
513 int widen = MAX2(r0->_widen,r1->_widen); | |
514 | |
515 // If either input is a constant, might be able to trim cases | |
516 if( !r0->is_con() && !r1->is_con() ) | |
517 return TypeLong::LONG; // No constants to be had | |
518 | |
519 // Both constants? Return bits | |
520 if( r0->is_con() && r1->is_con() ) | |
521 return TypeLong::make( r0->get_con() & r1->get_con() ); | |
522 | |
523 if( r0->is_con() && r0->get_con() > 0 ) | |
524 return TypeLong::make(CONST64(0), r0->get_con(), widen); | |
525 | |
526 if( r1->is_con() && r1->get_con() > 0 ) | |
527 return TypeLong::make(CONST64(0), r1->get_con(), widen); | |
528 | |
529 return TypeLong::LONG; // No constants to be had | |
530 } | |
531 | |
532 //------------------------------Identity--------------------------------------- | |
533 // Masking off the high bits of an unsigned load is not required | |
534 Node *AndLNode::Identity( PhaseTransform *phase ) { | |
535 | |
536 // x & x => x | |
537 if (phase->eqv(in(1), in(2))) return in(1); | |
538 | |
539 Node *usr = in(1); | |
540 const TypeLong *t2 = phase->type( in(2) )->isa_long(); | |
541 if( t2 && t2->is_con() ) { | |
542 jlong con = t2->get_con(); | |
543 // Masking off high bits which are always zero is useless. | |
544 const TypeLong* t1 = phase->type( in(1) )->isa_long(); | |
545 if (t1 != NULL && t1->_lo >= 0) { | |
546 jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1; | |
547 if ((t1_support & con) == t1_support) | |
548 return usr; | |
549 } | |
550 uint lop = usr->Opcode(); | |
551 // Masking off the high bits of a unsigned-shift-right is not | |
552 // needed either. | |
553 if( lop == Op_URShiftL ) { | |
554 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int(); | |
555 if( t12 && t12->is_con() ) { | |
556 int shift_con = t12->get_con(); | |
557 jlong mask = max_julong >> shift_con; | |
558 if( (mask&con) == mask ) // If AND is useless, skip it | |
559 return usr; | |
560 } | |
561 } | |
562 } | |
563 return MulNode::Identity(phase); | |
564 } | |
565 | |
566 //------------------------------Ideal------------------------------------------ | |
567 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
568 // Special case constant AND mask | |
569 const TypeLong *t2 = phase->type( in(2) )->isa_long(); | |
570 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape); | |
571 const jlong mask = t2->get_con(); | |
572 | |
573 Node *rsh = in(1); | |
574 uint rop = rsh->Opcode(); | |
575 | |
576 // Masking off sign bits? Dont make them! | |
577 if( rop == Op_RShiftL ) { | |
578 const TypeInt *t12 = phase->type(rsh->in(2))->isa_int(); | |
579 if( t12 && t12->is_con() ) { // Shift is by a constant | |
580 int shift = t12->get_con(); | |
581 shift &= (BitsPerJavaInteger*2)-1; // semantics of Java shifts | |
582 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaInteger*2 - shift)) -1); | |
583 // If the AND'ing of the 2 masks has no bits, then only original shifted | |
584 // bits survive. NO sign-extension bits survive the maskings. | |
585 if( (sign_bits_mask & mask) == 0 ) { | |
586 // Use zero-fill shift instead | |
587 Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(rsh->in(1),rsh->in(2))); | |
588 return new (phase->C, 3) AndLNode( zshift, in(2) ); | |
589 } | |
590 } | |
591 } | |
592 | |
593 return MulNode::Ideal(phase, can_reshape); | |
594 } | |
595 | |
596 //============================================================================= | |
597 //------------------------------Identity--------------------------------------- | |
598 Node *LShiftINode::Identity( PhaseTransform *phase ) { | |
599 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
600 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this; | |
601 } | |
602 | |
603 //------------------------------Ideal------------------------------------------ | |
604 // If the right input is a constant, and the left input is an add of a | |
605 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0 | |
606 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
607 const Type *t = phase->type( in(2) ); | |
608 if( t == Type::TOP ) return NULL; // Right input is dead | |
609 const TypeInt *t2 = t->isa_int(); | |
610 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
611 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count | |
612 | |
613 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count | |
614 | |
615 // Left input is an add of a constant? | |
616 Node *add1 = in(1); | |
617 int add1_op = add1->Opcode(); | |
618 if( add1_op == Op_AddI ) { // Left input is an add? | |
619 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" ); | |
620 const TypeInt *t12 = phase->type(add1->in(2))->isa_int(); | |
621 if( t12 && t12->is_con() ){ // Left input is an add of a con? | |
622 // Transform is legal, but check for profit. Avoid breaking 'i2s' | |
623 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'. | |
624 if( con < 16 ) { | |
625 // Compute X << con0 | |
626 Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) ); | |
627 // Compute X<<con0 + (con1<<con0) | |
628 return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con)); | |
629 } | |
630 } | |
631 } | |
632 | |
633 // Check for "(x>>c0)<<c0" which just masks off low bits | |
634 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) && | |
635 add1->in(2) == in(2) ) | |
636 // Convert to "(x & -(1<<c0))" | |
637 return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con))); | |
638 | |
639 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits | |
640 if( add1_op == Op_AndI ) { | |
641 Node *add2 = add1->in(1); | |
642 int add2_op = add2->Opcode(); | |
643 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) && | |
644 add2->in(2) == in(2) ) { | |
645 // Convert to "(x & (Y<<c0))" | |
646 Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) ); | |
647 return new (phase->C, 3) AndINode( add2->in(1), y_sh ); | |
648 } | |
649 } | |
650 | |
651 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits | |
652 // before shifting them away. | |
653 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con); | |
654 if( add1_op == Op_AndI && | |
655 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) ) | |
656 return new (phase->C, 3) LShiftINode( add1->in(1), in(2) ); | |
657 | |
658 return NULL; | |
659 } | |
660 | |
661 //------------------------------Value------------------------------------------ | |
662 // A LShiftINode shifts its input2 left by input1 amount. | |
663 const Type *LShiftINode::Value( PhaseTransform *phase ) const { | |
664 const Type *t1 = phase->type( in(1) ); | |
665 const Type *t2 = phase->type( in(2) ); | |
666 // Either input is TOP ==> the result is TOP | |
667 if( t1 == Type::TOP ) return Type::TOP; | |
668 if( t2 == Type::TOP ) return Type::TOP; | |
669 | |
670 // Left input is ZERO ==> the result is ZERO. | |
671 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
672 // Shift by zero does nothing | |
673 if( t2 == TypeInt::ZERO ) return t1; | |
674 | |
675 // Either input is BOTTOM ==> the result is BOTTOM | |
676 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) || | |
677 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) | |
678 return TypeInt::INT; | |
679 | |
680 const TypeInt *r1 = t1->is_int(); // Handy access | |
681 const TypeInt *r2 = t2->is_int(); // Handy access | |
682 | |
683 if (!r2->is_con()) | |
684 return TypeInt::INT; | |
685 | |
686 uint shift = r2->get_con(); | |
687 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
688 // Shift by a multiple of 32 does nothing: | |
689 if (shift == 0) return t1; | |
690 | |
691 // If the shift is a constant, shift the bounds of the type, | |
692 // unless this could lead to an overflow. | |
693 if (!r1->is_con()) { | |
694 jint lo = r1->_lo, hi = r1->_hi; | |
695 if (((lo << shift) >> shift) == lo && | |
696 ((hi << shift) >> shift) == hi) { | |
697 // No overflow. The range shifts up cleanly. | |
698 return TypeInt::make((jint)lo << (jint)shift, | |
699 (jint)hi << (jint)shift, | |
700 MAX2(r1->_widen,r2->_widen)); | |
701 } | |
702 return TypeInt::INT; | |
703 } | |
704 | |
705 return TypeInt::make( (jint)r1->get_con() << (jint)shift ); | |
706 } | |
707 | |
708 //============================================================================= | |
709 //------------------------------Identity--------------------------------------- | |
710 Node *LShiftLNode::Identity( PhaseTransform *phase ) { | |
711 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
712 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
713 } | |
714 | |
715 //------------------------------Ideal------------------------------------------ | |
716 // If the right input is a constant, and the left input is an add of a | |
717 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0 | |
718 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
719 const Type *t = phase->type( in(2) ); | |
720 if( t == Type::TOP ) return NULL; // Right input is dead | |
721 const TypeInt *t2 = t->isa_int(); | |
722 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
723 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count | |
724 | |
725 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count | |
726 | |
727 // Left input is an add of a constant? | |
728 Node *add1 = in(1); | |
729 int add1_op = add1->Opcode(); | |
730 if( add1_op == Op_AddL ) { // Left input is an add? | |
731 // Avoid dead data cycles from dead loops | |
732 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" ); | |
733 const TypeLong *t12 = phase->type(add1->in(2))->isa_long(); | |
734 if( t12 && t12->is_con() ){ // Left input is an add of a con? | |
735 // Compute X << con0 | |
736 Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) ); | |
737 // Compute X<<con0 + (con1<<con0) | |
738 return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con)); | |
739 } | |
740 } | |
741 | |
742 // Check for "(x>>c0)<<c0" which just masks off low bits | |
743 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) && | |
744 add1->in(2) == in(2) ) | |
745 // Convert to "(x & -(1<<c0))" | |
746 return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con))); | |
747 | |
748 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits | |
749 if( add1_op == Op_AndL ) { | |
750 Node *add2 = add1->in(1); | |
751 int add2_op = add2->Opcode(); | |
752 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) && | |
753 add2->in(2) == in(2) ) { | |
754 // Convert to "(x & (Y<<c0))" | |
755 Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) ); | |
756 return new (phase->C, 3) AndLNode( add2->in(1), y_sh ); | |
757 } | |
758 } | |
759 | |
760 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits | |
761 // before shifting them away. | |
762 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaInteger*2 - con)) - CONST64(1); | |
763 if( add1_op == Op_AndL && | |
764 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) ) | |
765 return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ); | |
766 | |
767 return NULL; | |
768 } | |
769 | |
770 //------------------------------Value------------------------------------------ | |
771 // A LShiftLNode shifts its input2 left by input1 amount. | |
772 const Type *LShiftLNode::Value( PhaseTransform *phase ) const { | |
773 const Type *t1 = phase->type( in(1) ); | |
774 const Type *t2 = phase->type( in(2) ); | |
775 // Either input is TOP ==> the result is TOP | |
776 if( t1 == Type::TOP ) return Type::TOP; | |
777 if( t2 == Type::TOP ) return Type::TOP; | |
778 | |
779 // Left input is ZERO ==> the result is ZERO. | |
780 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
781 // Shift by zero does nothing | |
782 if( t2 == TypeInt::ZERO ) return t1; | |
783 | |
784 // Either input is BOTTOM ==> the result is BOTTOM | |
785 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) || | |
786 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) | |
787 return TypeLong::LONG; | |
788 | |
789 const TypeLong *r1 = t1->is_long(); // Handy access | |
790 const TypeInt *r2 = t2->is_int(); // Handy access | |
791 | |
792 if (!r2->is_con()) | |
793 return TypeLong::LONG; | |
794 | |
795 uint shift = r2->get_con(); | |
796 shift &= (BitsPerJavaInteger*2)-1; // semantics of Java shifts | |
797 // Shift by a multiple of 64 does nothing: | |
798 if (shift == 0) return t1; | |
799 | |
800 // If the shift is a constant, shift the bounds of the type, | |
801 // unless this could lead to an overflow. | |
802 if (!r1->is_con()) { | |
803 jlong lo = r1->_lo, hi = r1->_hi; | |
804 if (((lo << shift) >> shift) == lo && | |
805 ((hi << shift) >> shift) == hi) { | |
806 // No overflow. The range shifts up cleanly. | |
807 return TypeLong::make((jlong)lo << (jint)shift, | |
808 (jlong)hi << (jint)shift, | |
809 MAX2(r1->_widen,r2->_widen)); | |
810 } | |
811 return TypeLong::LONG; | |
812 } | |
813 | |
814 return TypeLong::make( (jlong)r1->get_con() << (jint)shift ); | |
815 } | |
816 | |
817 //============================================================================= | |
818 //------------------------------Identity--------------------------------------- | |
819 Node *RShiftINode::Identity( PhaseTransform *phase ) { | |
820 const TypeInt *t2 = phase->type(in(2))->isa_int(); | |
821 if( !t2 ) return this; | |
822 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 ) | |
823 return in(1); | |
824 | |
825 // Check for useless sign-masking | |
826 if( in(1)->Opcode() == Op_LShiftI && | |
827 in(1)->req() == 3 && | |
828 in(1)->in(2) == in(2) && | |
829 t2->is_con() ) { | |
830 uint shift = t2->get_con(); | |
831 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
832 // Compute masks for which this shifting doesn't change | |
833 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000 | |
834 int hi = ~lo; // 00007FFF | |
835 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int(); | |
836 if( !t11 ) return this; | |
837 // Does actual value fit inside of mask? | |
838 if( lo <= t11->_lo && t11->_hi <= hi ) | |
839 return in(1)->in(1); // Then shifting is a nop | |
840 } | |
841 | |
842 return this; | |
843 } | |
844 | |
845 //------------------------------Ideal------------------------------------------ | |
846 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
847 // Inputs may be TOP if they are dead. | |
848 const TypeInt *t1 = phase->type( in(1) )->isa_int(); | |
849 if( !t1 ) return NULL; // Left input is an integer | |
850 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
851 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
852 const TypeInt *t3; // type of in(1).in(2) | |
853 int shift = t2->get_con(); | |
854 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
855 | |
856 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count | |
857 | |
858 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller. | |
859 // Such expressions arise normally from shift chains like (byte)(x >> 24). | |
860 const Node *mask = in(1); | |
861 if( mask->Opcode() == Op_AndI && | |
862 (t3 = phase->type(mask->in(2))->isa_int()) && | |
863 t3->is_con() ) { | |
864 Node *x = mask->in(1); | |
865 jint maskbits = t3->get_con(); | |
866 // Convert to "(x >> shift) & (mask >> shift)" | |
867 Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) ); | |
868 return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift)); | |
869 } | |
870 | |
871 // Check for "(short[i] <<16)>>16" which simply sign-extends | |
872 const Node *shl = in(1); | |
873 if( shl->Opcode() != Op_LShiftI ) return NULL; | |
874 | |
875 if( shift == 16 && | |
876 (t3 = phase->type(shl->in(2))->isa_int()) && | |
877 t3->is_con(16) ) { | |
878 Node *ld = shl->in(1); | |
879 if( ld->Opcode() == Op_LoadS ) { | |
880 // Sign extension is just useless here. Return a RShiftI of zero instead | |
881 // returning 'ld' directly. We cannot return an old Node directly as | |
882 // that is the job of 'Identity' calls and Identity calls only work on | |
883 // direct inputs ('ld' is an extra Node removed from 'this'). The | |
884 // combined optimization requires Identity only return direct inputs. | |
885 set_req(1, ld); | |
886 set_req(2, phase->intcon(0)); | |
887 return this; | |
888 } | |
889 else if( ld->Opcode() == Op_LoadC ) | |
890 // Replace zero-extension-load with sign-extension-load | |
891 return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control), | |
892 ld->in(MemNode::Memory), | |
893 ld->in(MemNode::Address), | |
894 ld->adr_type()); | |
895 } | |
896 | |
897 // Check for "(byte[i] <<24)>>24" which simply sign-extends | |
898 if( shift == 24 && | |
899 (t3 = phase->type(shl->in(2))->isa_int()) && | |
900 t3->is_con(24) ) { | |
901 Node *ld = shl->in(1); | |
902 if( ld->Opcode() == Op_LoadB ) { | |
903 // Sign extension is just useless here | |
904 set_req(1, ld); | |
905 set_req(2, phase->intcon(0)); | |
906 return this; | |
907 } | |
908 } | |
909 | |
910 return NULL; | |
911 } | |
912 | |
913 //------------------------------Value------------------------------------------ | |
914 // A RShiftINode shifts its input2 right by input1 amount. | |
915 const Type *RShiftINode::Value( PhaseTransform *phase ) const { | |
916 const Type *t1 = phase->type( in(1) ); | |
917 const Type *t2 = phase->type( in(2) ); | |
918 // Either input is TOP ==> the result is TOP | |
919 if( t1 == Type::TOP ) return Type::TOP; | |
920 if( t2 == Type::TOP ) return Type::TOP; | |
921 | |
922 // Left input is ZERO ==> the result is ZERO. | |
923 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
924 // Shift by zero does nothing | |
925 if( t2 == TypeInt::ZERO ) return t1; | |
926 | |
927 // Either input is BOTTOM ==> the result is BOTTOM | |
928 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
929 return TypeInt::INT; | |
930 | |
931 if (t2 == TypeInt::INT) | |
932 return TypeInt::INT; | |
933 | |
934 const TypeInt *r1 = t1->is_int(); // Handy access | |
935 const TypeInt *r2 = t2->is_int(); // Handy access | |
936 | |
937 // If the shift is a constant, just shift the bounds of the type. | |
938 // For example, if the shift is 31, we just propagate sign bits. | |
939 if (r2->is_con()) { | |
940 uint shift = r2->get_con(); | |
941 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
942 // Shift by a multiple of 32 does nothing: | |
943 if (shift == 0) return t1; | |
944 // Calculate reasonably aggressive bounds for the result. | |
945 // This is necessary if we are to correctly type things | |
946 // like (x<<24>>24) == ((byte)x). | |
947 jint lo = (jint)r1->_lo >> (jint)shift; | |
948 jint hi = (jint)r1->_hi >> (jint)shift; | |
949 assert(lo <= hi, "must have valid bounds"); | |
950 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
951 #ifdef ASSERT | |
952 // Make sure we get the sign-capture idiom correct. | |
953 if (shift == BitsPerJavaInteger-1) { | |
954 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0"); | |
955 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1"); | |
956 } | |
957 #endif | |
958 return ti; | |
959 } | |
960 | |
961 if( !r1->is_con() || !r2->is_con() ) | |
962 return TypeInt::INT; | |
963 | |
964 // Signed shift right | |
965 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) ); | |
966 } | |
967 | |
968 //============================================================================= | |
969 //------------------------------Identity--------------------------------------- | |
970 Node *RShiftLNode::Identity( PhaseTransform *phase ) { | |
971 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
972 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
973 } | |
974 | |
975 //------------------------------Value------------------------------------------ | |
976 // A RShiftLNode shifts its input2 right by input1 amount. | |
977 const Type *RShiftLNode::Value( PhaseTransform *phase ) const { | |
978 const Type *t1 = phase->type( in(1) ); | |
979 const Type *t2 = phase->type( in(2) ); | |
980 // Either input is TOP ==> the result is TOP | |
981 if( t1 == Type::TOP ) return Type::TOP; | |
982 if( t2 == Type::TOP ) return Type::TOP; | |
983 | |
984 // Left input is ZERO ==> the result is ZERO. | |
985 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
986 // Shift by zero does nothing | |
987 if( t2 == TypeInt::ZERO ) return t1; | |
988 | |
989 // Either input is BOTTOM ==> the result is BOTTOM | |
990 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
991 return TypeLong::LONG; | |
992 | |
993 if (t2 == TypeInt::INT) | |
994 return TypeLong::LONG; | |
995 | |
996 const TypeLong *r1 = t1->is_long(); // Handy access | |
997 const TypeInt *r2 = t2->is_int (); // Handy access | |
998 | |
999 // If the shift is a constant, just shift the bounds of the type. | |
1000 // For example, if the shift is 63, we just propagate sign bits. | |
1001 if (r2->is_con()) { | |
1002 uint shift = r2->get_con(); | |
1003 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts | |
1004 // Shift by a multiple of 64 does nothing: | |
1005 if (shift == 0) return t1; | |
1006 // Calculate reasonably aggressive bounds for the result. | |
1007 // This is necessary if we are to correctly type things | |
1008 // like (x<<24>>24) == ((byte)x). | |
1009 jlong lo = (jlong)r1->_lo >> (jlong)shift; | |
1010 jlong hi = (jlong)r1->_hi >> (jlong)shift; | |
1011 assert(lo <= hi, "must have valid bounds"); | |
1012 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
1013 #ifdef ASSERT | |
1014 // Make sure we get the sign-capture idiom correct. | |
1015 if (shift == (2*BitsPerJavaInteger)-1) { | |
1016 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0"); | |
1017 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1"); | |
1018 } | |
1019 #endif | |
1020 return tl; | |
1021 } | |
1022 | |
1023 return TypeLong::LONG; // Give up | |
1024 } | |
1025 | |
1026 //============================================================================= | |
1027 //------------------------------Identity--------------------------------------- | |
1028 Node *URShiftINode::Identity( PhaseTransform *phase ) { | |
1029 const TypeInt *ti = phase->type( in(2) )->isa_int(); | |
1030 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1); | |
1031 | |
1032 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x". | |
1033 // Happens during new-array length computation. | |
1034 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)] | |
1035 Node *add = in(1); | |
1036 if( add->Opcode() == Op_AddI ) { | |
1037 const TypeInt *t2 = phase->type(add->in(2))->isa_int(); | |
1038 if( t2 && t2->is_con(wordSize - 1) && | |
1039 add->in(1)->Opcode() == Op_LShiftI ) { | |
1040 // Check that shift_counts are LogBytesPerWord | |
1041 Node *lshift_count = add->in(1)->in(2); | |
1042 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int(); | |
1043 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) && | |
1044 t_lshift_count == phase->type(in(2)) ) { | |
1045 Node *x = add->in(1)->in(1); | |
1046 const TypeInt *t_x = phase->type(x)->isa_int(); | |
1047 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) { | |
1048 return x; | |
1049 } | |
1050 } | |
1051 } | |
1052 } | |
1053 | |
1054 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this; | |
1055 } | |
1056 | |
1057 //------------------------------Ideal------------------------------------------ | |
1058 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
1059 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
1060 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
1061 const int con = t2->get_con() & 31; // Shift count is always masked | |
1062 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count | |
1063 // We'll be wanting the right-shift amount as a mask of that many bits | |
1064 const int mask = right_n_bits(BitsPerJavaInteger - con); | |
1065 | |
1066 int in1_op = in(1)->Opcode(); | |
1067 | |
1068 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32 | |
1069 if( in1_op == Op_URShiftI ) { | |
1070 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int(); | |
1071 if( t12 && t12->is_con() ) { // Right input is a constant | |
1072 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" ); | |
1073 const int con2 = t12->get_con() & 31; // Shift count is always masked | |
1074 const int con3 = con+con2; | |
1075 if( con3 < 32 ) // Only merge shifts if total is < 32 | |
1076 return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) ); | |
1077 } | |
1078 } | |
1079 | |
1080 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z | |
1081 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". | |
1082 // If Q is "X << z" the rounding is useless. Look for patterns like | |
1083 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask. | |
1084 Node *add = in(1); | |
1085 if( in1_op == Op_AddI ) { | |
1086 Node *lshl = add->in(1); | |
1087 if( lshl->Opcode() == Op_LShiftI && | |
1088 phase->type(lshl->in(2)) == t2 ) { | |
1089 Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) ); | |
1090 Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) ); | |
1091 return new (phase->C, 3) AndINode( sum, phase->intcon(mask) ); | |
1092 } | |
1093 } | |
1094 | |
1095 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) | |
1096 // This shortens the mask. Also, if we are extracting a high byte and | |
1097 // storing it to a buffer, the mask will be removed completely. | |
1098 Node *andi = in(1); | |
1099 if( in1_op == Op_AndI ) { | |
1100 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int(); | |
1101 if( t3 && t3->is_con() ) { // Right input is a constant | |
1102 jint mask2 = t3->get_con(); | |
1103 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) | |
1104 Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) ); | |
1105 return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2)); | |
1106 // The negative values are easier to materialize than positive ones. | |
1107 // A typical case from address arithmetic is ((x & ~15) >> 4). | |
1108 // It's better to change that to ((x >> 4) & ~0) versus | |
1109 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64. | |
1110 } | |
1111 } | |
1112 | |
1113 // Check for "(X << z ) >>> z" which simply zero-extends | |
1114 Node *shl = in(1); | |
1115 if( in1_op == Op_LShiftI && | |
1116 phase->type(shl->in(2)) == t2 ) | |
1117 return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) ); | |
1118 | |
1119 return NULL; | |
1120 } | |
1121 | |
1122 //------------------------------Value------------------------------------------ | |
1123 // A URShiftINode shifts its input2 right by input1 amount. | |
1124 const Type *URShiftINode::Value( PhaseTransform *phase ) const { | |
1125 // (This is a near clone of RShiftINode::Value.) | |
1126 const Type *t1 = phase->type( in(1) ); | |
1127 const Type *t2 = phase->type( in(2) ); | |
1128 // Either input is TOP ==> the result is TOP | |
1129 if( t1 == Type::TOP ) return Type::TOP; | |
1130 if( t2 == Type::TOP ) return Type::TOP; | |
1131 | |
1132 // Left input is ZERO ==> the result is ZERO. | |
1133 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; | |
1134 // Shift by zero does nothing | |
1135 if( t2 == TypeInt::ZERO ) return t1; | |
1136 | |
1137 // Either input is BOTTOM ==> the result is BOTTOM | |
1138 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
1139 return TypeInt::INT; | |
1140 | |
1141 if (t2 == TypeInt::INT) | |
1142 return TypeInt::INT; | |
1143 | |
1144 const TypeInt *r1 = t1->is_int(); // Handy access | |
1145 const TypeInt *r2 = t2->is_int(); // Handy access | |
1146 | |
1147 if (r2->is_con()) { | |
1148 uint shift = r2->get_con(); | |
1149 shift &= BitsPerJavaInteger-1; // semantics of Java shifts | |
1150 // Shift by a multiple of 32 does nothing: | |
1151 if (shift == 0) return t1; | |
1152 // Calculate reasonably aggressive bounds for the result. | |
1153 jint lo = (juint)r1->_lo >> (juint)shift; | |
1154 jint hi = (juint)r1->_hi >> (juint)shift; | |
1155 if (r1->_hi >= 0 && r1->_lo < 0) { | |
1156 // If the type has both negative and positive values, | |
1157 // there are two separate sub-domains to worry about: | |
1158 // The positive half and the negative half. | |
1159 jint neg_lo = lo; | |
1160 jint neg_hi = (juint)-1 >> (juint)shift; | |
1161 jint pos_lo = (juint) 0 >> (juint)shift; | |
1162 jint pos_hi = hi; | |
1163 lo = MIN2(neg_lo, pos_lo); // == 0 | |
1164 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift; | |
1165 } | |
1166 assert(lo <= hi, "must have valid bounds"); | |
1167 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
1168 #ifdef ASSERT | |
1169 // Make sure we get the sign-capture idiom correct. | |
1170 if (shift == BitsPerJavaInteger-1) { | |
1171 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0"); | |
1172 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1"); | |
1173 } | |
1174 #endif | |
1175 return ti; | |
1176 } | |
1177 | |
1178 // | |
1179 // Do not support shifted oops in info for GC | |
1180 // | |
1181 // else if( t1->base() == Type::InstPtr ) { | |
1182 // | |
1183 // const TypeInstPtr *o = t1->is_instptr(); | |
1184 // if( t1->singleton() ) | |
1185 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift ); | |
1186 // } | |
1187 // else if( t1->base() == Type::KlassPtr ) { | |
1188 // const TypeKlassPtr *o = t1->is_klassptr(); | |
1189 // if( t1->singleton() ) | |
1190 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift ); | |
1191 // } | |
1192 | |
1193 return TypeInt::INT; | |
1194 } | |
1195 | |
1196 //============================================================================= | |
1197 //------------------------------Identity--------------------------------------- | |
1198 Node *URShiftLNode::Identity( PhaseTransform *phase ) { | |
1199 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int | |
1200 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; | |
1201 } | |
1202 | |
1203 //------------------------------Ideal------------------------------------------ | |
1204 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { | |
1205 const TypeInt *t2 = phase->type( in(2) )->isa_int(); | |
1206 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant | |
1207 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked | |
1208 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count | |
1209 // note: mask computation below does not work for 0 shift count | |
1210 // We'll be wanting the right-shift amount as a mask of that many bits | |
1211 const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaInteger*2 - con)) -1); | |
1212 | |
1213 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z | |
1214 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". | |
1215 // If Q is "X << z" the rounding is useless. Look for patterns like | |
1216 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask. | |
1217 Node *add = in(1); | |
1218 if( add->Opcode() == Op_AddL ) { | |
1219 Node *lshl = add->in(1); | |
1220 if( lshl->Opcode() == Op_LShiftL && | |
1221 phase->type(lshl->in(2)) == t2 ) { | |
1222 Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) ); | |
1223 Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) ); | |
1224 return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) ); | |
1225 } | |
1226 } | |
1227 | |
1228 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) | |
1229 // This shortens the mask. Also, if we are extracting a high byte and | |
1230 // storing it to a buffer, the mask will be removed completely. | |
1231 Node *andi = in(1); | |
1232 if( andi->Opcode() == Op_AndL ) { | |
1233 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long(); | |
1234 if( t3 && t3->is_con() ) { // Right input is a constant | |
1235 jlong mask2 = t3->get_con(); | |
1236 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) | |
1237 Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) ); | |
1238 return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2)); | |
1239 } | |
1240 } | |
1241 | |
1242 // Check for "(X << z ) >>> z" which simply zero-extends | |
1243 Node *shl = in(1); | |
1244 if( shl->Opcode() == Op_LShiftL && | |
1245 phase->type(shl->in(2)) == t2 ) | |
1246 return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) ); | |
1247 | |
1248 return NULL; | |
1249 } | |
1250 | |
1251 //------------------------------Value------------------------------------------ | |
1252 // A URShiftINode shifts its input2 right by input1 amount. | |
1253 const Type *URShiftLNode::Value( PhaseTransform *phase ) const { | |
1254 // (This is a near clone of RShiftLNode::Value.) | |
1255 const Type *t1 = phase->type( in(1) ); | |
1256 const Type *t2 = phase->type( in(2) ); | |
1257 // Either input is TOP ==> the result is TOP | |
1258 if( t1 == Type::TOP ) return Type::TOP; | |
1259 if( t2 == Type::TOP ) return Type::TOP; | |
1260 | |
1261 // Left input is ZERO ==> the result is ZERO. | |
1262 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; | |
1263 // Shift by zero does nothing | |
1264 if( t2 == TypeInt::ZERO ) return t1; | |
1265 | |
1266 // Either input is BOTTOM ==> the result is BOTTOM | |
1267 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) | |
1268 return TypeLong::LONG; | |
1269 | |
1270 if (t2 == TypeInt::INT) | |
1271 return TypeLong::LONG; | |
1272 | |
1273 const TypeLong *r1 = t1->is_long(); // Handy access | |
1274 const TypeInt *r2 = t2->is_int (); // Handy access | |
1275 | |
1276 if (r2->is_con()) { | |
1277 uint shift = r2->get_con(); | |
1278 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts | |
1279 // Shift by a multiple of 64 does nothing: | |
1280 if (shift == 0) return t1; | |
1281 // Calculate reasonably aggressive bounds for the result. | |
1282 jlong lo = (julong)r1->_lo >> (juint)shift; | |
1283 jlong hi = (julong)r1->_hi >> (juint)shift; | |
1284 if (r1->_hi >= 0 && r1->_lo < 0) { | |
1285 // If the type has both negative and positive values, | |
1286 // there are two separate sub-domains to worry about: | |
1287 // The positive half and the negative half. | |
1288 jlong neg_lo = lo; | |
1289 jlong neg_hi = (julong)-1 >> (juint)shift; | |
1290 jlong pos_lo = (julong) 0 >> (juint)shift; | |
1291 jlong pos_hi = hi; | |
1292 //lo = MIN2(neg_lo, pos_lo); // == 0 | |
1293 lo = neg_lo < pos_lo ? neg_lo : pos_lo; | |
1294 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift; | |
1295 hi = neg_hi > pos_hi ? neg_hi : pos_hi; | |
1296 } | |
1297 assert(lo <= hi, "must have valid bounds"); | |
1298 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen)); | |
1299 #ifdef ASSERT | |
1300 // Make sure we get the sign-capture idiom correct. | |
1301 if (shift == (2*BitsPerJavaInteger)-1) { | |
1302 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0"); | |
1303 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1"); | |
1304 } | |
1305 #endif | |
1306 return tl; | |
1307 } | |
1308 | |
1309 return TypeLong::LONG; // Give up | |
1310 } |