Mercurial > hg > graal-compiler

comparison src/os_cpu/solaris_sparc/vm/orderAccess_solaris_sparc.inline.hpp @ 1711:a6bff45449bc

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
6973570: OrderAccess::storestore() scales poorly on multi-socket x64 and sparc: cache-line ping-ponging Summary: volatile store to static variable removed in favour of a volatile store to stack to avoid excessive cache coherency traffic; verified that the volatile store is not elided by any of our current compilers. Reviewed-by: dholmes, dice, jcoomes, kvn
author ysr
date Tue, 10 Aug 2010 14:53:35 -0700
parents c18cbe5936b8
children f95d63e2154a
comparison
equal deleted inserted replaced
1710:94251661de76 1711:a6bff45449bc
1 /* 1 /*
2 * Copyright (c) 2003, 2009, Oracle and/or its affiliates. All rights reserved. 2 * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 * 4 *
5 * This code is free software; you can redistribute it and/or modify it 5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as 6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation. 7 * published by the Free Software Foundation.
40 inline void OrderAccess::acquire() { 40 inline void OrderAccess::acquire() {
41 __asm__ volatile ("nop" : : :); 41 __asm__ volatile ("nop" : : :);
42 } 42 }
43 43
44 inline void OrderAccess::release() { 44 inline void OrderAccess::release() {
45 jint* dummy = (jint*)&dummy; 45 jint* local_dummy = (jint*)&local_dummy;
46 __asm__ volatile("stw %%g0, [%0]" : : "r" (dummy) : "memory"); 46 __asm__ volatile("stw %%g0, [%0]" : : "r" (local_dummy) : "memory");
47 } 47 }
48 48
49 inline void OrderAccess::fence() { 49 inline void OrderAccess::fence() {
50 __asm__ volatile ("membar #StoreLoad" : : :); 50 __asm__ volatile ("membar #StoreLoad" : : :);
51 } 51 }
55 inline void OrderAccess::acquire() { 55 inline void OrderAccess::acquire() {
56 _OrderAccess_acquire(); 56 _OrderAccess_acquire();
57 } 57 }
58 58
59 inline void OrderAccess::release() { 59 inline void OrderAccess::release() {
60 dummy = 0; 60 // Avoid hitting the same cache-line from
61 // different threads.
62 volatile jint local_dummy = 0;
61 } 63 }
62 64
63 inline void OrderAccess::fence() { 65 inline void OrderAccess::fence() {
64 _OrderAccess_fence(); 66 _OrderAccess_fence();
65 } 67 }