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comparison src/share/vm/c1/c1_LIRAssembler.hpp @ 2002:ac637b7220d1

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6985015: C1 needs to support compressed oops Summary: This change implements compressed oops for C1 for x64 and sparc. The changes are mostly on the codegen level, with a few exceptions when we do access things outside of the heap that are uncompressed from the IR. Compressed oops are now also enabled with tiered. Reviewed-by: twisti, kvn, never, phh
author iveresov
date Tue, 30 Nov 2010 23:23:40 -0800
parents f95d63e2154a
children 037c727f35fb
comparison
equal deleted inserted replaced
1972:f95d63e2154a 2002:ac637b7220d1
163 // returns offset of poll instruction 163 // returns offset of poll instruction
164 int safepoint_poll(LIR_Opr result, CodeEmitInfo* info); 164 int safepoint_poll(LIR_Opr result, CodeEmitInfo* info);
165 165
166 void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info); 166 void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
167 void const2stack(LIR_Opr src, LIR_Opr dest); 167 void const2stack(LIR_Opr src, LIR_Opr dest);
168 void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info); 168 void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide);
169 void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack); 169 void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack);
170 void reg2reg (LIR_Opr src, LIR_Opr dest); 170 void reg2reg (LIR_Opr src, LIR_Opr dest);
171 void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned); 171 void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type,
172 LIR_PatchCode patch_code, CodeEmitInfo* info,
173 bool pop_fpu_stack, bool wide, bool unaligned);
172 void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type); 174 void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type);
173 void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type); 175 void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type);
174 void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type, 176 void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type,
175 LIR_PatchCode patch_code = lir_patch_none, 177 LIR_PatchCode patch_code,
176 CodeEmitInfo* info = NULL, bool unaligned = false); 178 CodeEmitInfo* info, bool wide, bool unaligned);
177 179
178 void prefetchr (LIR_Opr src); 180 void prefetchr (LIR_Opr src);
179 void prefetchw (LIR_Opr src); 181 void prefetchw (LIR_Opr src);
180 182
181 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp); 183 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
209 211
210 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest); 212 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
211 213
212 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack); 214 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
213 void move_op(LIR_Opr src, LIR_Opr result, BasicType type, 215 void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
214 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned); 216 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide);
215 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); 217 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
216 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions 218 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions
217 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op); 219 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
218 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result); 220 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result);
219 221