Mercurial > hg > graal-compiler
comparison src/cpu/x86/vm/assembler_x86.hpp @ 20311:b1bc1af04c6e
8052081: Optimize generated by C2 code for Intel's Atom processor
Summary: Allow to execute vectorization and crc32 optimization on Atom. Enable UseFPUForSpilling by default on x86.
Reviewed-by: roland
author | kvn |
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date | Tue, 05 Aug 2014 15:02:10 -0700 |
parents | 606acabe7b5c |
children | 166d744df0de |
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20310:bfba6779654b | 20311:b1bc1af04c6e |
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1835 | 1835 |
1836 // duplicate 4-bytes integer data from src into 8 locations in dest | 1836 // duplicate 4-bytes integer data from src into 8 locations in dest |
1837 void vpbroadcastd(XMMRegister dst, XMMRegister src); | 1837 void vpbroadcastd(XMMRegister dst, XMMRegister src); |
1838 | 1838 |
1839 // Carry-Less Multiplication Quadword | 1839 // Carry-Less Multiplication Quadword |
1840 void pclmulqdq(XMMRegister dst, XMMRegister src, int mask); | |
1840 void vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask); | 1841 void vpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask); |
1841 | 1842 |
1842 // AVX instruction which is used to clear upper 128 bits of YMM registers and | 1843 // AVX instruction which is used to clear upper 128 bits of YMM registers and |
1843 // to avoid transaction penalty between AVX and SSE states. There is no | 1844 // to avoid transaction penalty between AVX and SSE states. There is no |
1844 // penalty if legacy SSE instructions are encoded using VEX prefix because | 1845 // penalty if legacy SSE instructions are encoded using VEX prefix because |