graal-compiler: src/cpu/x86/vm/macroAssembler

comparison src/cpu/x86/vm/macroAssembler_x86.cpp @ 8883:b9a918201d47

Merge with hsx25

author	Gilles Duboscq <duboscq@ssw.jku.at>
date	Sat, 06 Apr 2013 20:04:06 +0200
parents	ded5288f5b96 e961c11b85fe
children	6b0fd0964b87

comparison

equal deleted inserted replaced

-:d47b52b0ff68
+:b9a918201d47
 void MacroAssembler::verify_oop(Register reg, const char* s) {
 if (!VerifyOops) return;
 // Pass register number to verify_oop_subroutine
-char* b = new char[strlen(s) + 50];
+const char* b = NULL;
-sprintf(b, "verify_oop: %s: %s", reg->name(), s);
+{
+ResourceMark rm;
+stringStream ss;
+ss.print("verify_oop: %s: %s", reg->name(), s);
+b = code_string(ss.as_string());
+}
 BLOCK_COMMENT("verify_oop {");
 #ifdef _LP64
 push(rscratch1);                    // save r10, trashed by movptr()
 #endif
 push(rax);                          // save rax,
 #ifdef ASSERT
 { Label L;
 testptr(tmp, tmp);
 if (WizardMode) {
+const char* buf = NULL;
+{
+ResourceMark rm;
+stringStream ss;
+ss.print("DelayedValue="INTPTR_FORMAT, delayed_value_addr[1]);
+buf = code_string(ss.as_string());
+}
 jcc(Assembler::notZero, L);
-char* buf = new char[40];
-sprintf(buf, "DelayedValue="INTPTR_FORMAT, delayed_value_addr[1]);
 STOP(buf);
 } else {
 jccb(Assembler::notZero, L);
 hlt();
 }
 void MacroAssembler::verify_oop_addr(Address addr, const char* s) {
 if (!VerifyOops) return;
 // Address adjust(addr.base(), addr.index(), addr.scale(), addr.disp() + BytesPerWord);
 // Pass register number to verify_oop_subroutine
-char* b = new char[strlen(s) + 50];
+const char* b = NULL;
-sprintf(b, "verify_oop_addr: %s", s);
+{
+ResourceMark rm;
+stringStream ss;
+ss.print("verify_oop_addr: %s", s);
+b = code_string(ss.as_string());
+}
 #ifdef _LP64
 push(rscratch1);                    // save r10, trashed by movptr()
 #endif
 push(rax);                          // save rax,
 // addr may contain rsp so we will have to adjust it based on the push
 bind(L);
 }
 pop_CPU_state();
 }
+void MacroAssembler::restore_cpu_control_state_after_jni() {
+// Either restore the MXCSR register after returning from the JNI Call
+// or verify that it wasn't changed (with -Xcheck:jni flag).
+if (VM_Version::supports_sse()) {
+if (RestoreMXCSROnJNICalls) {
+ldmxcsr(ExternalAddress(StubRoutines::addr_mxcsr_std()));
+} else if (CheckJNICalls) {
+call(RuntimeAddress(StubRoutines::x86::verify_mxcsr_entry()));
+}
+}
+if (VM_Version::supports_avx()) {
+// Clear upper bits of YMM registers to avoid SSE <-> AVX transition penalty.
+vzeroupper();
+}
+#ifndef _LP64
+// Either restore the x87 floating pointer control word after returning
+// from the JNI call or verify that it wasn't changed.
+if (CheckJNICalls) {
+call(RuntimeAddress(StubRoutines::x86::verify_fpu_cntrl_wrd_entry()));
+}
+#endif // _LP64
+}
 void MacroAssembler::load_klass(Register dst, Register src) {
 #ifdef _LP64
 if (UseCompressedKlassPointers) {
 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
 decode_klass_not_null(dst);
 vptest(vec1, vec1);
 jccb(Assembler::notZero, VECTOR_NOT_EQUAL);
 addptr(result, stride2);
 subl(cnt2, stride2);
 jccb(Assembler::notZero, COMPARE_WIDE_VECTORS_LOOP);
+// clean upper bits of YMM registers
+vzeroupper();
 // compare wide vectors tail
 bind(COMPARE_WIDE_TAIL);
 testptr(result, result);
 jccb(Assembler::zero, LENGTH_DIFF_LABEL);
 negptr(result);
 jmpb(COMPARE_WIDE_VECTORS_LOOP);
 // Identifies the mismatching (higher or lower)16-bytes in the 32-byte vectors.
 bind(VECTOR_NOT_EQUAL);
+// clean upper bits of YMM registers
+vzeroupper();
 lea(str1, Address(str1, result, scale));
 lea(str2, Address(str2, result, scale));
 jmp(COMPARE_16_CHARS);
 // Compare tail chars, length between 1 to 15 chars
 bind(FALSE_LABEL);
 xorl(result, result); // return false
 // That's it
 bind(DONE);
+if (UseAVX >= 2) {
+// clean upper bits of YMM registers
+vzeroupper();
+}
 }
 void MacroAssembler::generate_fill(BasicType t, bool aligned,
 Register to, Register value, Register count,
 Register rtmp, XMMRegister xtmp) {
 addl(count, 8 << shift);
 jccb(Assembler::less, L_check_fill_8_bytes);
 vmovdqu(Address(to, 0), xtmp);
 addptr(to, 32);
 subl(count, 8 << shift);
+BIND(L_check_fill_8_bytes);
+// clean upper bits of YMM registers
+vzeroupper();
 } else {
 // Fill 32-byte chunks
 pshufd(xtmp, xtmp, 0);
 subl(count, 8 << shift);
 }
 addptr(to, 32);
 subl(count, 8 << shift);
 jcc(Assembler::greaterEqual, L_fill_32_bytes_loop);
+BIND(L_check_fill_8_bytes);
 }
-BIND(L_check_fill_8_bytes);
 addl(count, 8 << shift);
 jccb(Assembler::zero, L_exit);
 jmpb(L_fill_8_bytes);
 //
 bind(L_chars_16_check);
 addptr(len, 16);
 jccb(Assembler::lessEqual, L_copy_16_chars);
 bind(L_copy_16_chars_exit);
+if (UseAVX >= 2) {
+// clean upper bits of YMM registers
+vzeroupper();
+}
 subptr(len, 8);
 jccb(Assembler::greater, L_copy_8_chars_exit);
 bind(L_copy_8_chars);
 movdqu(tmp3Reg, Address(src, len, Address::times_2, -16));

Mercurial > hg > graal-compiler

comparison src/cpu/x86/vm/macroAssembler_x86.cpp @ 8883:b9a918201d47