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comparison src/cpu/x86/vm/assembler_x86.hpp @ 3249:e1162778c1c8

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7009266: G1: assert(obj->is_oop_or_null(true )) failed: Error Summary: A referent object that is only weakly reachable at the start of concurrent marking but is re-attached to the strongly reachable object graph during marking may not be marked as live. This can cause the reference object to be processed prematurely and leave dangling pointers to the referent object. Implement a read barrier for the java.lang.ref.Reference::referent field by intrinsifying the Reference.get() method, and intercepting accesses though JNI, reflection, and Unsafe, so that when a non-null referent object is read it is also logged in an SATB buffer. Reviewed-by: kvn, iveresov, never, tonyp, dholmes
author johnc
date Thu, 07 Apr 2011 09:53:20 -0700
parents 41d4973cf100
children 92add02409c9
comparison
equal deleted inserted replaced
3248:e6beb62de02d 3249:e1162778c1c8
1442 // on arguments should also go in here. 1442 // on arguments should also go in here.
1443 1443
1444 class MacroAssembler: public Assembler { 1444 class MacroAssembler: public Assembler {
1445 friend class LIR_Assembler; 1445 friend class LIR_Assembler;
1446 friend class Runtime1; // as_Address() 1446 friend class Runtime1; // as_Address()
1447
1447 protected: 1448 protected:
1448 1449
1449 Address as_Address(AddressLiteral adr); 1450 Address as_Address(AddressLiteral adr);
1450 Address as_Address(ArrayAddress adr); 1451 Address as_Address(ArrayAddress adr);
1451 1452
1663 1664
1664 // Stores 1665 // Stores
1665 void store_check(Register obj); // store check for obj - register is destroyed afterwards 1666 void store_check(Register obj); // store check for obj - register is destroyed afterwards
1666 void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed) 1667 void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed)
1667 1668
1669 #ifndef SERIALGC
1670
1668 void g1_write_barrier_pre(Register obj, 1671 void g1_write_barrier_pre(Register obj,
1669 #ifndef _LP64 1672 Register pre_val,
1670 Register thread, 1673 Register thread,
1671 #endif
1672 Register tmp, 1674 Register tmp,
1673 Register tmp2, 1675 bool tosca_live,
1674 bool tosca_live); 1676 bool expand_call);
1677
1675 void g1_write_barrier_post(Register store_addr, 1678 void g1_write_barrier_post(Register store_addr,
1676 Register new_val, 1679 Register new_val,
1677 #ifndef _LP64
1678 Register thread, 1680 Register thread,
1679 #endif
1680 Register tmp, 1681 Register tmp,
1681 Register tmp2); 1682 Register tmp2);
1682 1683
1684 #endif // SERIALGC
1683 1685
1684 // split store_check(Register obj) to enhance instruction interleaving 1686 // split store_check(Register obj) to enhance instruction interleaving
1685 void store_check_part_1(Register obj); 1687 void store_check_part_1(Register obj);
1686 void store_check_part_2(Register obj); 1688 void store_check_part_2(Register obj);
1687 1689