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comparison graal/com.oracle.max.asm/src/com/oracle/max/asm/target/amd64/AMD64.java @ 3733:e233f5660da4

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Added Java files from Maxine project.
author Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
date Sat, 17 Dec 2011 19:59:18 +0100
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children 8c9c0e1eaab1
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3732:3e2e8b8abdaf 3733:e233f5660da4
1 /*
2 * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23 package com.oracle.max.asm.target.amd64;
24
25 import static com.oracle.max.cri.intrinsics.MemoryBarriers.*;
26 import static com.sun.cri.ci.CiKind.*;
27 import static com.sun.cri.ci.CiRegister.RegisterFlag.*;
28
29 import com.sun.cri.ci.*;
30 import com.sun.cri.ci.CiRegister.RegisterFlag;
31
32 /**
33 * Represents the AMD64 architecture.
34 */
35 public class AMD64 extends CiArchitecture {
36
37 // General purpose CPU registers
38 public static final CiRegister rax = new CiRegister(0, 0, 8, "rax", CPU, RegisterFlag.Byte);
39 public static final CiRegister rcx = new CiRegister(1, 1, 8, "rcx", CPU, RegisterFlag.Byte);
40 public static final CiRegister rdx = new CiRegister(2, 2, 8, "rdx", CPU, RegisterFlag.Byte);
41 public static final CiRegister rbx = new CiRegister(3, 3, 8, "rbx", CPU, RegisterFlag.Byte);
42 public static final CiRegister rsp = new CiRegister(4, 4, 8, "rsp", CPU, RegisterFlag.Byte);
43 public static final CiRegister rbp = new CiRegister(5, 5, 8, "rbp", CPU, RegisterFlag.Byte);
44 public static final CiRegister rsi = new CiRegister(6, 6, 8, "rsi", CPU, RegisterFlag.Byte);
45 public static final CiRegister rdi = new CiRegister(7, 7, 8, "rdi", CPU, RegisterFlag.Byte);
46
47 public static final CiRegister r8 = new CiRegister(8, 8, 8, "r8", CPU, RegisterFlag.Byte);
48 public static final CiRegister r9 = new CiRegister(9, 9, 8, "r9", CPU, RegisterFlag.Byte);
49 public static final CiRegister r10 = new CiRegister(10, 10, 8, "r10", CPU, RegisterFlag.Byte);
50 public static final CiRegister r11 = new CiRegister(11, 11, 8, "r11", CPU, RegisterFlag.Byte);
51 public static final CiRegister r12 = new CiRegister(12, 12, 8, "r12", CPU, RegisterFlag.Byte);
52 public static final CiRegister r13 = new CiRegister(13, 13, 8, "r13", CPU, RegisterFlag.Byte);
53 public static final CiRegister r14 = new CiRegister(14, 14, 8, "r14", CPU, RegisterFlag.Byte);
54 public static final CiRegister r15 = new CiRegister(15, 15, 8, "r15", CPU, RegisterFlag.Byte);
55
56 public static final CiRegister[] cpuRegisters = {
57 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
58 r8, r9, r10, r11, r12, r13, r14, r15
59 };
60
61 // XMM registers
62 public static final CiRegister xmm0 = new CiRegister(16, 0, 8, "xmm0", FPU);
63 public static final CiRegister xmm1 = new CiRegister(17, 1, 8, "xmm1", FPU);
64 public static final CiRegister xmm2 = new CiRegister(18, 2, 8, "xmm2", FPU);
65 public static final CiRegister xmm3 = new CiRegister(19, 3, 8, "xmm3", FPU);
66 public static final CiRegister xmm4 = new CiRegister(20, 4, 8, "xmm4", FPU);
67 public static final CiRegister xmm5 = new CiRegister(21, 5, 8, "xmm5", FPU);
68 public static final CiRegister xmm6 = new CiRegister(22, 6, 8, "xmm6", FPU);
69 public static final CiRegister xmm7 = new CiRegister(23, 7, 8, "xmm7", FPU);
70
71 public static final CiRegister xmm8 = new CiRegister(24, 8, 8, "xmm8", FPU);
72 public static final CiRegister xmm9 = new CiRegister(25, 9, 8, "xmm9", FPU);
73 public static final CiRegister xmm10 = new CiRegister(26, 10, 8, "xmm10", FPU);
74 public static final CiRegister xmm11 = new CiRegister(27, 11, 8, "xmm11", FPU);
75 public static final CiRegister xmm12 = new CiRegister(28, 12, 8, "xmm12", FPU);
76 public static final CiRegister xmm13 = new CiRegister(29, 13, 8, "xmm13", FPU);
77 public static final CiRegister xmm14 = new CiRegister(30, 14, 8, "xmm14", FPU);
78 public static final CiRegister xmm15 = new CiRegister(31, 15, 8, "xmm15", FPU);
79
80 public static final CiRegister[] xmmRegisters = {
81 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
82 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
83 };
84
85 public static final CiRegister[] cpuxmmRegisters = {
86 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
87 r8, r9, r10, r11, r12, r13, r14, r15,
88 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
89 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
90 };
91
92 /**
93 * Register used to construct an instruction-relative address.
94 */
95 public static final CiRegister rip = new CiRegister(32, -1, 0, "rip");
96
97 public static final CiRegister[] allRegisters = {
98 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
99 r8, r9, r10, r11, r12, r13, r14, r15,
100 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
101 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
102 rip
103 };
104
105 public static final CiRegisterValue RSP = rsp.asValue(Long);
106
107 public AMD64() {
108 super("AMD64",
109 8,
110 ByteOrder.LittleEndian,
111 allRegisters,
112 LOAD_STORE | STORE_STORE,
113 1,
114 r15.encoding + 1,
115 8);
116 }
117
118 @Override
119 public boolean isX86() {
120 return true;
121 }
122
123 @Override
124 public boolean twoOperandMode() {
125 return true;
126 }
127
128 }