graal-compiler: src/share/vm/opto/output.cpp comparison

comparison src/share/vm/opto/output.cpp @ 14412:e2722a66aba7

Merge

author	kvn
date	Thu, 05 Sep 2013 11:04:39 -0700
parents	75ef1a499665 adb9a7d94cb5
children	2b8e28fdf503

comparison

equal deleted inserted replaced

-:bdd155477289
+:e2722a66aba7
 #endif
 extern int emit_exception_handler(CodeBuffer &cbuf);
 extern int emit_deopt_handler(CodeBuffer &cbuf);
-//------------------------------Output-----------------------------------------
 // Convert Nodes to instruction bits and pass off to the VM
 void Compile::Output() {
 // RootNode goes
-assert( _cfg->_broot->_nodes.size() == 0, "" );
+assert( _cfg->get_root_block()->_nodes.size() == 0, "" );
 // The number of new nodes (mostly MachNop) is proportional to
 // the number of java calls and inner loops which are aligned.
 if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 +
 C->inner_loops()*(OptoLoopAlignment-1)),
 "out of nodes before code generation" ) ) {
 return;
 }
 // Make sure I can find the Start Node
-Block_Array& bbs = _cfg->_bbs;
+Block *entry = _cfg->get_block(1);
-Block *entry = _cfg->_blocks[1];
+Block *broot = _cfg->get_root_block();
-Block *broot = _cfg->_broot;
 const StartNode *start = entry->_nodes[0]->as_Start();
 // Replace StartNode with prolog
 MachPrologNode *prolog = new (this) MachPrologNode();
 entry->_nodes.map( 0, prolog );
-bbs.map( prolog->_idx, entry );
+_cfg->map_node_to_block(prolog, entry);
-bbs.map( start->_idx, NULL ); // start is no longer in any block
+_cfg->unmap_node_from_block(start); // start is no longer in any block
 // Virtual methods need an unverified entry point
 if( is_osr_compilation() ) {
 if( PoisonOSREntry ) {
 // runtime stubs or frame converters
 _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
 }
 // Insert epilogs before every return
-for( uint i=0; i<_cfg->_num_blocks; i++ ) {
+for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
-Block *b = _cfg->_blocks[i];
+Block* block = _cfg->get_block(i);
-if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
+if (!block->is_connector() && block->non_connector_successor(0) == _cfg->get_root_block()) { // Found a program exit point?
-Node *m = b->end();
+Node* m = block->end();
-if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
+if (m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt) {
-MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
+MachEpilogNode* epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
-b->add_inst( epilog );
+block->add_inst(epilog);
-bbs.map(epilog->_idx, b);
+_cfg->map_node_to_block(epilog, block);
-//_regalloc->set_bad(epilog->_idx); // Already initialized this way.
 }
 }
 }
 # ifdef ENABLE_ZAP_DEAD_LOCALS
-if ( ZapDeadCompiledLocals )  Insert_zap_nodes();
+if (ZapDeadCompiledLocals) {
+Insert_zap_nodes();
+}
 # endif
-uint* blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
+uint* blk_starts = NEW_RESOURCE_ARRAY(uint, _cfg->number_of_blocks() + 1);
-blk_starts[0]    = 0;
+blk_starts[0] = 0;
 // Initialize code buffer and process short branches.
 CodeBuffer* cb = init_buffer(blk_starts);
-if (cb == NULL || failing())  return;
+if (cb == NULL || failing()) {
+return;
+}
 ScheduleAndBundle();
 #ifndef PRODUCT
 if (trace_opto_output()) {
 tty->print("\n---- After ScheduleAndBundle ----\n");
-for (uint i = 0; i < _cfg->_num_blocks; i++) {
+for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
 tty->print("\nBB#%03d:\n", i);
-Block *bb = _cfg->_blocks[i];
+Block* block = _cfg->get_block(i);
-for (uint j = 0; j < bb->_nodes.size(); j++) {
+for (uint j = 0; j < block->_nodes.size(); j++) {
-Node *n = bb->_nodes[j];
+Node* n = block->_nodes[j];
 OptoReg::Name reg = _regalloc->get_reg_first(n);
 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
 n->dump();
 }
 }
 }
 #endif
-if (failing())  return;
+if (failing()) {
+return;
+}
 BuildOopMaps();
-if (failing())  return;
+if (failing())  {
+return;
+}
 fill_buffer(cb, blk_starts);
 }
 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
 if ( _method == NULL )
 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
 // Insert call to zap runtime stub before every node with an oop map
-for( uint i=0; i<_cfg->_num_blocks; i++ ) {
+for( uint i=0; i<_cfg->number_of_blocks(); i++ ) {
-Block *b = _cfg->_blocks[i];
+Block *b = _cfg->get_block(i);
 for ( uint j = 0;  j < b->_nodes.size();  ++j ) {
 Node *n = b->_nodes[j];
 // Determining if we should insert a zap-a-lot node in output.
 // We do that for all nodes that has oopmap info, except for calls
 }
 }
 if (insert) {
 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
 b->_nodes.insert( j, zap );
-_cfg->_bbs.map( zap->_idx, b );
+_cfg->map_node_to_block(zap, b);
 ++j;
 }
 }
 }
 }
 // Add the cloned OopMap to the zap node
 ideal_node->set_oop_map(clone);
 return _matcher->match_sfpt(ideal_node);
 }
-//------------------------------is_node_getting_a_safepoint--------------------
 bool Compile::is_node_getting_a_safepoint( Node* n) {
 // This code duplicates the logic prior to the call of add_safepoint
 // below in this file.
 if( n->is_MachSafePoint() ) return true;
 return false;
 }
 # endif // ENABLE_ZAP_DEAD_LOCALS
-//------------------------------compute_loop_first_inst_sizes------------------
 // Compute the size of first NumberOfLoopInstrToAlign instructions at the top
 // of a loop. When aligning a loop we need to provide enough instructions
 // in cpu's fetch buffer to feed decoders. The loop alignment could be
 // avoided if we have enough instructions in fetch buffer at the head of a loop.
 // By default, the size is set to 999999 by Block's constructor so that
 // The next condition is used to gate the loop alignment optimization.
 // Don't aligned a loop if there are enough instructions at the head of a loop
 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
 // equal to 11 bytes which is the largest address NOP instruction.
-if( MaxLoopPad < OptoLoopAlignment-1 ) {
+if (MaxLoopPad < OptoLoopAlignment - 1) {
-uint last_block = _cfg->_num_blocks-1;
+uint last_block = _cfg->number_of_blocks() - 1;
-for( uint i=1; i <= last_block; i++ ) {
+for (uint i = 1; i <= last_block; i++) {
-Block *b = _cfg->_blocks[i];
+Block* block = _cfg->get_block(i);
 // Check the first loop's block which requires an alignment.
-if( b->loop_alignment() > (uint)relocInfo::addr_unit() ) {
+if (block->loop_alignment() > (uint)relocInfo::addr_unit()) {
 uint sum_size = 0;
 uint inst_cnt = NumberOfLoopInstrToAlign;
-inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
+inst_cnt = block->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
 // Check subsequent fallthrough blocks if the loop's first
 // block(s) does not have enough instructions.
-Block *nb = b;
+Block *nb = block;
-while( inst_cnt > 0 &&
+while(inst_cnt > 0 &&
 i < last_block &&
-!_cfg->_blocks[i+1]->has_loop_alignment() &&
+!_cfg->get_block(i + 1)->has_loop_alignment() &&
-!nb->has_successor(b) ) {
+!nb->has_successor(block)) {
 i++;
-nb = _cfg->_blocks[i];
+nb = _cfg->get_block(i);
 inst_cnt  = nb->compute_first_inst_size(sum_size, inst_cnt, _regalloc);
 } // while( inst_cnt > 0 && i < last_block  )
-b->set_first_inst_size(sum_size);
+block->set_first_inst_size(sum_size);
 } // f( b->head()->is_Loop() )
 } // for( i <= last_block )
 } // if( MaxLoopPad < OptoLoopAlignment-1 )
 }
-//----------------------shorten_branches---------------------------------------
 // The architecture description provides short branch variants for some long
 // branch instructions. Replace eligible long branches with short branches.
 void Compile::shorten_branches(uint* blk_starts, int& code_size, int& reloc_size, int& stub_size) {
-// ------------------
 // Compute size of each block, method size, and relocation information size
-uint nblocks  = _cfg->_num_blocks;
+uint nblocks  = _cfg->number_of_blocks();
 uint*      jmp_offset = NEW_RESOURCE_ARRAY(uint,nblocks);
 uint*      jmp_size   = NEW_RESOURCE_ARRAY(uint,nblocks);
 int*       jmp_nidx   = NEW_RESOURCE_ARRAY(int ,nblocks);
 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,nblocks); )
 // Step one, perform a pessimistic sizing pass.
 uint last_call_adr = max_uint;
 uint last_avoid_back_to_back_adr = max_uint;
 uint nop_size = (new (this) MachNopNode())->size(_regalloc);
 for (uint i = 0; i < nblocks; i++) { // For all blocks
-Block *b = _cfg->_blocks[i];
+Block* block = _cfg->get_block(i);
 // During short branch replacement, we store the relative (to blk_starts)
 // offset of jump in jmp_offset, rather than the absolute offset of jump.
 // This is so that we do not need to recompute sizes of all nodes when
 // we compute correct blk_starts in our next sizing pass.
 jmp_nidx[i]   = -1;
 DEBUG_ONLY( jmp_target[i] = 0; )
 DEBUG_ONLY( jmp_rule[i]   = 0; )
 // Sum all instruction sizes to compute block size
-uint last_inst = b->_nodes.size();
+uint last_inst = block->_nodes.size();
 uint blk_size = 0;
 for (uint j = 0; j < last_inst; j++) {
-Node* nj = b->_nodes[j];
+Node* nj = block->_nodes[j];
 // Handle machine instruction nodes
 if (nj->is_Mach()) {
 MachNode *mach = nj->as_Mach();
 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
 reloc_size += mach->reloc();
 }
 // When the next block starts a loop, we may insert pad NOP
 // instructions.  Since we cannot know our future alignment,
 // assume the worst.
-if (i< nblocks-1) {
+if (i < nblocks - 1) {
-Block *nb = _cfg->_blocks[i+1];
+Block* nb = _cfg->get_block(i + 1);
 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
 if (max_loop_pad > 0) {
 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
 // Adjust last_call_adr and/or last_avoid_back_to_back_adr.
 // If either is the last instruction in this block, bump by
 while (has_short_branch_candidate && progress) {
 progress = false;
 has_short_branch_candidate = false;
 int adjust_block_start = 0;
 for (uint i = 0; i < nblocks; i++) {
-Block *b = _cfg->_blocks[i];
+Block* block = _cfg->get_block(i);
 int idx = jmp_nidx[i];
-MachNode* mach = (idx == -1) ? NULL: b->_nodes[idx]->as_Mach();
+MachNode* mach = (idx == -1) ? NULL: block->_nodes[idx]->as_Mach();
 if (mach != NULL && mach->may_be_short_branch()) {
 #ifdef ASSERT
 assert(jmp_size[i] > 0 && mach->is_MachBranch(), "sanity");
 int j;
 // Find the branch; ignore trailing NOPs.
-for (j = b->_nodes.size()-1; j>=0; j--) {
+for (j = block->_nodes.size()-1; j>=0; j--) {
-Node* n = b->_nodes[j];
+Node* n = block->_nodes[j];
 if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con)
 break;
 }
-assert(j >= 0 && j == idx && b->_nodes[j] == (Node*)mach, "sanity");
+assert(j >= 0 && j == idx && block->_nodes[j] == (Node*)mach, "sanity");
 #endif
 int br_size = jmp_size[i];
 int br_offs = blk_starts[i] + jmp_offset[i];
 // This requires the TRUE branch target be in succs[0]
-uint bnum = b->non_connector_successor(0)->_pre_order;
+uint bnum = block->non_connector_successor(0)->_pre_order;
 int offset = blk_starts[bnum] - br_offs;
 if (bnum > i) { // adjust following block's offset
 offset -= adjust_block_start;
 }
 // In the following code a nop could be inserted before
 if (needs_padding && replacement->avoid_back_to_back()) {
 jmp_offset[i] += nop_size;
 diff -= nop_size;
 }
 adjust_block_start += diff;
-b->_nodes.map(idx, replacement);
+block->_nodes.map(idx, replacement);
 mach->subsume_by(replacement, C);
 mach = replacement;
 progress = true;
 jmp_size[i] = new_size;
 assert(_frame_slots >= 0 && _frame_slots < 1000000, "sanity check");
 if (has_mach_constant_base_node()) {
 // Fill the constant table.
 // Note:  This must happen before shorten_branches.
-for (uint i = 0; i < _cfg->_num_blocks; i++) {
+for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
-Block* b = _cfg->_blocks[i];
+Block* b = _cfg->get_block(i);
 for (uint j = 0; j < b->_nodes.size(); j++) {
 Node* n = b->_nodes[j];
 // If the node is a MachConstantNode evaluate the constant
 _oop_map_set = new OopMapSet();
 // !!!!! This preserves old handling of oopmaps for now
 debug_info()->set_oopmaps(_oop_map_set);
-uint nblocks  = _cfg->_num_blocks;
+uint nblocks  = _cfg->number_of_blocks();
 // Count and start of implicit null check instructions
 uint inct_cnt = 0;
 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, nblocks+1);
 // Count and start of calls
 // ------------------
 // Now fill in the code buffer
 Node *delay_slot = NULL;
-for (uint i=0; i < nblocks; i++) {
+for (uint i = 0; i < nblocks; i++) {
-Block *b = _cfg->_blocks[i];
+Block* block = _cfg->get_block(i);
+Node* head = block->head();
-Node *head = b->head();
 // If this block needs to start aligned (i.e, can be reached other
 // than by falling-thru from the previous block), then force the
 // start of a new bundle.
-if (Pipeline::requires_bundling() && starts_bundle(head))
+if (Pipeline::requires_bundling() && starts_bundle(head)) {
 cb->flush_bundle(true);
+}
 #ifdef ASSERT
-if (!b->is_connector()) {
+if (!block->is_connector()) {
 stringStream st;
-b->dump_head(&_cfg->_bbs, &st);
+block->dump_head(_cfg, &st);
 MacroAssembler(cb).block_comment(st.as_string());
 }
 jmp_target[i] = 0;
 jmp_offset[i] = 0;
 jmp_size[i]   = 0;
 jmp_rule[i]   = 0;
 #endif
 int blk_offset = current_offset;
 // Define the label at the beginning of the basic block
-MacroAssembler(cb).bind(blk_labels[b->_pre_order]);
+MacroAssembler(cb).bind(blk_labels[block->_pre_order]);
-uint last_inst = b->_nodes.size();
+uint last_inst = block->_nodes.size();
 // Emit block normally, except for last instruction.
 // Emit means "dump code bits into code buffer".
 for (uint j = 0; j<last_inst; j++) {
 // Get the node
-Node* n = b->_nodes[j];
+Node* n = block->_nodes[j];
 // See if delay slots are supported
 if (valid_bundle_info(n) &&
 node_bundling(n)->used_in_unconditional_delay()) {
 assert(delay_slot == NULL, "no use of delay slot node");
 if(padding > 0) {
 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
 int nops_cnt = padding / nop_size;
 MachNode *nop = new (this) MachNopNode(nops_cnt);
-b->_nodes.insert(j++, nop);
+block->_nodes.insert(j++, nop);
 last_inst++;
-_cfg->_bbs.map( nop->_idx, b );
+_cfg->map_node_to_block(nop, block);
 nop->emit(*cb, _regalloc);
 cb->flush_bundle(true);
 current_offset = cb->insts_size();
 }
 // This destination address is NOT PC-relative
 mcall->method_set((intptr_t)mcall->entry_point());
 // Save the return address
-call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
+call_returns[block->_pre_order] = current_offset + mcall->ret_addr_offset();
 if (mcall->is_MachCallLeaf()) {
 is_mcall = false;
 is_sfn = false;
 }
 }
 // If this is a branch, then fill in the label with the target BB's label
 else if (mach->is_MachBranch()) {
 // This requires the TRUE branch target be in succs[0]
-uint block_num = b->non_connector_successor(0)->_pre_order;
+uint block_num = block->non_connector_successor(0)->_pre_order;
 // Try to replace long branch if delay slot is not used,
 // it is mostly for back branches since forward branch's
 // distance is not updated yet.
 bool delay_slot_is_used = valid_bundle_info(n) &&
 int new_size = replacement->size(_regalloc);
 assert((br_size - new_size) >= (int)nop_size, "short_branch size should be smaller");
 // Insert padding between avoid_back_to_back branches.
 if (needs_padding && replacement->avoid_back_to_back()) {
 MachNode *nop = new (this) MachNopNode();
-b->_nodes.insert(j++, nop);
+block->_nodes.insert(j++, nop);
-_cfg->_bbs.map(nop->_idx, b);
+_cfg->map_node_to_block(nop, block);
 last_inst++;
 nop->emit(*cb, _regalloc);
 cb->flush_bundle(true);
 current_offset = cb->insts_size();
 }
 jmp_target[i] = block_num;
 jmp_offset[i] = current_offset - blk_offset;
 jmp_size[i]   = new_size;
 jmp_rule[i]   = mach->rule();
 #endif
-b->_nodes.map(j, replacement);
+block->_nodes.map(j, replacement);
 mach->subsume_by(replacement, C);
 n    = replacement;
 mach = replacement;
 }
 }
 mach->as_MachBranch()->label_set( &blk_labels[block_num], block_num );
 } else if (mach->ideal_Opcode() == Op_Jump) {
-for (uint h = 0; h < b->_num_succs; h++) {
+for (uint h = 0; h < block->_num_succs; h++) {
-Block* succs_block = b->_succs[h];
+Block* succs_block = block->_succs[h];
 for (uint j = 1; j < succs_block->num_preds(); j++) {
 Node* jpn = succs_block->pred(j);
 if (jpn->is_JumpProj() && jpn->in(0) == mach) {
 uint block_num = succs_block->non_connector()->_pre_order;
 Label *blkLabel = &blk_labels[block_num];
 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
 }
 }
 }
 }
 #ifdef ASSERT
 // Check that oop-store precedes the card-mark
 else if (mach->ideal_Opcode() == Op_StoreCM) {
 uint storeCM_idx = j;
 int count = 0;
 for (uint prec = mach->req(); prec < mach->len(); prec++) {
 Node *oop_store = mach->in(prec);  // Precedence edge
 if (oop_store == NULL) continue;
 count++;
 uint i4;
-for( i4 = 0; i4 < last_inst; ++i4 ) {
+for (i4 = 0; i4 < last_inst; ++i4) {
-if( b->_nodes[i4] == oop_store ) break;
+if (block->_nodes[i4] == oop_store) {
+break;
+}
 }
 // Note: This test can provide a false failure if other precedence
 // edges have been added to the storeCMNode.
-assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
+assert(i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
 }
 assert(count > 0, "storeCM expects at least one precedence edge");
 }
 #endif
 else if (!n->is_Proj()) {
 // Remember the beginning of the previous instruction, in case
 // it's followed by a flag-kill and a null-check.  Happens on
 // Intel all the time, with add-to-memory kind of opcodes.
 previous_offset = current_offset;
 } // End for all instructions in block
 // If the next block is the top of a loop, pad this block out to align
 // the loop top a little. Helps prevent pipe stalls at loop back branches.
 if (i < nblocks-1) {
-Block *nb = _cfg->_blocks[i+1];
+Block *nb = _cfg->get_block(i + 1);
 int padding = nb->alignment_padding(current_offset);
 if( padding > 0 ) {
 MachNode *nop = new (this) MachNopNode(padding / nop_size);
-b->_nodes.insert( b->_nodes.size(), nop );
+block->_nodes.insert(block->_nodes.size(), nop);
-_cfg->_bbs.map( nop->_idx, b );
+_cfg->map_node_to_block(nop, block);
 nop->emit(*cb, _regalloc);
 current_offset = cb->insts_size();
 }
 }
 // Verify that the distance for generated before forward
 assert(false, "Displacement too large for short jmp");
 }
 }
 }
 #endif
-// ------------------
 #ifndef PRODUCT
 // Information on the size of the method, without the extraneous code
 Scheduling::increment_method_size(cb->insts_size());
 #endif
 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
 _inc_table.set_size(cnt);
 uint inct_cnt = 0;
-for( uint i=0; i<_cfg->_num_blocks; i++ ) {
+for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
-Block *b = _cfg->_blocks[i];
+Block* block = _cfg->get_block(i);
 Node *n = NULL;
 int j;
 // Find the branch; ignore trailing NOPs.
-for( j = b->_nodes.size()-1; j>=0; j-- ) {
+for (j = block->_nodes.size() - 1; j >= 0; j--) {
-n = b->_nodes[j];
+n = block->_nodes[j];
-if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
+if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con) {
 break;
+}
 }
 // If we didn't find anything, continue
-if( j < 0 ) continue;
+if (j < 0) {
+continue;
+}
 // Compute ExceptionHandlerTable subtable entry and add it
 // (skip empty blocks)
-if( n->is_Catch() ) {
+if (n->is_Catch()) {
 // Get the offset of the return from the call
-uint call_return = call_returns[b->_pre_order];
+uint call_return = call_returns[block->_pre_order];
 #ifdef ASSERT
 assert( call_return > 0, "no call seen for this basic block" );
-while( b->_nodes[--j]->is_MachProj() ) ;
+while (block->_nodes[--j]->is_MachProj()) ;
-assert( b->_nodes[j]->is_MachCall(), "CatchProj must follow call" );
+assert(block->_nodes[j]->is_MachCall(), "CatchProj must follow call");
 #endif
 // last instruction is a CatchNode, find it's CatchProjNodes
-int nof_succs = b->_num_succs;
+int nof_succs = block->_num_succs;
 // allocate space
 GrowableArray<intptr_t> handler_bcis(nof_succs);
 GrowableArray<intptr_t> handler_pcos(nof_succs);
 // iterate through all successors
 for (int j = 0; j < nof_succs; j++) {
-Block* s = b->_succs[j];
+Block* s = block->_succs[j];
 bool found_p = false;
-for( uint k = 1; k < s->num_preds(); k++ ) {
+for (uint k = 1; k < s->num_preds(); k++) {
-Node *pk = s->pred(k);
+Node* pk = s->pred(k);
-if( pk->is_CatchProj() && pk->in(0) == n ) {
+if (pk->is_CatchProj() && pk->in(0) == n) {
 const CatchProjNode* p = pk->as_CatchProj();
 found_p = true;
 // add the corresponding handler bci & pco information
-if( p->_con != CatchProjNode::fall_through_index ) {
+if (p->_con != CatchProjNode::fall_through_index) {
 // p leads to an exception handler (and is not fall through)
-assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
+assert(s == _cfg->get_block(s->_pre_order), "bad numbering");
 // no duplicates, please
-if( !handler_bcis.contains(p->handler_bci()) ) {
+if (!handler_bcis.contains(p->handler_bci())) {
 uint block_num = s->non_connector()->_pre_order;
 handler_bcis.append(p->handler_bci());
 handler_pcos.append(blk_labels[block_num].loc_pos());
 }
 }
 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
 continue;
 }
 // Handle implicit null exception table updates
-if( n->is_MachNullCheck() ) {
+if (n->is_MachNullCheck()) {
-uint block_num = b->non_connector_successor(0)->_pre_order;
+uint block_num = block->non_connector_successor(0)->_pre_order;
-_inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
+_inc_table.append(inct_starts[inct_cnt++], blk_labels[block_num].loc_pos());
 continue;
 }
 } // End of for all blocks fill in exception table entries
 }
 // Initializer for class Scheduling
 Scheduling::Scheduling(Arena *arena, Compile &compile)
 : _arena(arena),
 _cfg(compile.cfg()),
-_bbs(compile.cfg()->_bbs),
 _regalloc(compile.regalloc()),
 _reg_node(arena),
 _bundle_instr_count(0),
 _bundle_cycle_number(0),
 _scheduled(arena),
 memset(_node_latency,       0, node_max * sizeof(unsigned short));
 memset(_uses,               0, node_max * sizeof(short));
 memset(_current_latency,    0, node_max * sizeof(unsigned short));
 // Clear the bundling information
-memcpy(_bundle_use_elements,
+memcpy(_bundle_use_elements, Pipeline_Use::elaborated_elements, sizeof(Pipeline_Use::elaborated_elements));
-Pipeline_Use::elaborated_elements,
-sizeof(Pipeline_Use::elaborated_elements));
 // Get the last node
-Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
+Block* block = _cfg->get_block(_cfg->number_of_blocks() - 1);
-_next_node = bb->_nodes[bb->_nodes.size()-1];
+_next_node = block->_nodes[block->_nodes.size() - 1];
 }
 #ifndef PRODUCT
 // Scheduling destructor
 Scheduling::~Scheduling() {
 memcpy(_bundle_use_elements,
 Pipeline_Use::elaborated_elements,
 sizeof(Pipeline_Use::elaborated_elements));
 }
-//------------------------------ScheduleAndBundle------------------------------
 // Perform instruction scheduling and bundling over the sequence of
 // instructions in backwards order.
 void Compile::ScheduleAndBundle() {
 // Don't optimize this if it isn't a method
 // Walk backwards over each basic block, computing the needed alignment
 // Walk over all the basic blocks
 scheduling.DoScheduling();
 }
-//------------------------------ComputeLocalLatenciesForward-------------------
 // Compute the latency of all the instructions.  This is fairly simple,
 // because we already have a legal ordering.  Walk over the instructions
 // from first to last, and compute the latency of the instruction based
 // on the latency of the preceding instruction(s).
 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
 #endif
 return _available[0];
 }
-//------------------------------AddNodeToAvailableList-------------------------
 void Scheduling::AddNodeToAvailableList(Node *n) {
 assert( !n->is_Proj(), "projections never directly made available" );
 #ifndef PRODUCT
 if (_cfg->C->trace_opto_output()) {
 tty->print("#   AddNodeToAvailableList: ");
 if (_cfg->C->trace_opto_output())
 dump_available();
 #endif
 }
-//------------------------------DecrementUseCounts-----------------------------
 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
 for ( uint i=0; i < n->len(); i++ ) {
 Node *def = n->in(i);
 if (!def) continue;
 if( def->is_Proj() )        // If this is a machine projection, then
 def = def->in(0);         // propagate usage thru to the base instruction
-if( _bbs[def->_idx] != bb ) // Ignore if not block-local
+if(_cfg->get_block_for_node(def) != bb) { // Ignore if not block-local
 continue;
+}
 // Compute the latency
 uint l = _bundle_cycle_number + n->latency(i);
 if (_current_latency[def->_idx] < l)
 _current_latency[def->_idx] = l;
 if ((--_uses[def->_idx]) == 0)
 AddNodeToAvailableList(def);
 }
 }
-//------------------------------AddNodeToBundle--------------------------------
 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
 #ifndef PRODUCT
 if (_cfg->C->trace_opto_output()) {
 tty->print("#   AddNodeToBundle: ");
 n->dump();
 // Walk all the definitions, decrementing use counts, and
 // if a definition has a 0 use count, place it in the available list.
 DecrementUseCounts(n,bb);
 }
-//------------------------------ComputeUseCount--------------------------------
 // This method sets the use count within a basic block.  We will ignore all
 // uses outside the current basic block.  As we are doing a backwards walk,
 // any node we reach that has a use count of 0 may be scheduled.  This also
 // avoids the problem of cyclic references from phi nodes, as long as phi
 // nodes are at the front of the basic block.  This method also initializes
 // Account for all uses
 for ( uint k = 0; k < n->len(); k++ ) {
 Node *inp = n->in(k);
 if (!inp) continue;
 assert(inp != n, "no cycles allowed" );
-if( _bbs[inp->_idx] == bb ) { // Block-local use?
+if (_cfg->get_block_for_node(inp) == bb) { // Block-local use?
-if( inp->is_Proj() )    // Skip through Proj's
+if (inp->is_Proj()) { // Skip through Proj's
 inp = inp->in(0);
+}
 ++_uses[inp->_idx];     // Count 1 block-local use
 }
 }
 // If this instruction has a 0 use count, then it is available
 Block *succ_bb = NULL;
 Block *bb;
 // Walk over all the basic blocks in reverse order
-for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
+for (int i = _cfg->number_of_blocks() - 1; i >= 0; succ_bb = bb, i--) {
-bb = _cfg->_blocks[i];
+bb = _cfg->get_block(i);
 #ifndef PRODUCT
 if (_cfg->C->trace_opto_output()) {
 tty->print("#  Schedule BB#%03d (initial)\n", i);
-for (uint j = 0; j < bb->_nodes.size(); j++)
+for (uint j = 0; j < bb->_nodes.size(); j++) {
 bb->_nodes[j]->dump();
+}
 }
 #endif
 // On the head node, skip processing
-if( bb == _cfg->_broot )
+if (bb == _cfg->get_root_block()) {
 continue;
+}
 // Skip empty, connector blocks
 if (bb->is_connector())
 continue;
 // Record final node-bundling array location
 _regalloc->C->set_node_bundling_base(_node_bundling_base);
 } // end DoScheduling
-//------------------------------verify_good_schedule---------------------------
 // Verify that no live-range used in the block is killed in the block by a
 // wrong DEF.  This doesn't verify live-ranges that span blocks.
 // Check for edge existence.  Used to avoid adding redundant precedence edges.
 static bool edge_from_to( Node *from, Node *to ) {
 return true;
 return false;
 }
 #ifdef ASSERT
-//------------------------------verify_do_def----------------------------------
 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
 // Check for bad kills
 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
 Node *prior_use = _reg_node[def];
 if( prior_use && !edge_from_to(prior_use,n) ) {
 }
 _reg_node.map(def,NULL); // Kill live USEs
 }
 }
-//------------------------------verify_good_schedule---------------------------
 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
 // Zap to something reasonable for the verify code
 _reg_node.clear();
 if( from != to &&             // No cycles (for things like LD L0,[L0+4] )
 !edge_from_to( from, to ) ) // Avoid duplicate edge
 from->add_prec(to);
 }
-//------------------------------anti_do_def------------------------------------
 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
 return;
 Node *pinch = _reg_node[def_reg]; // Get pinch point
-if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
+if ((pinch == NULL) || _cfg->get_block_for_node(pinch) != b || // No pinch-point yet?
 is_def ) {    // Check for a true def (not a kill)
 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
 return;
 }
 }
 if (pinch->_idx >= _regalloc->node_regs_max_index()) {
 _cfg->C->record_method_not_compilable("too many D-U pinch points");
 return;
 }
-_bbs.map(pinch->_idx,b);      // Pretend it's valid in this block (lazy init)
+_cfg->map_node_to_block(pinch, b);      // Pretend it's valid in this block (lazy init)
 _reg_node.map(def_reg,pinch); // Record pinch-point
 //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
 pinch->init_req(0, _cfg->C->top());     // set not NULL for the next call
 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
 // Add edge from kill to pinch-point
 add_prec_edge_from_to(kill,pinch);
 }
-//------------------------------anti_do_use------------------------------------
 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
 return;
 Node *pinch = _reg_node[use_reg]; // Get pinch point
 // Check for no later def_reg/kill in block
-if( pinch && _bbs[pinch->_idx] == b &&
+if ((pinch != NULL) && _cfg->get_block_for_node(pinch) == b &&
 // Use has to be block-local as well
-_bbs[use->_idx] == b ) {
+_cfg->get_block_for_node(use) == b) {
 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
 pinch->req() == 1 ) {   // pinch not yet in block?
 pinch->del_req(0);        // yank pointer to later-def, also set flag
 // Insert the pinch-point in the block just after the last use
 b->_nodes.insert(b->find_node(use)+1,pinch);
 add_prec_edge_from_to(pinch,use);
 }
 }
-//------------------------------ComputeRegisterAntidependences-----------------
 // We insert antidependences between the reads and following write of
 // allocated registers to prevent illegal code motion. Hopefully, the
 // number of added references should be fairly small, especially as we
 // are only adding references within the current basic block.
 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
 // Garbage collect pinch nodes that were not consumed.
 // They are usually created by a fat kill MachProj for a call.
 garbage_collect_pinch_nodes();
 }
 }
-//------------------------------garbage_collect_pinch_nodes-------------------------------
 // Garbage collect pinch nodes for reuse by other blocks.
 //
 // The block scheduler's insertion of anti-dependence
 // edges creates many pinch nodes when the block contains
 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
 #endif
 int trace_cnt = 0;
 for (uint k = 0; k < _reg_node.Size(); k++) {
 Node* pinch = _reg_node[k];
-if (pinch != NULL && pinch->Opcode() == Op_Node &&
+if ((pinch != NULL) && pinch->Opcode() == Op_Node &&
 // no predecence input edges
 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
 cleanup_pinch(pinch);
 _pinch_free_list.push(pinch);
 _reg_node.map(k, NULL);
 }
 // May have a later_def entry
 pinch->set_req(0, NULL);
 }
-//------------------------------print_statistics-------------------------------
 #ifndef PRODUCT
 void Scheduling::dump_available() const {
 tty->print("#Availist  ");
 for (uint i = 0; i < _available.size(); i++)

Mercurial > hg > graal-compiler

comparison src/share/vm/opto/output.cpp @ 14412:e2722a66aba7