Mercurial > hg > graal-compiler
comparison src/cpu/sparc/vm/sparc.ad @ 1160:f24201449cac
6909839: missing unsigned compare cases for some cmoves in sparc.ad
Reviewed-by: kvn, jrose
author | never |
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date | Sat, 09 Jan 2010 00:59:35 -0800 |
parents | 97125851f396 |
children | 2883969d09e7 |
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1159:5b06c5db3e89 | 1160:f24201449cac |
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1 // | 1 // |
2 // Copyright 1998-2009 Sun Microsystems, Inc. All Rights Reserved. | 2 // Copyright 1998-2010 Sun Microsystems, Inc. All Rights Reserved. |
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | 3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 // | 4 // |
5 // This code is free software; you can redistribute it and/or modify it | 5 // This code is free software; you can redistribute it and/or modify it |
6 // under the terms of the GNU General Public License version 2 only, as | 6 // under the terms of the GNU General Public License version 2 only, as |
7 // published by the Free Software Foundation. | 7 // published by the Free Software Foundation. |
6666 format %{ "MOV$cmp $icc,$src,$dst" %} | 6666 format %{ "MOV$cmp $icc,$src,$dst" %} |
6667 ins_encode( enc_cmov_imm(cmp,dst,src, (Assembler::icc)) ); | 6667 ins_encode( enc_cmov_imm(cmp,dst,src, (Assembler::icc)) ); |
6668 ins_pipe(ialu_imm); | 6668 ins_pipe(ialu_imm); |
6669 %} | 6669 %} |
6670 | 6670 |
6671 instruct cmovII_U_reg(cmpOpU cmp, flagsRegU icc, iRegI dst, iRegI src) %{ | 6671 instruct cmovIIu_reg(cmpOpU cmp, flagsRegU icc, iRegI dst, iRegI src) %{ |
6672 match(Set dst (CMoveI (Binary cmp icc) (Binary dst src))); | 6672 match(Set dst (CMoveI (Binary cmp icc) (Binary dst src))); |
6673 ins_cost(150); | 6673 ins_cost(150); |
6674 size(4); | 6674 size(4); |
6675 format %{ "MOV$cmp $icc,$src,$dst" %} | 6675 format %{ "MOV$cmp $icc,$src,$dst" %} |
6676 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); | 6676 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); |
6677 ins_pipe(ialu_reg); | 6677 ins_pipe(ialu_reg); |
6678 %} | 6678 %} |
6679 | 6679 |
6680 instruct cmovII_U_imm(cmpOpU cmp, flagsRegU icc, iRegI dst, immI11 src) %{ | 6680 instruct cmovIIu_imm(cmpOpU cmp, flagsRegU icc, iRegI dst, immI11 src) %{ |
6681 match(Set dst (CMoveI (Binary cmp icc) (Binary dst src))); | 6681 match(Set dst (CMoveI (Binary cmp icc) (Binary dst src))); |
6682 ins_cost(140); | 6682 ins_cost(140); |
6683 size(4); | 6683 size(4); |
6684 format %{ "MOV$cmp $icc,$src,$dst" %} | 6684 format %{ "MOV$cmp $icc,$src,$dst" %} |
6685 ins_encode( enc_cmov_imm(cmp,dst,src, (Assembler::icc)) ); | 6685 ins_encode( enc_cmov_imm(cmp,dst,src, (Assembler::icc)) ); |
6721 format %{ "MOV$cmp $icc,$src,$dst" %} | 6721 format %{ "MOV$cmp $icc,$src,$dst" %} |
6722 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); | 6722 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); |
6723 ins_pipe(ialu_reg); | 6723 ins_pipe(ialu_reg); |
6724 %} | 6724 %} |
6725 | 6725 |
6726 // This instruction also works with CmpN so we don't need cmovNN_reg. | |
6727 instruct cmovNIu_reg(cmpOpU cmp, flagsRegU icc, iRegN dst, iRegN src) %{ | |
6728 match(Set dst (CMoveN (Binary cmp icc) (Binary dst src))); | |
6729 ins_cost(150); | |
6730 size(4); | |
6731 format %{ "MOV$cmp $icc,$src,$dst" %} | |
6732 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); | |
6733 ins_pipe(ialu_reg); | |
6734 %} | |
6735 | |
6726 instruct cmovNF_reg(cmpOpF cmp, flagsRegF fcc, iRegN dst, iRegN src) %{ | 6736 instruct cmovNF_reg(cmpOpF cmp, flagsRegF fcc, iRegN dst, iRegN src) %{ |
6727 match(Set dst (CMoveN (Binary cmp fcc) (Binary dst src))); | 6737 match(Set dst (CMoveN (Binary cmp fcc) (Binary dst src))); |
6728 ins_cost(150); | 6738 ins_cost(150); |
6729 size(4); | 6739 size(4); |
6730 format %{ "MOV$cmp $fcc,$src,$dst" %} | 6740 format %{ "MOV$cmp $fcc,$src,$dst" %} |
6758 format %{ "MOV$cmp $icc,$src,$dst\t! ptr" %} | 6768 format %{ "MOV$cmp $icc,$src,$dst\t! ptr" %} |
6759 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); | 6769 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); |
6760 ins_pipe(ialu_reg); | 6770 ins_pipe(ialu_reg); |
6761 %} | 6771 %} |
6762 | 6772 |
6773 instruct cmovPIu_reg(cmpOpU cmp, flagsRegU icc, iRegP dst, iRegP src) %{ | |
6774 match(Set dst (CMoveP (Binary cmp icc) (Binary dst src))); | |
6775 ins_cost(150); | |
6776 | |
6777 size(4); | |
6778 format %{ "MOV$cmp $icc,$src,$dst\t! ptr" %} | |
6779 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); | |
6780 ins_pipe(ialu_reg); | |
6781 %} | |
6782 | |
6763 instruct cmovPI_imm(cmpOp cmp, flagsReg icc, iRegP dst, immP0 src) %{ | 6783 instruct cmovPI_imm(cmpOp cmp, flagsReg icc, iRegP dst, immP0 src) %{ |
6784 match(Set dst (CMoveP (Binary cmp icc) (Binary dst src))); | |
6785 ins_cost(140); | |
6786 | |
6787 size(4); | |
6788 format %{ "MOV$cmp $icc,$src,$dst\t! ptr" %} | |
6789 ins_encode( enc_cmov_imm(cmp,dst,src, (Assembler::icc)) ); | |
6790 ins_pipe(ialu_imm); | |
6791 %} | |
6792 | |
6793 instruct cmovPIu_imm(cmpOpU cmp, flagsRegU icc, iRegP dst, immP0 src) %{ | |
6764 match(Set dst (CMoveP (Binary cmp icc) (Binary dst src))); | 6794 match(Set dst (CMoveP (Binary cmp icc) (Binary dst src))); |
6765 ins_cost(140); | 6795 ins_cost(140); |
6766 | 6796 |
6767 size(4); | 6797 size(4); |
6768 format %{ "MOV$cmp $icc,$src,$dst\t! ptr" %} | 6798 format %{ "MOV$cmp $icc,$src,$dst\t! ptr" %} |
6807 opcode(0x101); | 6837 opcode(0x101); |
6808 ins_encode( enc_cmovf_reg(cmp,dst,src, (Assembler::icc)) ); | 6838 ins_encode( enc_cmovf_reg(cmp,dst,src, (Assembler::icc)) ); |
6809 ins_pipe(int_conditional_float_move); | 6839 ins_pipe(int_conditional_float_move); |
6810 %} | 6840 %} |
6811 | 6841 |
6842 instruct cmovFIu_reg(cmpOpU cmp, flagsRegU icc, regF dst, regF src) %{ | |
6843 match(Set dst (CMoveF (Binary cmp icc) (Binary dst src))); | |
6844 ins_cost(150); | |
6845 | |
6846 size(4); | |
6847 format %{ "FMOVS$cmp $icc,$src,$dst" %} | |
6848 opcode(0x101); | |
6849 ins_encode( enc_cmovf_reg(cmp,dst,src, (Assembler::icc)) ); | |
6850 ins_pipe(int_conditional_float_move); | |
6851 %} | |
6852 | |
6812 // Conditional move, | 6853 // Conditional move, |
6813 instruct cmovFF_reg(cmpOpF cmp, flagsRegF fcc, regF dst, regF src) %{ | 6854 instruct cmovFF_reg(cmpOpF cmp, flagsRegF fcc, regF dst, regF src) %{ |
6814 match(Set dst (CMoveF (Binary cmp fcc) (Binary dst src))); | 6855 match(Set dst (CMoveF (Binary cmp fcc) (Binary dst src))); |
6815 ins_cost(150); | 6856 ins_cost(150); |
6816 size(4); | 6857 size(4); |
6830 ins_encode( enc_cmovf_reg(cmp,dst,src, (Assembler::ptr_cc)) ); | 6871 ins_encode( enc_cmovf_reg(cmp,dst,src, (Assembler::ptr_cc)) ); |
6831 ins_pipe(int_conditional_double_move); | 6872 ins_pipe(int_conditional_double_move); |
6832 %} | 6873 %} |
6833 | 6874 |
6834 instruct cmovDI_reg(cmpOp cmp, flagsReg icc, regD dst, regD src) %{ | 6875 instruct cmovDI_reg(cmpOp cmp, flagsReg icc, regD dst, regD src) %{ |
6876 match(Set dst (CMoveD (Binary cmp icc) (Binary dst src))); | |
6877 ins_cost(150); | |
6878 | |
6879 size(4); | |
6880 format %{ "FMOVD$cmp $icc,$src,$dst" %} | |
6881 opcode(0x102); | |
6882 ins_encode( enc_cmovf_reg(cmp,dst,src, (Assembler::icc)) ); | |
6883 ins_pipe(int_conditional_double_move); | |
6884 %} | |
6885 | |
6886 instruct cmovDIu_reg(cmpOpU cmp, flagsRegU icc, regD dst, regD src) %{ | |
6835 match(Set dst (CMoveD (Binary cmp icc) (Binary dst src))); | 6887 match(Set dst (CMoveD (Binary cmp icc) (Binary dst src))); |
6836 ins_cost(150); | 6888 ins_cost(150); |
6837 | 6889 |
6838 size(4); | 6890 size(4); |
6839 format %{ "FMOVD$cmp $icc,$src,$dst" %} | 6891 format %{ "FMOVD$cmp $icc,$src,$dst" %} |
6869 ins_encode( enc_cmov_imm(cmp,dst,src, (Assembler::ptr_cc)) ); | 6921 ins_encode( enc_cmov_imm(cmp,dst,src, (Assembler::ptr_cc)) ); |
6870 ins_pipe(ialu_imm); | 6922 ins_pipe(ialu_imm); |
6871 %} | 6923 %} |
6872 | 6924 |
6873 instruct cmovLI_reg(cmpOp cmp, flagsReg icc, iRegL dst, iRegL src) %{ | 6925 instruct cmovLI_reg(cmpOp cmp, flagsReg icc, iRegL dst, iRegL src) %{ |
6926 match(Set dst (CMoveL (Binary cmp icc) (Binary dst src))); | |
6927 ins_cost(150); | |
6928 | |
6929 size(4); | |
6930 format %{ "MOV$cmp $icc,$src,$dst\t! long" %} | |
6931 ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) ); | |
6932 ins_pipe(ialu_reg); | |
6933 %} | |
6934 | |
6935 | |
6936 instruct cmovLIu_reg(cmpOpU cmp, flagsRegU icc, iRegL dst, iRegL src) %{ | |
6874 match(Set dst (CMoveL (Binary cmp icc) (Binary dst src))); | 6937 match(Set dst (CMoveL (Binary cmp icc) (Binary dst src))); |
6875 ins_cost(150); | 6938 ins_cost(150); |
6876 | 6939 |
6877 size(4); | 6940 size(4); |
6878 format %{ "MOV$cmp $icc,$src,$dst\t! long" %} | 6941 format %{ "MOV$cmp $icc,$src,$dst\t! long" %} |