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diff src/cpu/x86/vm/interp_masm_x86_64.cpp @ 1976:0fc262af204f

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6780143: hs203t003 hits SIGSEGV/EXCEPTION_ACCESS_VIOLATION with -XX:+UseCompressedOops Summary: Using r12 as temporary register around call_VM trashes heapbase becausecall_VM doesn't always return immediately to following code (eg forward_exception, popframe and early return support). Reviewed-by: never, kvn
author coleenp
date Mon, 29 Nov 2010 15:43:36 -0500
parents f95d63e2154a
children dd031b2226de
line wrap: on
line diff
--- a/src/cpu/x86/vm/interp_masm_x86_64.cpp	Tue Nov 23 13:22:55 2010 -0800
+++ b/src/cpu/x86/vm/interp_masm_x86_64.cpp	Mon Nov 29 15:43:36 2010 -0500
@@ -449,10 +449,9 @@
     // JVMTI events, such as single-stepping, are implemented partly by avoiding running
     // compiled code in threads for which the event is enabled.  Check here for
     // interp_only_mode if these events CAN be enabled.
-    get_thread(temp);
     // interp_only is an int, on little endian it is sufficient to test the byte only
-    // Is a cmpl faster (ce
-    cmpb(Address(temp, JavaThread::interp_only_mode_offset()), 0);
+    // Is a cmpl faster?
+    cmpb(Address(r15_thread, JavaThread::interp_only_mode_offset()), 0);
     jcc(Assembler::zero, run_compiled_code);
     jmp(Address(method, methodOopDesc::interpreter_entry_offset()));
     bind(run_compiled_code);