Mercurial > hg > graal-compiler
diff src/cpu/x86/vm/assembler_x86_32.hpp @ 360:5d254928c888
Merge
author | ysr |
---|---|
date | Wed, 27 Aug 2008 11:20:46 -0700 |
parents | 1ee8caae33af |
children |
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--- a/src/cpu/x86/vm/assembler_x86_32.hpp Wed Aug 27 10:56:33 2008 -0700 +++ b/src/cpu/x86/vm/assembler_x86_32.hpp Wed Aug 27 11:20:46 2008 -0700 @@ -216,9 +216,11 @@ #endif // ASSERT // accessors - bool uses(Register reg) const { - return _base == reg || _index == reg; - } + bool uses(Register reg) const { return _base == reg || _index == reg; } + Register base() const { return _base; } + Register index() const { return _index; } + ScaleFactor scale() const { return _scale; } + int disp() const { return _disp; } // Convert the raw encoding form into the form expected by the constructor for // Address. An index of 4 (rsp) corresponds to having no index, so convert @@ -990,7 +992,8 @@ // on arguments should also go in here. class MacroAssembler: public Assembler { - friend class LIR_Assembler; + friend class LIR_Assembler; + friend class Runtime1; // as_Address() protected: Address as_Address(AddressLiteral adr); @@ -1151,6 +1154,10 @@ void store_check(Register obj); // store check for obj - register is destroyed afterwards void store_check(Register obj, Address dst); // same as above, dst is exact store location (reg. is destroyed) + void g1_write_barrier_pre(Register obj, Register thread, Register tmp, Register tmp2, bool tosca_live ); + void g1_write_barrier_post(Register store_addr, Register new_val, Register thread, Register tmp, Register tmp2); + + // split store_check(Register obj) to enhance instruction interleaving void store_check_part_1(Register obj); void store_check_part_2(Register obj);