Mercurial > hg > graal-compiler
diff src/cpu/x86/vm/macroAssembler_x86.cpp @ 12835:69944b868a32
8014555: G1: Memory ordering problem with Conc refinement and card marking
Summary: Add a StoreLoad barrier in the G1 post-barrier to fix a race with concurrent refinement. Also-reviewed-by: martin.doerr@sap.com
Reviewed-by: iveresov, tschatzl, brutisso, roland, kvn
| author | mgerdin |
|---|---|
| date | Tue, 08 Oct 2013 17:35:51 +0200 |
| parents | 7944aba7ba41 |
| children | 209aa13ab8c0 |
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--- a/src/cpu/x86/vm/macroAssembler_x86.cpp Fri Oct 04 13:33:02 2013 +0200 +++ b/src/cpu/x86/vm/macroAssembler_x86.cpp Tue Oct 08 17:35:51 2013 +0200 @@ -3389,13 +3389,18 @@ const Register card_addr = tmp; lea(card_addr, as_Address(ArrayAddress(cardtable, index))); #endif - cmpb(Address(card_addr, 0), 0); + cmpb(Address(card_addr, 0), (int)G1SATBCardTableModRefBS::g1_young_card_val()); jcc(Assembler::equal, done); + membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); + cmpb(Address(card_addr, 0), (int)CardTableModRefBS::dirty_card_val()); + jcc(Assembler::equal, done); + + // storing a region crossing, non-NULL oop, card is clean. // dirty card and log. - movb(Address(card_addr, 0), 0); + movb(Address(card_addr, 0), (int)CardTableModRefBS::dirty_card_val()); cmpl(queue_index, 0); jcc(Assembler::equal, runtime);