--- a/src/cpu/sparc/vm/sparc.ad	Mon Dec 13 22:41:03 2010 -0800
+++ b/src/cpu/sparc/vm/sparc.ad	Tue Dec 14 12:44:30 2010 -0800
@@ -1086,9 +1086,9 @@
 uint MachConstantBaseNode::size(PhaseRegAlloc*) const {
   if (UseRDPCForConstantTableBase) {
     // This is really the worst case but generally it's only 1 instruction.
-    return 4 /*rdpc*/ + 4 /*sub*/ + MacroAssembler::worst_case_size_of_set();
+    return (1 /*rdpc*/ + 1 /*sub*/ + MacroAssembler::worst_case_insts_for_set()) * BytesPerInstWord;
   } else {
-    return MacroAssembler::worst_case_size_of_set();
+    return MacroAssembler::worst_case_insts_for_set() * BytesPerInstWord;
   }
 }
 
@@ -1240,7 +1240,7 @@
 
 int MachEpilogNode::safepoint_offset() const {
   assert( do_polling(), "no return for this epilog node");
-  return MacroAssembler::size_of_sethi(os::get_polling_page());
+  return MacroAssembler::insts_for_sethi(os::get_polling_page()) * BytesPerInstWord;
 }
 
 //=============================================================================
@@ -3553,7 +3553,8 @@
   interface(CONST_INTER);
 %}
 
-// Pointer Immediate: 32 or 64-bit
+#ifdef _LP64
+// Pointer Immediate: 64-bit
 operand immP_set() %{
   predicate(!VM_Version::is_niagara1_plus());
   match(ConP);
@@ -3564,10 +3565,10 @@
   interface(CONST_INTER);
 %}
 
-// Pointer Immediate: 32 or 64-bit
+// Pointer Immediate: 64-bit
 // From Niagara2 processors on a load should be better than materializing.
 operand immP_load() %{
-  predicate(VM_Version::is_niagara1_plus());
+  predicate(VM_Version::is_niagara1_plus() && (n->bottom_type()->isa_oop_ptr() || (MacroAssembler::insts_for_set(n->get_ptr()) > 3)));
   match(ConP);
 
   op_cost(5);
@@ -3576,6 +3577,18 @@
   interface(CONST_INTER);
 %}
 
+// Pointer Immediate: 64-bit
+operand immP_no_oop_cheap() %{
+  predicate(VM_Version::is_niagara1_plus() && !n->bottom_type()->isa_oop_ptr() && (MacroAssembler::insts_for_set(n->get_ptr()) <= 3));
+  match(ConP);
+
+  op_cost(5);
+  // formats are generated automatically for constants and base registers
+  format %{ %}
+  interface(CONST_INTER);
+%}
+#endif
+
 operand immP13() %{
   predicate((-4096 < n->get_ptr()) && (n->get_ptr() <= 4095));
   match(ConP);
@@ -3673,7 +3686,7 @@
 
 // Long Immediate: cheap (materialize in <= 3 instructions)
 operand immL_cheap() %{
-  predicate(!VM_Version::is_niagara1_plus() || MacroAssembler::size_of_set64(n->get_long()) <= 3);
+  predicate(!VM_Version::is_niagara1_plus() || MacroAssembler::insts_for_set64(n->get_long()) <= 3);
   match(ConL);
   op_cost(0);
 
@@ -3683,7 +3696,7 @@
 
 // Long Immediate: expensive (materialize in > 3 instructions)
 operand immL_expensive() %{
-  predicate(VM_Version::is_niagara1_plus() && MacroAssembler::size_of_set64(n->get_long()) > 3);
+  predicate(VM_Version::is_niagara1_plus() && MacroAssembler::insts_for_set64(n->get_long()) > 3);
   match(ConL);
   op_cost(0);
 
@@ -6094,8 +6107,18 @@
   ins_cost(MEMORY_REF_COST);
   format %{ "LD     [$constanttablebase + $constantoffset],$dst\t! load from constant table: ptr=$con" %}
   ins_encode %{
-      RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset($con), $dst$$Register);
-     __ ld_ptr($constanttablebase, con_offset, $dst$$Register);
+    RegisterOrConstant con_offset = __ ensure_simm13_or_reg($constantoffset($con), $dst$$Register);
+    __ ld_ptr($constanttablebase, con_offset, $dst$$Register);
+  %}
+  ins_pipe(loadConP);
+%}
+
+instruct loadConP_no_oop_cheap(iRegP dst, immP_no_oop_cheap con) %{
+  match(Set dst con);
+  ins_cost(DEFAULT_COST * 3/2);
+  format %{ "SET    $con,$dst\t! non-oop ptr" %}
+  ins_encode %{
+    __ set($con$$constant, $dst$$Register);
   %}
   ins_pipe(loadConP);
 %}