Mercurial > hg > graal-compiler
diff src/cpu/x86/vm/macroAssembler_x86.hpp @ 20311:b1bc1af04c6e
8052081: Optimize generated by C2 code for Intel's Atom processor
Summary: Allow to execute vectorization and crc32 optimization on Atom. Enable UseFPUForSpilling by default on x86.
Reviewed-by: roland
| author | kvn |
|---|---|
| date | Tue, 05 Aug 2014 15:02:10 -0700 |
| parents | 0bf37f737702 |
| children | 166d744df0de |
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--- a/src/cpu/x86/vm/macroAssembler_x86.hpp Tue Aug 12 15:17:46 2014 +0000 +++ b/src/cpu/x86/vm/macroAssembler_x86.hpp Tue Aug 05 15:02:10 2014 -0700 @@ -966,6 +966,16 @@ void mulss(XMMRegister dst, Address src) { Assembler::mulss(dst, src); } void mulss(XMMRegister dst, AddressLiteral src); + // Carry-Less Multiplication Quadword + void pclmulldq(XMMRegister dst, XMMRegister src) { + // 0x00 - multiply lower 64 bits [0:63] + Assembler::pclmulqdq(dst, src, 0x00); + } + void pclmulhdq(XMMRegister dst, XMMRegister src) { + // 0x11 - multiply upper 64 bits [64:127] + Assembler::pclmulqdq(dst, src, 0x11); + } + void sqrtsd(XMMRegister dst, XMMRegister src) { Assembler::sqrtsd(dst, src); } void sqrtsd(XMMRegister dst, Address src) { Assembler::sqrtsd(dst, src); } void sqrtsd(XMMRegister dst, AddressLiteral src);