Mercurial > hg > graal-compiler

diff src/cpu/x86/vm/assembler_x86.hpp @ 2404:b40d4fa697bf

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6964776: c2 should ensure the polling page is reachable on 64 bit Summary: Materialize the pointer to the polling page in a register instead of using rip-relative addressing when the distance from the code cache is larger than disp32. Reviewed-by: never, kvn
author iveresov
date Sun, 27 Mar 2011 13:17:37 -0700
parents 41d4973cf100
children 09f96c3ff1ad
line wrap: on
line diff
--- a/src/cpu/x86/vm/assembler_x86.hpp	Sun Mar 27 00:00:14 2011 -0700
+++ b/src/cpu/x86/vm/assembler_x86.hpp	Sun Mar 27 13:17:37 2011 -0700
@@ -580,7 +580,6 @@
   void emit_data64(jlong data, relocInfo::relocType rtype, int format = 0);
   void emit_data64(jlong data, RelocationHolder const& rspec, int format = 0);
 
-
   bool reachable(AddressLiteral adr) NOT_LP64({ return true;});
 
   // These are all easily abused and hence protected
@@ -683,6 +682,8 @@
  static bool is_simm32(int32_t x) { return true; }
 #endif // _LP64
 
+  static bool is_polling_page_far() NOT_LP64({ return false;});
+
   // Generic instructions
   // Does 32bit or 64bit as needed for the platform. In some sense these
   // belong in macro assembler but there is no need for both varieties to exist
@@ -2094,7 +2095,10 @@
 
   void leal32(Register dst, Address src) { leal(dst, src); }
 
-  void test32(Register src1, AddressLiteral src2);
+  // Import other testl() methods from the parent class or else
+  // they will be hidden by the following overriding declaration.
+  using Assembler::testl;
+  void testl(Register dst, AddressLiteral src);
 
   void orptr(Register dst, Address src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
   void orptr(Register dst, Register src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }