Mercurial > hg > graal-compiler
diff src/share/vm/c1/c1_MacroAssembler.hpp @ 6725:da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
Summary: Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
Contributed-by: jmasa <jon.masamitsu@oracle.com>, stefank <stefan.karlsson@oracle.com>, mgerdin <mikael.gerdin@oracle.com>, never <tom.rodriguez@oracle.com>
| author | coleenp |
|---|---|
| date | Sat, 01 Sep 2012 13:25:18 -0400 |
| parents | 1d1603768966 |
| children | cd3d6a6b95d9 |
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--- a/src/share/vm/c1/c1_MacroAssembler.hpp Fri Aug 31 16:39:35 2012 -0700 +++ b/src/share/vm/c1/c1_MacroAssembler.hpp Sat Sep 01 13:25:18 2012 -0400 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -107,10 +107,10 @@ int stub_id() const { return _stub_id; } // runtime calls (return offset of call to be used by GC map) - int call_RT(Register oop_result1, Register oop_result2, address entry, int args_size = 0); - int call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1); - int call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2); - int call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3); + int call_RT(Register oop_result1, Register metadata_result, address entry, int args_size = 0); + int call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1); + int call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2); + int call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3); }; #endif // SHARE_VM_C1_C1_MACROASSEMBLER_HPP