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diff src/cpu/sparc/vm/assembler_sparc.hpp @ 1006:dcf03e02b020

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6879902: CTW failure jdk6_18/hotspot/src/cpu/sparc/vm/assembler_sparc.hpp:845 Summary: For signatures with a large number of arguments the offset for the float store becomes too big and does not fit in 13-bit. Reviewed-by: kvn, never
author twisti
date Tue, 06 Oct 2009 02:11:49 -0700
parents 62001a362ce9
children d7f654633cfe f03d0a26bf83
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line diff
--- a/src/cpu/sparc/vm/assembler_sparc.hpp	Wed Sep 30 13:25:39 2009 -0700
+++ b/src/cpu/sparc/vm/assembler_sparc.hpp	Tue Oct 06 02:11:49 2009 -0700
@@ -1279,6 +1279,7 @@
 
   // 171
 
+  inline void ldf(FloatRegisterImpl::Width w, Register s1, RegisterOrConstant s2, FloatRegister d);
   inline void ldf(FloatRegisterImpl::Width w, Register s1, Register s2, FloatRegister d);
   inline void ldf(FloatRegisterImpl::Width w, Register s1, int simm13a, FloatRegister d, RelocationHolder const& rspec = RelocationHolder());
 
@@ -1535,7 +1536,8 @@
 
   // pp 222
 
-  inline void stf(    FloatRegisterImpl::Width w, FloatRegister d, Register s1, Register s2 );
+  inline void stf(    FloatRegisterImpl::Width w, FloatRegister d, Register s1, RegisterOrConstant s2);
+  inline void stf(    FloatRegisterImpl::Width w, FloatRegister d, Register s1, Register s2);
   inline void stf(    FloatRegisterImpl::Width w, FloatRegister d, Register s1, int simm13a);
   inline void stf(    FloatRegisterImpl::Width w, FloatRegister d, const Address& a, int offset = 0);
 
@@ -2049,12 +2051,13 @@
                        Register temp = noreg );
   void regcon_sll_ptr( RegisterOrConstant& dest, RegisterOrConstant src,
                        Register temp = noreg );
-  RegisterOrConstant ensure_rs2(RegisterOrConstant rs2, Register sethi_temp) {
-    guarantee(sethi_temp != noreg, "constant offset overflow");
-    if (is_simm13(rs2.constant_or_zero()))
-      return rs2;               // register or short constant
-    set(rs2.as_constant(), sethi_temp);
-    return sethi_temp;
+
+  RegisterOrConstant ensure_simm13_or_reg(RegisterOrConstant roc, Register Rtemp) {
+    guarantee(Rtemp != noreg, "constant offset overflow");
+    if (is_simm13(roc.constant_or_zero()))
+      return roc;               // register or short constant
+    set(roc.as_constant(), Rtemp);
+    return RegisterOrConstant(Rtemp);
   }
 
   // --------------------------------------------------