Mercurial > hg > graal-compiler
diff src/cpu/x86/vm/c1_LIRAssembler_x86.cpp @ 1579:e9ff18c4ace7
Merge
author | jrose |
---|---|
date | Wed, 02 Jun 2010 22:45:42 -0700 |
parents | c18cbe5936b8 87fc6aca31ab |
children | d5d065957597 |
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--- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp Tue Jun 01 11:48:33 2010 -0700 +++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp Wed Jun 02 22:45:42 2010 -0700 @@ -2462,9 +2462,18 @@ } #endif // _LP64 } else { +#ifdef _LP64 + Register r_lo; + if (right->type() == T_OBJECT || right->type() == T_ARRAY) { + r_lo = right->as_register(); + } else { + r_lo = right->as_register_lo(); + } +#else Register r_lo = right->as_register_lo(); Register r_hi = right->as_register_hi(); assert(l_lo != r_hi, "overwriting registers"); +#endif switch (code) { case lir_logic_and: __ andptr(l_lo, r_lo); @@ -2784,7 +2793,7 @@ assert(!os::is_MP() || (__ offset() + NativeCall::displacement_offset) % BytesPerWord == 0, "must be aligned"); __ call(AddressLiteral(op->addr(), rtype)); - add_call_info(code_offset(), op->info(), op->is_method_handle_invoke()); + add_call_info(code_offset(), op->info()); } @@ -2795,7 +2804,7 @@ (__ offset() + NativeCall::displacement_offset) % BytesPerWord == 0, "must be aligned"); __ call(AddressLiteral(op->addr(), rh)); - add_call_info(code_offset(), op->info(), op->is_method_handle_invoke()); + add_call_info(code_offset(), op->info()); } @@ -2805,16 +2814,6 @@ } -void LIR_Assembler::preserve_SP(LIR_OpJavaCall* op) { - __ movptr(FrameMap::method_handle_invoke_SP_save_opr()->as_register(), rsp); -} - - -void LIR_Assembler::restore_SP(LIR_OpJavaCall* op) { - __ movptr(rsp, FrameMap::method_handle_invoke_SP_save_opr()->as_register()); -} - - void LIR_Assembler::emit_static_call_stub() { address call_pc = __ pc(); address stub = __ start_a_stub(call_stub_size);