# HG changeset patch
# User Stefan Anzinger <stefan.anzinger@oracle.com>
# Date 1439537323 -7200
# Node ID cdd5ff7102084833e93d0406f1ae4d1f19e2f45b
# Parent  f999bdd4895a17e6353beb63f99cee0adbba6848
[SPARC] Add stxa

diff -r f999bdd4895a -r cdd5ff710208 graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java
--- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java	Fri Aug 14 17:34:58 2015 -0700
+++ b/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java	Fri Aug 14 09:28:43 2015 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2009, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2009, 20txa", "15, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -60,6 +60,11 @@
     public static final int CCR_XCC_SHIFT = 4;
     public static final int CCR_V_SHIFT = 1;
 
+    public static final int MEMBAR_LOAD_LOAD = 1;
+    public static final int MEMBAR_STORE_LOAD = 2;
+    public static final int MEMBAR_LOAD_STORE = 3;
+    public static final int MEMBAR_STORE_STORE = 4;
+
     private static final Ops[] OPS;
     private static final Op2s[] OP2S;
     private static final Op3s[][] OP3S;
@@ -231,13 +236,24 @@
         Staf  (0b10_0110, "staf", LdstOp),
         Stdf  (0b10_0111, "stdf", LdstOp),
 
+        Stba  (0b01_0101, "stba", LdstOp),
+        Stha  (0b01_0110, "stha", LdstOp),
+        Stwa  (0b01_0100, "stwa", LdstOp),
+        Stxa  (0b01_1110, "stxa", LdstOp),
+
+        Ldsba  (0b01_1001, "ldsba", LdstOp),
+        Ldsha  (0b01_1010, "ldsha", LdstOp),
+        Ldswa  (0b01_1000, "ldswa", LdstOp),
+        Lduba  (0b01_0001, "lduba", LdstOp),
+        Lduha  (0b01_0010, "lduha", LdstOp),
+        Lduwa (0b01_0000, "lduwa", LdstOp),
+
+        Ldxa  (0b01_1011, "ldxa", LdstOp),
+
         Rd    (0b10_1000, "rd", ArithOp),
         Wr    (0b11_0000, "wr", ArithOp),
         Fcmp  (0b11_0101, "fcmp", ArithOp),
 
-        Ldxa  (0b01_1011, "ldxa", LdstOp),
-        Lduwa (0b01_0000, "lduwa", LdstOp),
-
         Tcc(0b11_1010, "tcc", ArithOp);
 
         // @formatter:on
@@ -2356,6 +2372,11 @@
         ld(Lduwa, new SPARCAddress(rs1, rs2), rd, asi);
     }
 
+    public void stxa(Register rd, Register rs1, Register rs2, Asi asi) {
+        assert SPARC.isCPURegister(rs1, rs2, rd) : format("%s %s %s", rs1, rs2, rd);
+        ld(Stxa, new SPARCAddress(rs1, rs2), rd, asi);
+    }
+
     protected void st(Op3s op3, Register rs1, SPARCAddress dest) {
         ld(op3, dest, rs1);
     }