Mercurial > hg > graal-compiler
changeset 3276:2a34a4fbc52c
7037812: few more defaults changes for new AMD processors
Summary: use PREFETCHW as default prefetch instruction, set UseXMMForArrayCopy and UseUnalignedLoadStores to true by default.
Reviewed-by: kvn
Contributed-by: tom.deneau@amd.com
author | kvn |
---|---|
date | Tue, 19 Apr 2011 09:30:17 -0700 |
parents | bbe95b4337f1 |
children | d934e4b931e9 |
files | src/cpu/x86/vm/vm_version_x86.cpp |
diffstat | 1 files changed, 15 insertions(+), 2 deletions(-) [+] |
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--- a/src/cpu/x86/vm/vm_version_x86.cpp Mon Apr 18 06:50:57 2011 -0700 +++ b/src/cpu/x86/vm/vm_version_x86.cpp Tue Apr 19 09:30:17 2011 -0700 @@ -441,12 +441,25 @@ } } - // On family 21 processors default is no sw prefetch - if ( cpu_family() == 21 ) { + // some defaults for AMD family 15h + if ( cpu_family() == 0x15 ) { + // On family 15h processors default is no sw prefetch if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { AllocatePrefetchStyle = 0; } + // Also, if some other prefetch style is specified, default instruction type is PREFETCHW + if (FLAG_IS_DEFAULT(AllocatePrefetchInstr)) { + AllocatePrefetchInstr = 3; + } + // On family 15h processors use XMM and UnalignedLoadStores for Array Copy + if( FLAG_IS_DEFAULT(UseXMMForArrayCopy) ) { + UseXMMForArrayCopy = true; + } + if( FLAG_IS_DEFAULT(UseUnalignedLoadStores) && UseXMMForArrayCopy ) { + UseUnalignedLoadStores = true; + } } + } if( is_intel() ) { // Intel cpus specific settings