Mercurial > hg > graal-compiler
changeset 23204:361dac149aa6
Avoid unnecessary packing/unpacking of Register in RegisterValue.
author | Roland Schatz <roland.schatz@oracle.com> |
---|---|
date | Fri, 18 Dec 2015 12:20:08 +0100 |
parents | fd4350a00e99 |
children | aed0201715a1 |
files | graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64ControlFlow.java graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64RestoreRegistersOp.java graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64SaveRegistersOp.java graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64ZapRegistersOp.java |
diffstat | 5 files changed, 25 insertions(+), 32 deletions(-) [+] |
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--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64ControlFlow.java Fri Dec 18 00:29:13 2015 -0800 +++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64ControlFlow.java Fri Dec 18 12:20:08 2015 +0100 @@ -199,7 +199,7 @@ masm.cmpq(keyRegister, (AMD64Address) crb.asLongConstRef(jc)); break; case Object: - AMD64Move.const2reg(crb, masm, scratch, jc); + AMD64Move.const2reg(crb, masm, asRegister(scratch), jc); masm.cmpptr(keyRegister, asRegister(scratch)); break; default:
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java Fri Dec 18 00:29:13 2015 -0800 +++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java Fri Dec 18 12:20:08 2015 +0100 @@ -141,7 +141,7 @@ @Override public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { if (isRegister(result)) { - const2reg(crb, masm, result, input); + const2reg(crb, masm, asRegister(result), input); } else { assert isStackSlot(result); const2stack(crb, masm, result, input); @@ -513,7 +513,7 @@ } } else if (isJavaConstant(input)) { if (isRegister(result)) { - const2reg(crb, masm, result, asJavaConstant(input)); + const2reg(crb, masm, asRegister(result), asJavaConstant(input)); } else if (isStackSlot(result)) { const2stack(crb, masm, result, asJavaConstant(input)); } else { @@ -548,7 +548,7 @@ } } - private static void reg2stack(AMD64Kind kind, CompilationResultBuilder crb, AMD64MacroAssembler masm, Value result, Register input) { + public static void reg2stack(AMD64Kind kind, CompilationResultBuilder crb, AMD64MacroAssembler masm, Value result, Register input) { AMD64Address dest = (AMD64Address) crb.asAddress(result); switch (kind) { case BYTE: @@ -574,7 +574,7 @@ } } - private static void stack2reg(AMD64Kind kind, CompilationResultBuilder crb, AMD64MacroAssembler masm, Register result, Value input) { + public static void stack2reg(AMD64Kind kind, CompilationResultBuilder crb, AMD64MacroAssembler masm, Register result, Value input) { AMD64Address src = (AMD64Address) crb.asAddress(input); switch (kind) { case BYTE: @@ -600,7 +600,7 @@ } } - public static void const2reg(CompilationResultBuilder crb, AMD64MacroAssembler masm, Value result, JavaConstant input) { + public static void const2reg(CompilationResultBuilder crb, AMD64MacroAssembler masm, Register result, JavaConstant input) { /* * Note: we use the kind of the input operand (and not the kind of the result operand) * because they don't match in all cases. For example, an object constant can be loaded to a @@ -615,7 +615,7 @@ // Do not optimize with an XOR as this instruction may be between // a CMP and a Jcc in which case the XOR will modify the condition // flags and interfere with the Jcc. - masm.movl(asRegister(result), input.asInt()); + masm.movl(result, input.asInt()); break; case Long: @@ -628,16 +628,16 @@ // a CMP and a Jcc in which case the XOR will modify the condition // flags and interfere with the Jcc. if (patch) { - masm.movq(asRegister(result), input.asLong()); + masm.movq(result, input.asLong()); } else { if (input.asLong() == (int) input.asLong()) { // Sign extended to long - masm.movslq(asRegister(result), (int) input.asLong()); + masm.movslq(result, (int) input.asLong()); } else if ((input.asLong() & 0xFFFFFFFFL) == input.asLong()) { // Zero extended to long - masm.movl(asRegister(result), (int) input.asLong()); + masm.movl(result, (int) input.asLong()); } else { - masm.movq(asRegister(result), input.asLong()); + masm.movq(result, input.asLong()); } } break; @@ -645,18 +645,18 @@ // This is *not* the same as 'constant == 0.0f' in the case where constant is -0.0f if (Float.floatToRawIntBits(input.asFloat()) == Float.floatToRawIntBits(0.0f)) { assert !crb.codeCache.needsDataPatch(input); - masm.xorps(asRegister(result, AMD64Kind.SINGLE), asRegister(result)); + masm.xorps(result, result); } else { - masm.movflt(asRegister(result, AMD64Kind.SINGLE), (AMD64Address) crb.asFloatConstRef(input)); + masm.movflt(result, (AMD64Address) crb.asFloatConstRef(input)); } break; case Double: // This is *not* the same as 'constant == 0.0d' in the case where constant is -0.0d if (Double.doubleToRawLongBits(input.asDouble()) == Double.doubleToRawLongBits(0.0d)) { assert !crb.codeCache.needsDataPatch(input); - masm.xorpd(asRegister(result, AMD64Kind.DOUBLE), asRegister(result)); + masm.xorpd(result, result); } else { - masm.movdbl(asRegister(result, AMD64Kind.DOUBLE), (AMD64Address) crb.asDoubleConstRef(input)); + masm.movdbl(result, (AMD64Address) crb.asDoubleConstRef(input)); } break; case Object: @@ -664,12 +664,12 @@ // a CMP and a Jcc in which case the XOR will modify the condition // flags and interfere with the Jcc. if (input.isNull()) { - masm.movq(asRegister(result), 0x0L); + masm.movq(result, 0x0L); } else if (crb.target.inlineObjects) { crb.recordInlineDataInCode(input); - masm.movq(asRegister(result), 0xDEADDEADDEADDEADL); + masm.movq(result, 0xDEADDEADDEADDEADL); } else { - masm.movq(asRegister(result), (AMD64Address) crb.recordDataReferenceInCode(input, 0)); + masm.movq(result, (AMD64Address) crb.recordDataReferenceInCode(input, 0)); } break; default:
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64RestoreRegistersOp.java Fri Dec 18 00:29:13 2015 -0800 +++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64RestoreRegistersOp.java Fri Dec 18 12:20:08 2015 +0100 @@ -28,8 +28,8 @@ import java.util.Arrays; +import jdk.vm.ci.amd64.AMD64Kind; import jdk.vm.ci.code.Register; -import jdk.vm.ci.code.RegisterValue; import jdk.vm.ci.code.StackSlot; import jdk.vm.ci.meta.AllocatableValue; @@ -71,9 +71,8 @@ return save.savedRegisters; } - protected void restoreRegister(CompilationResultBuilder crb, AMD64MacroAssembler masm, Register register, StackSlot input) { - RegisterValue result = register.asValue(input.getLIRKind()); - AMD64Move.move(crb, masm, result, input); + protected void restoreRegister(CompilationResultBuilder crb, AMD64MacroAssembler masm, Register result, StackSlot input) { + AMD64Move.stack2reg((AMD64Kind) input.getPlatformKind(), crb, masm, result, input); } @Override
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64SaveRegistersOp.java Fri Dec 18 00:29:13 2015 -0800 +++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64SaveRegistersOp.java Fri Dec 18 12:20:08 2015 +0100 @@ -29,9 +29,9 @@ import java.util.Arrays; import java.util.Set; +import jdk.vm.ci.amd64.AMD64Kind; import jdk.vm.ci.code.Register; import jdk.vm.ci.code.RegisterSaveLayout; -import jdk.vm.ci.code.RegisterValue; import jdk.vm.ci.code.StackSlot; import jdk.vm.ci.meta.AllocatableValue; @@ -84,9 +84,8 @@ this.supportsRemove = supportsRemove; } - protected void saveRegister(CompilationResultBuilder crb, AMD64MacroAssembler masm, StackSlot result, Register register) { - RegisterValue input = register.asValue(result.getLIRKind()); - AMD64Move.move(crb, masm, result, input); + protected void saveRegister(CompilationResultBuilder crb, AMD64MacroAssembler masm, StackSlot result, Register input) { + AMD64Move.reg2stack((AMD64Kind) result.getPlatformKind(), crb, masm, result, input); } @Override
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64ZapRegistersOp.java Fri Dec 18 00:29:13 2015 -0800 +++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64ZapRegistersOp.java Fri Dec 18 12:20:08 2015 +0100 @@ -28,10 +28,7 @@ import jdk.vm.ci.code.Register; import jdk.vm.ci.code.RegisterSaveLayout; -import jdk.vm.ci.code.RegisterValue; import jdk.vm.ci.meta.JavaConstant; -import jdk.vm.ci.meta.LIRKind; -import jdk.vm.ci.meta.PlatformKind; import com.oracle.graal.asm.amd64.AMD64MacroAssembler; import com.oracle.graal.lir.LIRInstructionClass; @@ -68,9 +65,7 @@ for (int i = 0; i < zappedRegisters.length; i++) { Register reg = zappedRegisters[i]; if (reg != null) { - PlatformKind kind = crb.target.arch.getLargestStorableKind(reg.getRegisterCategory()); - RegisterValue registerValue = reg.asValue(LIRKind.value(kind)); - AMD64Move.const2reg(crb, masm, registerValue, zapValues[i]); + AMD64Move.const2reg(crb, masm, reg, zapValues[i]); } } }