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changeset 23119:4128cb7a8fed

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TraceRA: make phases constants.
author Josef Eisl <josef.eisl@jku.at>
date Mon, 30 Nov 2015 11:56:06 +0100
parents c8f3095d4345
children f449414238e4
files graal/com.oracle.graal.lir/src/com/oracle/graal/lir/alloc/trace/TraceRegisterAllocationPhase.java
diffstat 1 files changed, 7 insertions(+), 3 deletions(-) [+]
line wrap: on
line diff
--- a/graal/com.oracle.graal.lir/src/com/oracle/graal/lir/alloc/trace/TraceRegisterAllocationPhase.java	Mon Nov 30 14:06:44 2015 +0100
+++ b/graal/com.oracle.graal.lir/src/com/oracle/graal/lir/alloc/trace/TraceRegisterAllocationPhase.java	Mon Nov 30 11:56:06 2015 +0100
@@ -64,6 +64,10 @@
         // @formatter:on
     }
 
+    private static final TraceRegisterAllocationFixupPhase TRACE_REGISTER_ALLOCATION_FIXUP_PHASE = new TraceRegisterAllocationFixupPhase();
+    private static final TraceGlobalMoveResolutionPhase TRACE_GLOBAL_MOVE_RESOLUTION_PHASE = new TraceGlobalMoveResolutionPhase();
+    private static final TraceTrivialAllocator TRACE_TRIVIAL_ALLOCATOR = new TraceTrivialAllocator();
+
     static final int TRACE_DUMP_LEVEL = 3;
     private static final DebugMetric trivialTracesMetric = Debug.metric("TraceRA[trivialTraces]");
     private static final DebugMetric tracesMetric = Debug.metric("TraceRA[traces]");
@@ -92,7 +96,7 @@
                 }
                 Debug.dump(TRACE_DUMP_LEVEL, trace, "Trace" + traceNumber + ": " + trace);
                 if (Options.TraceRAtrivialBlockAllocator.getValue() && isTrivialTrace(lir, trace)) {
-                    new TraceTrivialAllocator().apply(target, lirGenRes, codeEmittingOrder, trace, traceContext, false);
+                    TRACE_TRIVIAL_ALLOCATOR.apply(target, lirGenRes, codeEmittingOrder, trace, traceContext, false);
                 } else {
                     TraceLinearScan allocator = new TraceLinearScan(target, lirGenRes, spillMoveFactory, registerAllocationConfig, trace, resultTraces, false);
                     allocator.allocate(target, lirGenRes, codeEmittingOrder, linearScanOrder, spillMoveFactory, registerAllocationConfig);
@@ -106,8 +110,8 @@
         }
         Debug.dump(lir, "After trace allocation");
 
-        new TraceGlobalMoveResolutionPhase().apply(target, lirGenRes, codeEmittingOrder, linearScanOrder, traceContext);
-        new TraceRegisterAllocationFixupPhase().apply(target, lirGenRes, codeEmittingOrder, linearScanOrder, traceContext);
+        TRACE_GLOBAL_MOVE_RESOLUTION_PHASE.apply(target, lirGenRes, codeEmittingOrder, linearScanOrder, traceContext);
+        TRACE_REGISTER_ALLOCATION_FIXUP_PHASE.apply(target, lirGenRes, codeEmittingOrder, linearScanOrder, traceContext);
     }
 
     static boolean isTrivialTrace(LIR lir, List<? extends AbstractBlockBase<?>> trace) {