Mercurial > hg > graal-compiler
changeset 22970:9e5a47e3c94c
TraceRA: insert all store at definition moves.
author | Josef Eisl <josef.eisl@jku.at> |
---|---|
date | Fri, 06 Nov 2015 17:50:57 +0100 |
parents | 5c924f8190dc |
children | 6c37ffb6887b |
files | graal/com.oracle.graal.compiler.common/src/com/oracle/graal/compiler/common/alloc/TraceBuilder.java graal/com.oracle.graal.lir/src/com/oracle/graal/lir/alloc/trace/TraceLinearScanEliminateSpillMovePhase.java |
diffstat | 2 files changed, 15 insertions(+), 8 deletions(-) [+] |
line wrap: on
line diff
--- a/graal/com.oracle.graal.compiler.common/src/com/oracle/graal/compiler/common/alloc/TraceBuilder.java Fri Aug 14 18:19:51 2015 +0200 +++ b/graal/com.oracle.graal.compiler.common/src/com/oracle/graal/compiler/common/alloc/TraceBuilder.java Fri Nov 06 17:50:57 2015 +0100 @@ -56,6 +56,11 @@ return getTraces().get(traceNr).stream().flatMap(b -> b.getPredecessors().stream()).anyMatch(s -> getTraceForBlock(s) != traceNr); } + public boolean incomingSideEdges(int traceNr) { + /* TODO (je): not efficient. find better solution. */ + return getTraces().get(traceNr).stream().skip(1).flatMap(b -> b.getPredecessors().stream()).anyMatch(s -> getTraceForBlock(s) != traceNr); + } + } /**
--- a/graal/com.oracle.graal.lir/src/com/oracle/graal/lir/alloc/trace/TraceLinearScanEliminateSpillMovePhase.java Fri Aug 14 18:19:51 2015 +0200 +++ b/graal/com.oracle.graal.lir/src/com/oracle/graal/lir/alloc/trace/TraceLinearScanEliminateSpillMovePhase.java Fri Nov 06 17:50:57 2015 +0100 @@ -60,16 +60,18 @@ @Override protected <B extends AbstractBlockBase<B>> void run(TargetDescription target, LIRGenerationResult lirGenRes, List<B> codeEmittingOrder, List<B> linearScanOrder, MoveFactory spillMoveFactory, RegisterAllocationConfig registerAllocationConfig, TraceBuilderResult<?> traceBuilderResult, TraceLinearScan allocator) { - int traceNr = traceBuilderResult.getTraceForBlock(allocator.sortedBlocks().get(0)); - if (!traceBuilderResult.incomingEdges(traceNr)) { - eliminateSpillMoves(allocator); - } + boolean shouldEliminateSpillMoves = shouldEliminateSpillMoves(traceBuilderResult, allocator); + eliminateSpillMoves(allocator, shouldEliminateSpillMoves, traceBuilderResult); + } + + private static boolean shouldEliminateSpillMoves(TraceBuilderResult<?> traceBuilderResult, TraceLinearScan allocator) { + return !traceBuilderResult.incomingSideEdges(traceBuilderResult.getTraceForBlock(allocator.sortedBlocks().get(0))); } // called once before assignment of register numbers @SuppressWarnings("try") - private static void eliminateSpillMoves(TraceLinearScan allocator) { - try (Indent indent = Debug.logAndIndent("Eliminating unnecessary spill moves")) { + private static void eliminateSpillMoves(TraceLinearScan allocator, boolean shouldEliminateSpillMoves, TraceBuilderResult<?> traceBuilderResult) { + try (Indent indent = Debug.logAndIndent("Eliminating unnecessary spill moves: Trace%d", traceBuilderResult.getTraceForBlock(allocator.sortedBlocks().get(0)))) { /* * collect all intervals that must be stored after their definition. The list is sorted @@ -98,7 +100,7 @@ * be correct. Only moves that have been inserted by LinearScan can be * removed. */ - if (canEliminateSpillMove(allocator, block, move)) { + if (shouldEliminateSpillMoves && canEliminateSpillMove(allocator, block, move)) { /* * Move target is a stack slot that is always correct, so eliminate * instruction. @@ -193,7 +195,7 @@ TraceInterval prev = null; TraceInterval temp = interval; while (temp != TraceInterval.EndMarker) { - assert temp.spillDefinitionPos() > 0 : "invalid spill definition pos"; + assert temp.spillDefinitionPos() >= 0 : "invalid spill definition pos"; if (prev != null) { assert temp.from() >= prev.from() : "intervals not sorted"; assert temp.spillDefinitionPos() >= prev.spillDefinitionPos() : "when intervals are sorted by from : then they must also be sorted by spillDefinitionPos";