Mercurial > hg > graal-jvmci-8
annotate src/share/vm/opto/machnode.hpp @ 14442:1174c8abbdb6
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0 | 1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP |
26 #define SHARE_VM_OPTO_MACHNODE_HPP | |
27 | |
28 #include "opto/callnode.hpp" | |
29 #include "opto/matcher.hpp" | |
30 #include "opto/multnode.hpp" | |
31 #include "opto/node.hpp" | |
32 #include "opto/regmask.hpp" | |
33 | |
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34 class BiasedLockingCounters; |
0 | 35 class BufferBlob; |
36 class CodeBuffer; | |
37 class JVMState; | |
38 class MachCallDynamicJavaNode; | |
39 class MachCallJavaNode; | |
40 class MachCallLeafNode; | |
41 class MachCallNode; | |
42 class MachCallRuntimeNode; | |
43 class MachCallStaticJavaNode; | |
44 class MachEpilogNode; | |
45 class MachIfNode; | |
46 class MachNullCheckNode; | |
47 class MachOper; | |
48 class MachProjNode; | |
49 class MachPrologNode; | |
50 class MachReturnNode; | |
51 class MachSafePointNode; | |
52 class MachSpillCopyNode; | |
53 class Matcher; | |
54 class PhaseRegAlloc; | |
55 class RegMask; | |
56 class State; | |
57 | |
58 //---------------------------MachOper------------------------------------------ | |
59 class MachOper : public ResourceObj { | |
60 public: | |
61 // Allocate right next to the MachNodes in the same arena | |
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62 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); } |
0 | 63 |
64 // Opcode | |
65 virtual uint opcode() const = 0; | |
66 | |
67 // Number of input edges. | |
68 // Generally at least 1 | |
69 virtual uint num_edges() const { return 1; } | |
70 // Array of Register masks | |
71 virtual const RegMask *in_RegMask(int index) const; | |
72 | |
73 // Methods to output the encoding of the operand | |
74 | |
75 // Negate conditional branches. Error for non-branch Nodes | |
76 virtual void negate(); | |
77 | |
78 // Return the value requested | |
79 // result register lookup, corresponding to int_format | |
80 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; | |
81 // input register lookup, corresponding to ext_format | |
82 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
83 | |
84 // helpers for MacroAssembler generation from ADLC | |
85 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { | |
86 return ::as_Register(reg(ra_, node)); | |
87 } | |
88 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
89 return ::as_Register(reg(ra_, node, idx)); | |
90 } | |
91 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
92 return ::as_FloatRegister(reg(ra_, node)); | |
93 } | |
94 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
95 return ::as_FloatRegister(reg(ra_, node, idx)); | |
96 } | |
97 | |
98 #if defined(IA32) || defined(AMD64) | |
99 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
100 return ::as_XMMRegister(reg(ra_, node)); | |
101 } | |
102 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
103 return ::as_XMMRegister(reg(ra_, node, idx)); | |
104 } | |
105 #endif | |
106 | |
107 virtual intptr_t constant() const; | |
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108 virtual relocInfo::relocType constant_reloc() const; |
0 | 109 virtual jdouble constantD() const; |
110 virtual jfloat constantF() const; | |
111 virtual jlong constantL() const; | |
112 virtual TypeOopPtr *oop() const; | |
113 virtual int ccode() const; | |
114 // A zero, default, indicates this value is not needed. | |
115 // May need to lookup the base register, as done in int_ and ext_format | |
116 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
117 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
118 virtual int scale() const; | |
119 // Parameters needed to support MEMORY_INTERFACE access to stackSlot | |
120 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
121 // Check for PC-Relative displacement | |
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122 virtual relocInfo::relocType disp_reloc() const; |
0 | 123 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot |
124 virtual int base_position() const; // base edge position, or -1 | |
125 virtual int index_position() const; // index edge position, or -1 | |
126 | |
127 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP | |
128 // Only returns non-null value for i486.ad's indOffset32X | |
129 virtual const TypePtr *disp_as_type() const { return NULL; } | |
130 | |
131 // Return the label | |
132 virtual Label *label() const; | |
133 | |
134 // Return the method's address | |
135 virtual intptr_t method() const; | |
136 | |
137 // Hash and compare over operands are currently identical | |
138 virtual uint hash() const; | |
139 virtual uint cmp( const MachOper &oper ) const; | |
140 | |
141 // Virtual clone, since I do not know how big the MachOper is. | |
142 virtual MachOper *clone(Compile* C) const = 0; | |
143 | |
144 // Return ideal Type from simple operands. Fail for complex operands. | |
145 virtual const Type *type() const; | |
146 | |
147 // Set an integer offset if we have one, or error otherwise | |
148 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } | |
149 | |
150 #ifndef PRODUCT | |
151 // Return name of operand | |
152 virtual const char *Name() const { return "???";} | |
153 | |
154 // Methods to output the text version of the operand | |
155 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; | |
156 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; | |
157 | |
158 virtual void dump_spec(outputStream *st) const; // Print per-operand info | |
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159 |
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160 // Check whether o is a valid oper. |
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161 static bool notAnOper(const MachOper *o) { |
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162 if (o == NULL) return true; |
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163 if (((intptr_t)o & 1) != 0) return true; |
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164 if (*(address*)o == badAddress) return true; // kill by Node::destruct |
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165 return false; |
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166 } |
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167 #endif // !PRODUCT |
0 | 168 }; |
169 | |
170 //------------------------------MachNode--------------------------------------- | |
171 // Base type for all machine specific nodes. All node classes generated by the | |
172 // ADLC inherit from this class. | |
173 class MachNode : public Node { | |
174 public: | |
175 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { | |
176 init_class_id(Class_Mach); | |
177 } | |
178 // Required boilerplate | |
179 virtual uint size_of() const { return sizeof(MachNode); } | |
180 virtual int Opcode() const; // Always equal to MachNode | |
181 virtual uint rule() const = 0; // Machine-specific opcode | |
182 // Number of inputs which come before the first operand. | |
183 // Generally at least 1, to skip the Control input | |
184 virtual uint oper_input_base() const { return 1; } | |
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185 // Position of constant base node in node's inputs. -1 if |
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186 // no constant base node input. |
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187 virtual uint mach_constant_base_node_input() const { return (uint)-1; } |
0 | 188 |
189 // Copy inputs and operands to new node of instruction. | |
190 // Called from cisc_version() and short_branch_version(). | |
191 // !!!! The method's body is defined in ad_<arch>.cpp file. | |
192 void fill_new_machnode(MachNode *n, Compile* C) const; | |
193 | |
194 // Return an equivalent instruction using memory for cisc_operand position | |
195 virtual MachNode *cisc_version(int offset, Compile* C); | |
196 // Modify this instruction's register mask to use stack version for cisc_operand | |
197 virtual void use_cisc_RegMask(); | |
198 | |
199 // Support for short branches | |
200 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } | |
201 | |
3851 | 202 // Avoid back to back some instructions on some CPUs. |
203 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; } | |
204 | |
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205 // instruction implemented with a call |
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206 bool has_call() const { return (flags() & Flag_has_call) != 0; } |
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207 |
0 | 208 // First index in _in[] corresponding to operand, or -1 if there is none |
209 int operand_index(uint operand) const; | |
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210 int operand_index(const MachOper *oper) const; |
0 | 211 |
212 // Register class input is expected in | |
213 virtual const RegMask &in_RegMask(uint) const; | |
214 | |
215 // cisc-spillable instructions redefine for use by in_RegMask | |
216 virtual const RegMask *cisc_RegMask() const { return NULL; } | |
217 | |
218 // If this instruction is a 2-address instruction, then return the | |
219 // index of the input which must match the output. Not nessecary | |
220 // for instructions which bind the input and output register to the | |
221 // same singleton regiser (e.g., Intel IDIV which binds AX to be | |
222 // both an input and an output). It is nessecary when the input and | |
223 // output have choices - but they must use the same choice. | |
224 virtual uint two_adr( ) const { return 0; } | |
225 | |
226 // Array of complex operand pointers. Each corresponds to zero or | |
227 // more leafs. Must be set by MachNode constructor to point to an | |
228 // internal array of MachOpers. The MachOper array is sized by | |
229 // specific MachNodes described in the ADL. | |
230 uint _num_opnds; | |
231 MachOper **_opnds; | |
232 uint num_opnds() const { return _num_opnds; } | |
233 | |
234 // Emit bytes into cbuf | |
235 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
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236 // Expand node after register allocation. |
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237 // Node is replaced by several nodes in the postalloc expand phase. |
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238 // Corresponding methods are generated for nodes if they specify |
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239 // postalloc_expand. See block.cpp for more documentation. |
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240 virtual bool requires_postalloc_expand() const { return false; } |
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241 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); |
0 | 242 // Size of instruction in bytes |
243 virtual uint size(PhaseRegAlloc *ra_) const; | |
244 // Helper function that computes size by emitting code | |
245 virtual uint emit_size(PhaseRegAlloc *ra_) const; | |
246 | |
247 // Return the alignment required (in units of relocInfo::addr_unit()) | |
248 // for this instruction (must be a power of 2) | |
249 virtual int alignment_required() const { return 1; } | |
250 | |
251 // Return the padding (in bytes) to be emitted before this | |
252 // instruction to properly align it. | |
253 virtual int compute_padding(int current_offset) const { return 0; } | |
254 | |
255 // Return number of relocatable values contained in this instruction | |
256 virtual int reloc() const { return 0; } | |
257 | |
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258 // Return number of words used for double constants in this instruction |
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259 virtual int ins_num_consts() const { return 0; } |
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260 |
0 | 261 // Hash and compare over operands. Used to do GVN on machine Nodes. |
262 virtual uint hash() const; | |
263 virtual uint cmp( const Node &n ) const; | |
264 | |
265 // Expand method for MachNode, replaces nodes representing pseudo | |
266 // instructions with a set of nodes which represent real machine | |
267 // instructions and compute the same value. | |
1203 | 268 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } |
0 | 269 |
270 // Bottom_type call; value comes from operand0 | |
271 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } | |
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272 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); } |
0 | 273 |
274 // If this is a memory op, return the base pointer and fixed offset. | |
275 // If there are no such, return NULL. If there are multiple addresses | |
276 // or the address is indeterminate (rare cases) then return (Node*)-1, | |
277 // which serves as node bottom. | |
278 // If the offset is not statically determined, set it to Type::OffsetBot. | |
279 // This method is free to ignore stack slots if that helps. | |
280 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) | |
281 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible | |
282 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; | |
283 | |
284 // Helper for get_base_and_disp: find the base and index input nodes. | |
285 // Returns the MachOper as determined by memory_operand(), for use, if | |
286 // needed by the caller. If (MachOper *)-1 is returned, base and index | |
287 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and | |
288 // index are set to NULL. | |
289 const MachOper* memory_inputs(Node* &base, Node* &index) const; | |
290 | |
291 // Helper for memory_inputs: Which operand carries the necessary info? | |
292 // By default, returns NULL, which means there is no such operand. | |
293 // If it returns (MachOper*)-1, this means there are multiple memories. | |
294 virtual const MachOper* memory_operand() const { return NULL; } | |
295 | |
296 // Call "get_base_and_disp" to decide which category of memory is used here. | |
297 virtual const class TypePtr *adr_type() const; | |
298 | |
299 // Apply peephole rule(s) to this instruction | |
300 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ); | |
301 | |
302 // Top-level ideal Opcode matched | |
303 virtual int ideal_Opcode() const { return Op_Node; } | |
304 | |
305 // Adds the label for the case | |
306 virtual void add_case_label( int switch_val, Label* blockLabel); | |
307 | |
308 // Set the absolute address for methods | |
309 virtual void method_set( intptr_t addr ); | |
310 | |
311 // Should we clone rather than spill this instruction? | |
312 bool rematerialize() const; | |
313 | |
314 // Get the pipeline info | |
315 static const Pipeline *pipeline_class(); | |
316 virtual const Pipeline *pipeline() const; | |
317 | |
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318 // Returns true if this node is a check that can be implemented with a trap. |
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319 virtual bool is_TrapBasedCheckNode() const { return false; } |
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320 |
0 | 321 #ifndef PRODUCT |
322 virtual const char *Name() const = 0; // Machine-specific name | |
323 virtual void dump_spec(outputStream *st) const; // Print per-node info | |
324 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual | |
325 #endif | |
326 }; | |
327 | |
328 //------------------------------MachIdealNode---------------------------- | |
329 // Machine specific versions of nodes that must be defined by user. | |
330 // These are not converted by matcher from ideal nodes to machine nodes | |
331 // but are inserted into the code by the compiler. | |
332 class MachIdealNode : public MachNode { | |
333 public: | |
334 MachIdealNode( ) {} | |
335 | |
336 // Define the following defaults for non-matched machine nodes | |
337 virtual uint oper_input_base() const { return 0; } | |
338 virtual uint rule() const { return 9999999; } | |
339 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } | |
340 }; | |
341 | |
342 //------------------------------MachTypeNode---------------------------- | |
343 // Machine Nodes that need to retain a known Type. | |
344 class MachTypeNode : public MachNode { | |
345 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
346 public: | |
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347 MachTypeNode( ) {} |
0 | 348 const Type *_bottom_type; |
349 | |
350 virtual const class Type *bottom_type() const { return _bottom_type; } | |
351 #ifndef PRODUCT | |
352 virtual void dump_spec(outputStream *st) const; | |
353 #endif | |
354 }; | |
355 | |
356 //------------------------------MachBreakpointNode---------------------------- | |
357 // Machine breakpoint or interrupt Node | |
358 class MachBreakpointNode : public MachIdealNode { | |
359 public: | |
360 MachBreakpointNode( ) {} | |
361 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
362 virtual uint size(PhaseRegAlloc *ra_) const; | |
363 | |
364 #ifndef PRODUCT | |
365 virtual const char *Name() const { return "Breakpoint"; } | |
366 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
367 #endif | |
368 }; | |
369 | |
2008 | 370 //------------------------------MachConstantBaseNode-------------------------- |
371 // Machine node that represents the base address of the constant table. | |
372 class MachConstantBaseNode : public MachIdealNode { | |
373 public: | |
374 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). | |
375 | |
376 public: | |
377 MachConstantBaseNode() : MachIdealNode() { | |
378 init_class_id(Class_MachConstantBase); | |
379 } | |
380 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } | |
381 virtual uint ideal_reg() const { return Op_RegP; } | |
382 virtual uint oper_input_base() const { return 1; } | |
383 | |
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384 virtual bool requires_postalloc_expand() const; |
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385 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); |
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386 |
2008 | 387 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; |
388 virtual uint size(PhaseRegAlloc* ra_) const; | |
389 virtual bool pinned() const { return UseRDPCForConstantTableBase; } | |
390 | |
391 static const RegMask& static_out_RegMask() { return _out_RegMask; } | |
392 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } | |
393 | |
394 #ifndef PRODUCT | |
395 virtual const char* Name() const { return "MachConstantBaseNode"; } | |
396 virtual void format(PhaseRegAlloc*, outputStream* st) const; | |
397 #endif | |
398 }; | |
399 | |
400 //------------------------------MachConstantNode------------------------------- | |
401 // Machine node that holds a constant which is stored in the constant table. | |
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402 class MachConstantNode : public MachTypeNode { |
2008 | 403 protected: |
404 Compile::Constant _constant; // This node's constant. | |
405 | |
406 public: | |
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407 MachConstantNode() : MachTypeNode() { |
2008 | 408 init_class_id(Class_MachConstant); |
409 } | |
410 | |
411 virtual void eval_constant(Compile* C) { | |
412 #ifdef ASSERT | |
413 tty->print("missing MachConstantNode eval_constant function: "); | |
414 dump(); | |
415 #endif | |
416 ShouldNotCallThis(); | |
417 } | |
418 | |
419 virtual const RegMask &in_RegMask(uint idx) const { | |
420 if (idx == mach_constant_base_node_input()) | |
421 return MachConstantBaseNode::static_out_RegMask(); | |
422 return MachNode::in_RegMask(idx); | |
423 } | |
424 | |
425 // Input edge of MachConstantBaseNode. | |
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426 virtual uint mach_constant_base_node_input() const { return req() - 1; } |
2008 | 427 |
428 int constant_offset(); | |
429 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } | |
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430 // Unchecked version to avoid assertions in debug output. |
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431 int constant_offset_unchecked() const; |
2008 | 432 }; |
433 | |
0 | 434 //------------------------------MachUEPNode----------------------------------- |
435 // Machine Unvalidated Entry Point Node | |
436 class MachUEPNode : public MachIdealNode { | |
437 public: | |
438 MachUEPNode( ) {} | |
439 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
440 virtual uint size(PhaseRegAlloc *ra_) const; | |
441 | |
442 #ifndef PRODUCT | |
443 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } | |
444 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
445 #endif | |
446 }; | |
447 | |
448 //------------------------------MachPrologNode-------------------------------- | |
449 // Machine function Prolog Node | |
450 class MachPrologNode : public MachIdealNode { | |
451 public: | |
452 MachPrologNode( ) {} | |
453 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
454 virtual uint size(PhaseRegAlloc *ra_) const; | |
455 virtual int reloc() const; | |
456 | |
457 #ifndef PRODUCT | |
458 virtual const char *Name() const { return "Prolog"; } | |
459 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
460 #endif | |
461 }; | |
462 | |
463 //------------------------------MachEpilogNode-------------------------------- | |
464 // Machine function Epilog Node | |
465 class MachEpilogNode : public MachIdealNode { | |
466 public: | |
467 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} | |
468 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
469 virtual uint size(PhaseRegAlloc *ra_) const; | |
470 virtual int reloc() const; | |
471 virtual const Pipeline *pipeline() const; | |
472 | |
473 private: | |
474 bool _do_polling; | |
475 | |
476 public: | |
477 bool do_polling() const { return _do_polling; } | |
478 | |
479 // Offset of safepoint from the beginning of the node | |
480 int safepoint_offset() const; | |
481 | |
482 #ifndef PRODUCT | |
483 virtual const char *Name() const { return "Epilog"; } | |
484 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
485 #endif | |
486 }; | |
487 | |
488 //------------------------------MachNopNode----------------------------------- | |
489 // Machine function Nop Node | |
490 class MachNopNode : public MachIdealNode { | |
491 private: | |
492 int _count; | |
493 public: | |
494 MachNopNode( ) : _count(1) {} | |
495 MachNopNode( int count ) : _count(count) {} | |
496 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
497 virtual uint size(PhaseRegAlloc *ra_) const; | |
498 | |
499 virtual const class Type *bottom_type() const { return Type::CONTROL; } | |
500 | |
501 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp | |
502 virtual const Pipeline *pipeline() const; | |
503 #ifndef PRODUCT | |
504 virtual const char *Name() const { return "Nop"; } | |
505 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
506 virtual void dump_spec(outputStream *st) const { } // No per-operand info | |
507 #endif | |
508 }; | |
509 | |
510 //------------------------------MachSpillCopyNode------------------------------ | |
511 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any | |
512 // location (stack or register). | |
513 class MachSpillCopyNode : public MachIdealNode { | |
514 const RegMask *_in; // RegMask for input | |
515 const RegMask *_out; // RegMask for output | |
516 const Type *_type; | |
517 public: | |
518 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) : | |
519 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) { | |
520 init_class_id(Class_MachSpillCopy); | |
521 init_flags(Flag_is_Copy); | |
522 add_req(NULL); | |
523 add_req(n); | |
524 } | |
525 virtual uint size_of() const { return sizeof(*this); } | |
526 void set_out_RegMask(const RegMask &out) { _out = &out; } | |
527 void set_in_RegMask(const RegMask &in) { _in = ∈ } | |
528 virtual const RegMask &out_RegMask() const { return *_out; } | |
529 virtual const RegMask &in_RegMask(uint) const { return *_in; } | |
530 virtual const class Type *bottom_type() const { return _type; } | |
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531 virtual uint ideal_reg() const { return _type->ideal_reg(); } |
0 | 532 virtual uint oper_input_base() const { return 1; } |
533 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; | |
534 | |
535 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
536 virtual uint size(PhaseRegAlloc *ra_) const; | |
537 | |
538 #ifndef PRODUCT | |
539 virtual const char *Name() const { return "MachSpillCopy"; } | |
540 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
541 #endif | |
542 }; | |
543 | |
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544 //------------------------------MachBranchNode-------------------------------- |
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545 // Abstract machine branch Node |
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546 class MachBranchNode : public MachIdealNode { |
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547 public: |
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548 MachBranchNode() : MachIdealNode() { |
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549 init_class_id(Class_MachBranch); |
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550 } |
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551 virtual void label_set(Label* label, uint block_num) = 0; |
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552 virtual void save_label(Label** label, uint* block_num) = 0; |
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553 |
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554 // Support for short branches |
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555 virtual MachNode *short_branch_version(Compile* C) { return NULL; } |
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556 |
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557 virtual bool pinned() const { return true; }; |
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558 }; |
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559 |
0 | 560 //------------------------------MachNullChkNode-------------------------------- |
561 // Machine-dependent null-pointer-check Node. Points a real MachNode that is | |
562 // also some kind of memory op. Turns the indicated MachNode into a | |
563 // conditional branch with good latency on the ptr-not-null path and awful | |
564 // latency on the pointer-is-null path. | |
565 | |
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566 class MachNullCheckNode : public MachBranchNode { |
0 | 567 public: |
568 const uint _vidx; // Index of memop being tested | |
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569 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { |
0 | 570 init_class_id(Class_MachNullCheck); |
571 add_req(ctrl); | |
572 add_req(memop); | |
573 } | |
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574 virtual uint size_of() const { return sizeof(*this); } |
0 | 575 |
576 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
3839 | 577 virtual void label_set(Label* label, uint block_num); |
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578 virtual void save_label(Label** label, uint* block_num); |
0 | 579 virtual void negate() { } |
580 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } | |
581 virtual uint ideal_reg() const { return NotAMachineReg; } | |
582 virtual const RegMask &in_RegMask(uint) const; | |
583 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } | |
584 #ifndef PRODUCT | |
585 virtual const char *Name() const { return "NullCheck"; } | |
586 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
587 #endif | |
588 }; | |
589 | |
590 //------------------------------MachProjNode---------------------------------- | |
591 // Machine-dependent Ideal projections (how is that for an oxymoron). Really | |
592 // just MachNodes made by the Ideal world that replicate simple projections | |
593 // but with machine-dependent input & output register masks. Generally | |
594 // produced as part of calling conventions. Normally I make MachNodes as part | |
595 // of the Matcher process, but the Matcher is ill suited to issues involving | |
596 // frame handling, so frame handling is all done in the Ideal world with | |
597 // occasional callbacks to the machine model for important info. | |
598 class MachProjNode : public ProjNode { | |
599 public: | |
3842 | 600 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { |
601 init_class_id(Class_MachProj); | |
602 } | |
0 | 603 RegMask _rout; |
604 const uint _ideal_reg; | |
605 enum projType { | |
606 unmatched_proj = 0, // Projs for Control, I/O, memory not matched | |
607 fat_proj = 999 // Projs killing many regs, defined by _rout | |
608 }; | |
609 virtual int Opcode() const; | |
610 virtual const Type *bottom_type() const; | |
611 virtual const TypePtr *adr_type() const; | |
612 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } | |
613 virtual const RegMask &out_RegMask() const { return _rout; } | |
614 virtual uint ideal_reg() const { return _ideal_reg; } | |
615 // Need size_of() for virtual ProjNode::clone() | |
616 virtual uint size_of() const { return sizeof(MachProjNode); } | |
617 #ifndef PRODUCT | |
618 virtual void dump_spec(outputStream *st) const; | |
619 #endif | |
620 }; | |
621 | |
622 //------------------------------MachIfNode------------------------------------- | |
623 // Machine-specific versions of IfNodes | |
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624 class MachIfNode : public MachBranchNode { |
0 | 625 virtual uint size_of() const { return sizeof(*this); } // Size is bigger |
626 public: | |
627 float _prob; // Probability branch goes either way | |
628 float _fcnt; // Frequency counter | |
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629 MachIfNode() : MachBranchNode() { |
0 | 630 init_class_id(Class_MachIf); |
631 } | |
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632 // Negate conditional branches. |
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633 virtual void negate() = 0; |
0 | 634 #ifndef PRODUCT |
635 virtual void dump_spec(outputStream *st) const; | |
636 #endif | |
637 }; | |
638 | |
3842 | 639 //------------------------------MachGotoNode----------------------------------- |
640 // Machine-specific versions of GotoNodes | |
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641 class MachGotoNode : public MachBranchNode { |
3842 | 642 public: |
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643 MachGotoNode() : MachBranchNode() { |
3842 | 644 init_class_id(Class_MachGoto); |
645 } | |
646 }; | |
647 | |
0 | 648 //------------------------------MachFastLockNode------------------------------------- |
649 // Machine-specific versions of FastLockNodes | |
650 class MachFastLockNode : public MachNode { | |
651 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
652 public: | |
653 BiasedLockingCounters* _counters; | |
654 | |
655 MachFastLockNode() : MachNode() {} | |
656 }; | |
657 | |
658 //------------------------------MachReturnNode-------------------------------- | |
659 // Machine-specific versions of subroutine returns | |
660 class MachReturnNode : public MachNode { | |
661 virtual uint size_of() const; // Size is bigger | |
662 public: | |
663 RegMask *_in_rms; // Input register masks, set during allocation | |
664 ReallocMark _nesting; // assertion check for reallocations | |
665 const TypePtr* _adr_type; // memory effects of call or return | |
666 MachReturnNode() : MachNode() { | |
667 init_class_id(Class_MachReturn); | |
668 _adr_type = TypePtr::BOTTOM; // the default: all of memory | |
669 } | |
670 | |
671 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } | |
672 | |
673 virtual const RegMask &in_RegMask(uint) const; | |
674 virtual bool pinned() const { return true; }; | |
675 virtual const TypePtr *adr_type() const; | |
676 }; | |
677 | |
678 //------------------------------MachSafePointNode----------------------------- | |
679 // Machine-specific versions of safepoints | |
680 class MachSafePointNode : public MachReturnNode { | |
681 public: | |
682 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC | |
683 JVMState* _jvms; // Pointer to list of JVM State Objects | |
684 uint _jvmadj; // Extra delta to jvms indexes (mach. args) | |
685 OopMap* oop_map() const { return _oop_map; } | |
686 void set_oop_map(OopMap* om) { _oop_map = om; } | |
687 | |
688 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { | |
689 init_class_id(Class_MachSafePoint); | |
690 } | |
691 | |
692 virtual JVMState* jvms() const { return _jvms; } | |
693 void set_jvms(JVMState* s) { | |
694 _jvms = s; | |
695 } | |
696 virtual const Type *bottom_type() const; | |
697 | |
698 virtual const RegMask &in_RegMask(uint) const; | |
699 | |
700 // Functionality from old debug nodes | |
701 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } | |
702 Node *frameptr () const { return in(TypeFunc::FramePtr); } | |
703 | |
704 Node *local(const JVMState* jvms, uint idx) const { | |
705 assert(verify_jvms(jvms), "jvms must match"); | |
706 return in(_jvmadj + jvms->locoff() + idx); | |
707 } | |
708 Node *stack(const JVMState* jvms, uint idx) const { | |
709 assert(verify_jvms(jvms), "jvms must match"); | |
710 return in(_jvmadj + jvms->stkoff() + idx); | |
711 } | |
712 Node *monitor_obj(const JVMState* jvms, uint idx) const { | |
713 assert(verify_jvms(jvms), "jvms must match"); | |
714 return in(_jvmadj + jvms->monitor_obj_offset(idx)); | |
715 } | |
716 Node *monitor_box(const JVMState* jvms, uint idx) const { | |
717 assert(verify_jvms(jvms), "jvms must match"); | |
718 return in(_jvmadj + jvms->monitor_box_offset(idx)); | |
719 } | |
720 void set_local(const JVMState* jvms, uint idx, Node *c) { | |
721 assert(verify_jvms(jvms), "jvms must match"); | |
722 set_req(_jvmadj + jvms->locoff() + idx, c); | |
723 } | |
724 void set_stack(const JVMState* jvms, uint idx, Node *c) { | |
725 assert(verify_jvms(jvms), "jvms must match"); | |
726 set_req(_jvmadj + jvms->stkoff() + idx, c); | |
727 } | |
728 void set_monitor(const JVMState* jvms, uint idx, Node *c) { | |
729 assert(verify_jvms(jvms), "jvms must match"); | |
730 set_req(_jvmadj + jvms->monoff() + idx, c); | |
731 } | |
732 }; | |
733 | |
734 //------------------------------MachCallNode---------------------------------- | |
735 // Machine-specific versions of subroutine calls | |
736 class MachCallNode : public MachSafePointNode { | |
737 protected: | |
738 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash | |
739 virtual uint cmp( const Node &n ) const; | |
740 virtual uint size_of() const = 0; // Size is bigger | |
741 public: | |
742 const TypeFunc *_tf; // Function type | |
743 address _entry_point; // Address of the method being called | |
744 float _cnt; // Estimate of number of times called | |
745 uint _argsize; // Size of argument block on stack | |
746 | |
747 const TypeFunc* tf() const { return _tf; } | |
748 const address entry_point() const { return _entry_point; } | |
749 const float cnt() const { return _cnt; } | |
750 uint argsize() const { return _argsize; } | |
751 | |
752 void set_tf(const TypeFunc* tf) { _tf = tf; } | |
753 void set_entry_point(address p) { _entry_point = p; } | |
754 void set_cnt(float c) { _cnt = c; } | |
755 void set_argsize(int s) { _argsize = s; } | |
756 | |
757 MachCallNode() : MachSafePointNode() { | |
758 init_class_id(Class_MachCall); | |
759 } | |
760 | |
761 virtual const Type *bottom_type() const; | |
762 virtual bool pinned() const { return false; } | |
763 virtual const Type *Value( PhaseTransform *phase ) const; | |
764 virtual const RegMask &in_RegMask(uint) const; | |
765 virtual int ret_addr_offset() { return 0; } | |
766 | |
767 bool returns_long() const { return tf()->return_type() == T_LONG; } | |
768 bool return_value_is_used() const; | |
769 #ifndef PRODUCT | |
770 virtual void dump_spec(outputStream *st) const; | |
771 #endif | |
772 }; | |
773 | |
774 //------------------------------MachCallJavaNode------------------------------ | |
775 // "Base" class for machine-specific versions of subroutine calls | |
776 class MachCallJavaNode : public MachCallNode { | |
777 protected: | |
778 virtual uint cmp( const Node &n ) const; | |
779 virtual uint size_of() const; // Size is bigger | |
780 public: | |
781 ciMethod* _method; // Method being direct called | |
782 int _bci; // Byte Code index of call byte code | |
783 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual | |
1137 | 784 bool _method_handle_invoke; // Tells if the call has to preserve SP |
0 | 785 MachCallJavaNode() : MachCallNode() { |
786 init_class_id(Class_MachCallJava); | |
787 } | |
1137 | 788 |
789 virtual const RegMask &in_RegMask(uint) const; | |
790 | |
0 | 791 #ifndef PRODUCT |
792 virtual void dump_spec(outputStream *st) const; | |
793 #endif | |
794 }; | |
795 | |
796 //------------------------------MachCallStaticJavaNode------------------------ | |
797 // Machine-specific versions of monomorphic subroutine calls | |
798 class MachCallStaticJavaNode : public MachCallJavaNode { | |
799 virtual uint cmp( const Node &n ) const; | |
800 virtual uint size_of() const; // Size is bigger | |
801 public: | |
802 const char *_name; // Runtime wrapper name | |
803 MachCallStaticJavaNode() : MachCallJavaNode() { | |
804 init_class_id(Class_MachCallStaticJava); | |
805 } | |
806 | |
807 // If this is an uncommon trap, return the request code, else zero. | |
808 int uncommon_trap_request() const; | |
809 | |
810 virtual int ret_addr_offset(); | |
811 #ifndef PRODUCT | |
812 virtual void dump_spec(outputStream *st) const; | |
813 void dump_trap_args(outputStream *st) const; | |
814 #endif | |
815 }; | |
816 | |
817 //------------------------------MachCallDynamicJavaNode------------------------ | |
818 // Machine-specific versions of possibly megamorphic subroutine calls | |
819 class MachCallDynamicJavaNode : public MachCallJavaNode { | |
820 public: | |
821 int _vtable_index; | |
822 MachCallDynamicJavaNode() : MachCallJavaNode() { | |
823 init_class_id(Class_MachCallDynamicJava); | |
824 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized | |
825 } | |
826 virtual int ret_addr_offset(); | |
827 #ifndef PRODUCT | |
828 virtual void dump_spec(outputStream *st) const; | |
829 #endif | |
830 }; | |
831 | |
832 //------------------------------MachCallRuntimeNode---------------------------- | |
833 // Machine-specific versions of subroutine calls | |
834 class MachCallRuntimeNode : public MachCallNode { | |
835 virtual uint cmp( const Node &n ) const; | |
836 virtual uint size_of() const; // Size is bigger | |
837 public: | |
838 const char *_name; // Printable name, if _method is NULL | |
839 MachCallRuntimeNode() : MachCallNode() { | |
840 init_class_id(Class_MachCallRuntime); | |
841 } | |
842 virtual int ret_addr_offset(); | |
843 #ifndef PRODUCT | |
844 virtual void dump_spec(outputStream *st) const; | |
845 #endif | |
846 }; | |
847 | |
848 class MachCallLeafNode: public MachCallRuntimeNode { | |
849 public: | |
850 MachCallLeafNode() : MachCallRuntimeNode() { | |
851 init_class_id(Class_MachCallLeaf); | |
852 } | |
853 }; | |
854 | |
855 //------------------------------MachHaltNode----------------------------------- | |
856 // Machine-specific versions of halt nodes | |
857 class MachHaltNode : public MachReturnNode { | |
858 public: | |
859 virtual JVMState* jvms() const; | |
860 }; | |
861 | |
862 | |
863 //------------------------------MachTempNode----------------------------------- | |
864 // Node used by the adlc to construct inputs to represent temporary registers | |
865 class MachTempNode : public MachNode { | |
866 private: | |
867 MachOper *_opnd_array[1]; | |
868 | |
869 public: | |
870 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } | |
871 virtual uint rule() const { return 9999999; } | |
872 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} | |
873 | |
874 MachTempNode(MachOper* oper) { | |
875 init_class_id(Class_MachTemp); | |
876 _num_opnds = 1; | |
877 _opnds = _opnd_array; | |
878 add_req(NULL); | |
879 _opnds[0] = oper; | |
880 } | |
881 virtual uint size_of() const { return sizeof(MachTempNode); } | |
882 | |
883 #ifndef PRODUCT | |
884 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} | |
885 virtual const char *Name() const { return "MachTemp";} | |
886 #endif | |
887 }; | |
888 | |
889 | |
890 | |
891 //------------------------------labelOper-------------------------------------- | |
892 // Machine-independent version of label operand | |
893 class labelOper : public MachOper { | |
894 private: | |
895 virtual uint num_edges() const { return 0; } | |
896 public: | |
897 // Supported for fixed size branches | |
898 Label* _label; // Label for branch(es) | |
899 | |
900 uint _block_num; | |
901 | |
902 labelOper() : _block_num(0), _label(0) {} | |
903 | |
904 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} | |
905 | |
906 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} | |
907 | |
908 virtual MachOper *clone(Compile* C) const; | |
909 | |
3839 | 910 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } |
0 | 911 |
912 virtual uint opcode() const; | |
913 | |
914 virtual uint hash() const; | |
915 virtual uint cmp( const MachOper &oper ) const; | |
916 #ifndef PRODUCT | |
917 virtual const char *Name() const { return "Label";} | |
918 | |
919 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
920 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
921 #endif | |
922 }; | |
923 | |
924 | |
925 //------------------------------methodOper-------------------------------------- | |
926 // Machine-independent version of method operand | |
927 class methodOper : public MachOper { | |
928 private: | |
929 virtual uint num_edges() const { return 0; } | |
930 public: | |
931 intptr_t _method; // Address of method | |
932 methodOper() : _method(0) {} | |
933 methodOper(intptr_t method) : _method(method) {} | |
934 | |
935 virtual MachOper *clone(Compile* C) const; | |
936 | |
937 virtual intptr_t method() const { return _method; } | |
938 | |
939 virtual uint opcode() const; | |
940 | |
941 virtual uint hash() const; | |
942 virtual uint cmp( const MachOper &oper ) const; | |
943 #ifndef PRODUCT | |
944 virtual const char *Name() const { return "Method";} | |
945 | |
946 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
947 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
948 #endif | |
949 }; | |
1972 | 950 |
951 #endif // SHARE_VM_OPTO_MACHNODE_HPP |